1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"FTDF registers"]
28unsafe impl ::core::marker::Send for super::Ftdf {}
29unsafe impl ::core::marker::Sync for super::Ftdf {}
30impl super::Ftdf {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "Build time"]
38 #[inline(always)]
39 pub const fn ftdf_buildtime_0_reg(
40 &self,
41 ) -> &'static crate::common::Reg<self::FtdfBuildtime0Reg_SPEC, crate::common::RW> {
42 unsafe {
43 crate::common::Reg::<self::FtdfBuildtime0Reg_SPEC, crate::common::RW>::from_ptr(
44 self._svd2pac_as_ptr().add(65552usize),
45 )
46 }
47 }
48
49 #[doc = "Build time"]
50 #[inline(always)]
51 pub const fn ftdf_buildtime_1_reg(
52 &self,
53 ) -> &'static crate::common::Reg<self::FtdfBuildtime1Reg_SPEC, crate::common::RW> {
54 unsafe {
55 crate::common::Reg::<self::FtdfBuildtime1Reg_SPEC, crate::common::RW>::from_ptr(
56 self._svd2pac_as_ptr().add(65556usize),
57 )
58 }
59 }
60
61 #[doc = "Build time"]
62 #[inline(always)]
63 pub const fn ftdf_buildtime_2_reg(
64 &self,
65 ) -> &'static crate::common::Reg<self::FtdfBuildtime2Reg_SPEC, crate::common::RW> {
66 unsafe {
67 crate::common::Reg::<self::FtdfBuildtime2Reg_SPEC, crate::common::RW>::from_ptr(
68 self._svd2pac_as_ptr().add(65560usize),
69 )
70 }
71 }
72
73 #[doc = "Build time"]
74 #[inline(always)]
75 pub const fn ftdf_buildtime_3_reg(
76 &self,
77 ) -> &'static crate::common::Reg<self::FtdfBuildtime3Reg_SPEC, crate::common::RW> {
78 unsafe {
79 crate::common::Reg::<self::FtdfBuildtime3Reg_SPEC, crate::common::RW>::from_ptr(
80 self._svd2pac_as_ptr().add(65564usize),
81 )
82 }
83 }
84
85 #[doc = "Debug control register"]
86 #[inline(always)]
87 pub const fn ftdf_debugcontrol_reg(
88 &self,
89 ) -> &'static crate::common::Reg<self::FtdfDebugcontrolReg_SPEC, crate::common::RW> {
90 unsafe {
91 crate::common::Reg::<self::FtdfDebugcontrolReg_SPEC, crate::common::RW>::from_ptr(
92 self._svd2pac_as_ptr().add(66448usize),
93 )
94 }
95 }
96
97 #[doc = "Value of event generator"]
98 #[inline(always)]
99 pub const fn ftdf_eventcurrval_reg(
100 &self,
101 ) -> &'static crate::common::Reg<self::FtdfEventcurrvalReg_SPEC, crate::common::RW> {
102 unsafe {
103 crate::common::Reg::<self::FtdfEventcurrvalReg_SPEC, crate::common::RW>::from_ptr(
104 self._svd2pac_as_ptr().add(65624usize),
105 )
106 }
107 }
108
109 #[doc = "Selection register events"]
110 #[inline(always)]
111 pub const fn ftdf_ftdf_ce_reg(
112 &self,
113 ) -> &'static crate::common::Reg<self::FtdfFtdfCeReg_SPEC, crate::common::RW> {
114 unsafe {
115 crate::common::Reg::<self::FtdfFtdfCeReg_SPEC, crate::common::RW>::from_ptr(
116 self._svd2pac_as_ptr().add(66128usize),
117 )
118 }
119 }
120
121 #[doc = "Mask selection register events"]
122 #[inline(always)]
123 pub const fn ftdf_ftdf_cm_reg(
124 &self,
125 ) -> &'static crate::common::Reg<self::FtdfFtdfCmReg_SPEC, crate::common::RW> {
126 unsafe {
127 crate::common::Reg::<self::FtdfFtdfCmReg_SPEC, crate::common::RW>::from_ptr(
128 self._svd2pac_as_ptr().add(66132usize),
129 )
130 }
131 }
132
133 #[doc = "Global control register"]
134 #[inline(always)]
135 pub const fn ftdf_glob_control_0_reg(
136 &self,
137 ) -> &'static crate::common::Reg<self::FtdfGlobControl0Reg_SPEC, crate::common::RW> {
138 unsafe {
139 crate::common::Reg::<self::FtdfGlobControl0Reg_SPEC, crate::common::RW>::from_ptr(
140 self._svd2pac_as_ptr().add(65568usize),
141 )
142 }
143 }
144
145 #[doc = "Global control register"]
146 #[inline(always)]
147 pub const fn ftdf_glob_control_1_reg(
148 &self,
149 ) -> &'static crate::common::Reg<self::FtdfGlobControl1Reg_SPEC, crate::common::RW> {
150 unsafe {
151 crate::common::Reg::<self::FtdfGlobControl1Reg_SPEC, crate::common::RW>::from_ptr(
152 self._svd2pac_as_ptr().add(65572usize),
153 )
154 }
155 }
156
157 #[doc = "Global control register"]
158 #[inline(always)]
159 pub const fn ftdf_glob_control_2_reg(
160 &self,
161 ) -> &'static crate::common::Reg<self::FtdfGlobControl2Reg_SPEC, crate::common::RW> {
162 unsafe {
163 crate::common::Reg::<self::FtdfGlobControl2Reg_SPEC, crate::common::RW>::from_ptr(
164 self._svd2pac_as_ptr().add(65576usize),
165 )
166 }
167 }
168
169 #[doc = "Global control register"]
170 #[inline(always)]
171 pub const fn ftdf_glob_control_3_reg(
172 &self,
173 ) -> &'static crate::common::Reg<self::FtdfGlobControl3Reg_SPEC, crate::common::RW> {
174 unsafe {
175 crate::common::Reg::<self::FtdfGlobControl3Reg_SPEC, crate::common::RW>::from_ptr(
176 self._svd2pac_as_ptr().add(65580usize),
177 )
178 }
179 }
180
181 #[doc = "Lmax reset register"]
182 #[inline(always)]
183 pub const fn ftdf_lmacreset_reg(
184 &self,
185 ) -> &'static crate::common::Reg<self::FtdfLmacresetReg_SPEC, crate::common::RW> {
186 unsafe {
187 crate::common::Reg::<self::FtdfLmacresetReg_SPEC, crate::common::RW>::from_ptr(
188 self._svd2pac_as_ptr().add(66400usize),
189 )
190 }
191 }
192
193 #[doc = "Lmac control register"]
194 #[inline(always)]
195 pub const fn ftdf_lmac_control_0_reg(
196 &self,
197 ) -> &'static crate::common::Reg<self::FtdfLmacControl0Reg_SPEC, crate::common::RW> {
198 unsafe {
199 crate::common::Reg::<self::FtdfLmacControl0Reg_SPEC, crate::common::RW>::from_ptr(
200 self._svd2pac_as_ptr().add(65584usize),
201 )
202 }
203 }
204
205 #[doc = "Lmac control register"]
206 #[inline(always)]
207 pub const fn ftdf_lmac_control_10_reg(
208 &self,
209 ) -> &'static crate::common::Reg<self::FtdfLmacControl10Reg_SPEC, crate::common::RW> {
210 unsafe {
211 crate::common::Reg::<self::FtdfLmacControl10Reg_SPEC, crate::common::RW>::from_ptr(
212 self._svd2pac_as_ptr().add(65804usize),
213 )
214 }
215 }
216
217 #[doc = "Lmac control register"]
218 #[inline(always)]
219 pub const fn ftdf_lmac_control_11_reg(
220 &self,
221 ) -> &'static crate::common::Reg<self::FtdfLmacControl11Reg_SPEC, crate::common::RW> {
222 unsafe {
223 crate::common::Reg::<self::FtdfLmacControl11Reg_SPEC, crate::common::RW>::from_ptr(
224 self._svd2pac_as_ptr().add(65644usize),
225 )
226 }
227 }
228
229 #[doc = "Lmac control register"]
230 #[inline(always)]
231 pub const fn ftdf_lmac_control_1_reg(
232 &self,
233 ) -> &'static crate::common::Reg<self::FtdfLmacControl1Reg_SPEC, crate::common::RW> {
234 unsafe {
235 crate::common::Reg::<self::FtdfLmacControl1Reg_SPEC, crate::common::RW>::from_ptr(
236 self._svd2pac_as_ptr().add(65600usize),
237 )
238 }
239 }
240
241 #[doc = "Lmac control register"]
242 #[inline(always)]
243 pub const fn ftdf_lmac_control_2_reg(
244 &self,
245 ) -> &'static crate::common::Reg<self::FtdfLmacControl2Reg_SPEC, crate::common::RW> {
246 unsafe {
247 crate::common::Reg::<self::FtdfLmacControl2Reg_SPEC, crate::common::RW>::from_ptr(
248 self._svd2pac_as_ptr().add(65604usize),
249 )
250 }
251 }
252
253 #[doc = "Lmac control register"]
254 #[inline(always)]
255 pub const fn ftdf_lmac_control_3_reg(
256 &self,
257 ) -> &'static crate::common::Reg<self::FtdfLmacControl3Reg_SPEC, crate::common::RW> {
258 unsafe {
259 crate::common::Reg::<self::FtdfLmacControl3Reg_SPEC, crate::common::RW>::from_ptr(
260 self._svd2pac_as_ptr().add(65608usize),
261 )
262 }
263 }
264
265 #[doc = "Lmac control register"]
266 #[inline(always)]
267 pub const fn ftdf_lmac_control_4_reg(
268 &self,
269 ) -> &'static crate::common::Reg<self::FtdfLmacControl4Reg_SPEC, crate::common::RW> {
270 unsafe {
271 crate::common::Reg::<self::FtdfLmacControl4Reg_SPEC, crate::common::RW>::from_ptr(
272 self._svd2pac_as_ptr().add(65632usize),
273 )
274 }
275 }
276
277 #[doc = "Lmac control register"]
278 #[inline(always)]
279 pub const fn ftdf_lmac_control_5_reg(
280 &self,
281 ) -> &'static crate::common::Reg<self::FtdfLmacControl5Reg_SPEC, crate::common::RW> {
282 unsafe {
283 crate::common::Reg::<self::FtdfLmacControl5Reg_SPEC, crate::common::RW>::from_ptr(
284 self._svd2pac_as_ptr().add(65636usize),
285 )
286 }
287 }
288
289 #[doc = "Lmac control register"]
290 #[inline(always)]
291 pub const fn ftdf_lmac_control_6_reg(
292 &self,
293 ) -> &'static crate::common::Reg<self::FtdfLmacControl6Reg_SPEC, crate::common::RW> {
294 unsafe {
295 crate::common::Reg::<self::FtdfLmacControl6Reg_SPEC, crate::common::RW>::from_ptr(
296 self._svd2pac_as_ptr().add(65640usize),
297 )
298 }
299 }
300
301 #[doc = "Lmac control register"]
302 #[inline(always)]
303 pub const fn ftdf_lmac_control_7_reg(
304 &self,
305 ) -> &'static crate::common::Reg<self::FtdfLmacControl7Reg_SPEC, crate::common::RW> {
306 unsafe {
307 crate::common::Reg::<self::FtdfLmacControl7Reg_SPEC, crate::common::RW>::from_ptr(
308 self._svd2pac_as_ptr().add(65792usize),
309 )
310 }
311 }
312
313 #[doc = "Lmac control register"]
314 #[inline(always)]
315 pub const fn ftdf_lmac_control_8_reg(
316 &self,
317 ) -> &'static crate::common::Reg<self::FtdfLmacControl8Reg_SPEC, crate::common::RW> {
318 unsafe {
319 crate::common::Reg::<self::FtdfLmacControl8Reg_SPEC, crate::common::RW>::from_ptr(
320 self._svd2pac_as_ptr().add(65796usize),
321 )
322 }
323 }
324
325 #[doc = "Lmac control register"]
326 #[inline(always)]
327 pub const fn ftdf_lmac_control_9_reg(
328 &self,
329 ) -> &'static crate::common::Reg<self::FtdfLmacControl9Reg_SPEC, crate::common::RW> {
330 unsafe {
331 crate::common::Reg::<self::FtdfLmacControl9Reg_SPEC, crate::common::RW>::from_ptr(
332 self._svd2pac_as_ptr().add(65800usize),
333 )
334 }
335 }
336
337 #[doc = "Lmac delta control register"]
338 #[inline(always)]
339 pub const fn ftdf_lmac_control_delta_reg(
340 &self,
341 ) -> &'static crate::common::Reg<self::FtdfLmacControlDeltaReg_SPEC, crate::common::RW> {
342 unsafe {
343 crate::common::Reg::<self::FtdfLmacControlDeltaReg_SPEC, crate::common::RW>::from_ptr(
344 self._svd2pac_as_ptr().add(65648usize),
345 )
346 }
347 }
348
349 #[doc = "Lmac mask control register"]
350 #[inline(always)]
351 pub const fn ftdf_lmac_control_mask_reg(
352 &self,
353 ) -> &'static crate::common::Reg<self::FtdfLmacControlMaskReg_SPEC, crate::common::RW> {
354 unsafe {
355 crate::common::Reg::<self::FtdfLmacControlMaskReg_SPEC, crate::common::RW>::from_ptr(
356 self._svd2pac_as_ptr().add(65664usize),
357 )
358 }
359 }
360
361 #[doc = "Lmac control register"]
362 #[inline(always)]
363 pub const fn ftdf_lmac_control_os_reg(
364 &self,
365 ) -> &'static crate::common::Reg<self::FtdfLmacControlOsReg_SPEC, crate::common::RW> {
366 unsafe {
367 crate::common::Reg::<self::FtdfLmacControlOsReg_SPEC, crate::common::RW>::from_ptr(
368 self._svd2pac_as_ptr().add(65616usize),
369 )
370 }
371 }
372
373 #[doc = "Lmac status register"]
374 #[inline(always)]
375 pub const fn ftdf_lmac_control_status_reg(
376 &self,
377 ) -> &'static crate::common::Reg<self::FtdfLmacControlStatusReg_SPEC, crate::common::RW> {
378 unsafe {
379 crate::common::Reg::<self::FtdfLmacControlStatusReg_SPEC, crate::common::RW>::from_ptr(
380 self._svd2pac_as_ptr().add(65620usize),
381 )
382 }
383 }
384
385 #[doc = "Lmac event regsiter"]
386 #[inline(always)]
387 pub const fn ftdf_lmac_event_reg(
388 &self,
389 ) -> &'static crate::common::Reg<self::FtdfLmacEventReg_SPEC, crate::common::RW> {
390 unsafe {
391 crate::common::Reg::<self::FtdfLmacEventReg_SPEC, crate::common::RW>::from_ptr(
392 self._svd2pac_as_ptr().add(65680usize),
393 )
394 }
395 }
396
397 #[doc = "Lmax manual PHY register"]
398 #[inline(always)]
399 pub const fn ftdf_lmac_manual_1_reg(
400 &self,
401 ) -> &'static crate::common::Reg<self::FtdfLmacManual1Reg_SPEC, crate::common::RW> {
402 unsafe {
403 crate::common::Reg::<self::FtdfLmacManual1Reg_SPEC, crate::common::RW>::from_ptr(
404 self._svd2pac_as_ptr().add(65696usize),
405 )
406 }
407 }
408
409 #[doc = "One shot register triggers transmission in manual mode"]
410 #[inline(always)]
411 pub const fn ftdf_lmac_manual_os_reg(
412 &self,
413 ) -> &'static crate::common::Reg<self::FtdfLmacManualOsReg_SPEC, crate::common::RW> {
414 unsafe {
415 crate::common::Reg::<self::FtdfLmacManualOsReg_SPEC, crate::common::RW>::from_ptr(
416 self._svd2pac_as_ptr().add(65700usize),
417 )
418 }
419 }
420
421 #[doc = "Lmac status register in manual mode"]
422 #[inline(always)]
423 pub const fn ftdf_lmac_manual_status_reg(
424 &self,
425 ) -> &'static crate::common::Reg<self::FtdfLmacManualStatusReg_SPEC, crate::common::RW> {
426 unsafe {
427 crate::common::Reg::<self::FtdfLmacManualStatusReg_SPEC, crate::common::RW>::from_ptr(
428 self._svd2pac_as_ptr().add(65704usize),
429 )
430 }
431 }
432
433 #[doc = "Lmac mask register"]
434 #[inline(always)]
435 pub const fn ftdf_lmac_mask_reg(
436 &self,
437 ) -> &'static crate::common::Reg<self::FtdfLmacMaskReg_SPEC, crate::common::RW> {
438 unsafe {
439 crate::common::Reg::<self::FtdfLmacMaskReg_SPEC, crate::common::RW>::from_ptr(
440 self._svd2pac_as_ptr().add(65684usize),
441 )
442 }
443 }
444
445 #[doc = "Maximum time to wait for a ACK"]
446 #[inline(always)]
447 pub const fn ftdf_macackwaitduration_reg(
448 &self,
449 ) -> &'static crate::common::Reg<self::FtdfMacackwaitdurationReg_SPEC, crate::common::RW> {
450 unsafe {
451 crate::common::Reg::<self::FtdfMacackwaitdurationReg_SPEC, crate::common::RW>::from_ptr(
452 self._svd2pac_as_ptr().add(65592usize),
453 )
454 }
455 }
456
457 #[doc = "Maximum time to wait for an enhanced ACK frame"]
458 #[inline(always)]
459 pub const fn ftdf_macenhackwaitduration_reg(
460 &self,
461 ) -> &'static crate::common::Reg<self::FtdfMacenhackwaitdurationReg_SPEC, crate::common::RW>
462 {
463 unsafe {
464 crate::common::Reg::<self::FtdfMacenhackwaitdurationReg_SPEC, crate::common::RW>::from_ptr(self._svd2pac_as_ptr().add(65596usize))
465 }
466 }
467
468 #[doc = "Lmac FCS error register"]
469 #[inline(always)]
470 pub const fn ftdf_macfcserrorcount_reg(
471 &self,
472 ) -> &'static crate::common::Reg<self::FtdfMacfcserrorcountReg_SPEC, crate::common::RW> {
473 unsafe {
474 crate::common::Reg::<self::FtdfMacfcserrorcountReg_SPEC, crate::common::RW>::from_ptr(
475 self._svd2pac_as_ptr().add(66368usize),
476 )
477 }
478 }
479
480 #[doc = "Discarded frames register"]
481 #[inline(always)]
482 pub const fn ftdf_macrxaddrfailfrmcnt_reg(
483 &self,
484 ) -> &'static crate::common::Reg<self::FtdfMacrxaddrfailfrmcntReg_SPEC, crate::common::RW> {
485 unsafe {
486 crate::common::Reg::<self::FtdfMacrxaddrfailfrmcntReg_SPEC, crate::common::RW>::from_ptr(
487 self._svd2pac_as_ptr().add(66328usize),
488 )
489 }
490 }
491
492 #[doc = "Received acknowledgment frames"]
493 #[inline(always)]
494 pub const fn ftdf_macrxstdackfrmokcnt_reg(
495 &self,
496 ) -> &'static crate::common::Reg<self::FtdfMacrxstdackfrmokcntReg_SPEC, crate::common::RW> {
497 unsafe {
498 crate::common::Reg::<self::FtdfMacrxstdackfrmokcntReg_SPEC, crate::common::RW>::from_ptr(
499 self._svd2pac_as_ptr().add(66324usize),
500 )
501 }
502 }
503
504 #[doc = "Unsupported frames register"]
505 #[inline(always)]
506 pub const fn ftdf_macrxunsupfrmcnt_reg(
507 &self,
508 ) -> &'static crate::common::Reg<self::FtdfMacrxunsupfrmcntReg_SPEC, crate::common::RW> {
509 unsafe {
510 crate::common::Reg::<self::FtdfMacrxunsupfrmcntReg_SPEC, crate::common::RW>::from_ptr(
511 self._svd2pac_as_ptr().add(66332usize),
512 )
513 }
514 }
515
516 #[doc = "Time left until next ACK is sent (us)"]
517 #[inline(always)]
518 pub const fn ftdf_mactstxackdelayval_reg(
519 &self,
520 ) -> &'static crate::common::Reg<self::FtdfMactstxackdelayvalReg_SPEC, crate::common::RW> {
521 unsafe {
522 crate::common::Reg::<self::FtdfMactstxackdelayvalReg_SPEC, crate::common::RW>::from_ptr(
523 self._svd2pac_as_ptr().add(65656usize),
524 )
525 }
526 }
527
528 #[doc = "Transmitted acknowledgment frames"]
529 #[inline(always)]
530 pub const fn ftdf_mactxstdackfrmcnt_reg(
531 &self,
532 ) -> &'static crate::common::Reg<self::FtdfMactxstdackfrmcntReg_SPEC, crate::common::RW> {
533 unsafe {
534 crate::common::Reg::<self::FtdfMactxstdackfrmcntReg_SPEC, crate::common::RW>::from_ptr(
535 self._svd2pac_as_ptr().add(66320usize),
536 )
537 }
538 }
539
540 #[doc = "Lmac PHY parameter register"]
541 #[inline(always)]
542 pub const fn ftdf_phy_parameters_0_reg(
543 &self,
544 ) -> &'static crate::common::Reg<self::FtdfPhyParameters0Reg_SPEC, crate::common::RW> {
545 unsafe {
546 crate::common::Reg::<self::FtdfPhyParameters0Reg_SPEC, crate::common::RW>::from_ptr(
547 self._svd2pac_as_ptr().add(65920usize),
548 )
549 }
550 }
551
552 #[doc = "Lmac PHY parameter register"]
553 #[inline(always)]
554 pub const fn ftdf_phy_parameters_1_reg(
555 &self,
556 ) -> &'static crate::common::Reg<self::FtdfPhyParameters1Reg_SPEC, crate::common::RW> {
557 unsafe {
558 crate::common::Reg::<self::FtdfPhyParameters1Reg_SPEC, crate::common::RW>::from_ptr(
559 self._svd2pac_as_ptr().add(65924usize),
560 )
561 }
562 }
563
564 #[doc = "Lmac PHY parameter register"]
565 #[inline(always)]
566 pub const fn ftdf_phy_parameters_2_reg(
567 &self,
568 ) -> &'static crate::common::Reg<self::FtdfPhyParameters2Reg_SPEC, crate::common::RW> {
569 unsafe {
570 crate::common::Reg::<self::FtdfPhyParameters2Reg_SPEC, crate::common::RW>::from_ptr(
571 self._svd2pac_as_ptr().add(65928usize),
572 )
573 }
574 }
575
576 #[doc = "Lmac PHY parameter register"]
577 #[inline(always)]
578 pub const fn ftdf_phy_parameters_3_reg(
579 &self,
580 ) -> &'static crate::common::Reg<self::FtdfPhyParameters3Reg_SPEC, crate::common::RW> {
581 unsafe {
582 crate::common::Reg::<self::FtdfPhyParameters3Reg_SPEC, crate::common::RW>::from_ptr(
583 self._svd2pac_as_ptr().add(65932usize),
584 )
585 }
586 }
587
588 #[doc = "Name of the release"]
589 #[inline(always)]
590 pub const fn ftdf_rel_name_0_reg(
591 &self,
592 ) -> &'static crate::common::Reg<self::FtdfRelName0Reg_SPEC, crate::common::RW> {
593 unsafe {
594 crate::common::Reg::<self::FtdfRelName0Reg_SPEC, crate::common::RW>::from_ptr(
595 self._svd2pac_as_ptr().add(65536usize),
596 )
597 }
598 }
599
600 #[doc = "Name of the release"]
601 #[inline(always)]
602 pub const fn ftdf_rel_name_1_reg(
603 &self,
604 ) -> &'static crate::common::Reg<self::FtdfRelName1Reg_SPEC, crate::common::RW> {
605 unsafe {
606 crate::common::Reg::<self::FtdfRelName1Reg_SPEC, crate::common::RW>::from_ptr(
607 self._svd2pac_as_ptr().add(65540usize),
608 )
609 }
610 }
611
612 #[doc = "Name of the release"]
613 #[inline(always)]
614 pub const fn ftdf_rel_name_2_reg(
615 &self,
616 ) -> &'static crate::common::Reg<self::FtdfRelName2Reg_SPEC, crate::common::RW> {
617 unsafe {
618 crate::common::Reg::<self::FtdfRelName2Reg_SPEC, crate::common::RW>::from_ptr(
619 self._svd2pac_as_ptr().add(65544usize),
620 )
621 }
622 }
623
624 #[doc = "Name of the release"]
625 #[inline(always)]
626 pub const fn ftdf_rel_name_3_reg(
627 &self,
628 ) -> &'static crate::common::Reg<self::FtdfRelName3Reg_SPEC, crate::common::RW> {
629 unsafe {
630 crate::common::Reg::<self::FtdfRelName3Reg_SPEC, crate::common::RW>::from_ptr(
631 self._svd2pac_as_ptr().add(65548usize),
632 )
633 }
634 }
635
636 #[doc = "Receive control register"]
637 #[inline(always)]
638 pub const fn ftdf_rx_control_0_reg(
639 &self,
640 ) -> &'static crate::common::Reg<self::FtdfRxControl0Reg_SPEC, crate::common::RW> {
641 unsafe {
642 crate::common::Reg::<self::FtdfRxControl0Reg_SPEC, crate::common::RW>::from_ptr(
643 self._svd2pac_as_ptr().add(66048usize),
644 )
645 }
646 }
647
648 #[doc = "Receive event register"]
649 #[inline(always)]
650 pub const fn ftdf_rx_event_reg(
651 &self,
652 ) -> &'static crate::common::Reg<self::FtdfRxEventReg_SPEC, crate::common::RW> {
653 unsafe {
654 crate::common::Reg::<self::FtdfRxEventReg_SPEC, crate::common::RW>::from_ptr(
655 self._svd2pac_as_ptr().add(66052usize),
656 )
657 }
658 }
659
660 #[doc = "Address receive fifo 0"]
661 #[inline(always)]
662 pub const fn ftdf_rx_fifo_0_0_reg(
663 &self,
664 ) -> &'static crate::common::Reg<self::FtdfRxFifo00Reg_SPEC, crate::common::RW> {
665 unsafe {
666 crate::common::Reg::<self::FtdfRxFifo00Reg_SPEC, crate::common::RW>::from_ptr(
667 self._svd2pac_as_ptr().add(32768usize),
668 )
669 }
670 }
671
672 #[doc = "Address transmit fifo 1"]
673 #[inline(always)]
674 pub const fn ftdf_rx_fifo_1_0_reg(
675 &self,
676 ) -> &'static crate::common::Reg<self::FtdfRxFifo10Reg_SPEC, crate::common::RW> {
677 unsafe {
678 crate::common::Reg::<self::FtdfRxFifo10Reg_SPEC, crate::common::RW>::from_ptr(
679 self._svd2pac_as_ptr().add(32896usize),
680 )
681 }
682 }
683
684 #[doc = "Address transmit fifo 2"]
685 #[inline(always)]
686 pub const fn ftdf_rx_fifo_2_0_reg(
687 &self,
688 ) -> &'static crate::common::Reg<self::FtdfRxFifo20Reg_SPEC, crate::common::RW> {
689 unsafe {
690 crate::common::Reg::<self::FtdfRxFifo20Reg_SPEC, crate::common::RW>::from_ptr(
691 self._svd2pac_as_ptr().add(33024usize),
692 )
693 }
694 }
695
696 #[doc = "Address transmit fifo 3"]
697 #[inline(always)]
698 pub const fn ftdf_rx_fifo_3_0_reg(
699 &self,
700 ) -> &'static crate::common::Reg<self::FtdfRxFifo30Reg_SPEC, crate::common::RW> {
701 unsafe {
702 crate::common::Reg::<self::FtdfRxFifo30Reg_SPEC, crate::common::RW>::from_ptr(
703 self._svd2pac_as_ptr().add(33152usize),
704 )
705 }
706 }
707
708 #[doc = "Address transmit fifo 4"]
709 #[inline(always)]
710 pub const fn ftdf_rx_fifo_4_0_reg(
711 &self,
712 ) -> &'static crate::common::Reg<self::FtdfRxFifo40Reg_SPEC, crate::common::RW> {
713 unsafe {
714 crate::common::Reg::<self::FtdfRxFifo40Reg_SPEC, crate::common::RW>::from_ptr(
715 self._svd2pac_as_ptr().add(33280usize),
716 )
717 }
718 }
719
720 #[doc = "Address transmit fifo 5"]
721 #[inline(always)]
722 pub const fn ftdf_rx_fifo_5_0_reg(
723 &self,
724 ) -> &'static crate::common::Reg<self::FtdfRxFifo50Reg_SPEC, crate::common::RW> {
725 unsafe {
726 crate::common::Reg::<self::FtdfRxFifo50Reg_SPEC, crate::common::RW>::from_ptr(
727 self._svd2pac_as_ptr().add(33408usize),
728 )
729 }
730 }
731
732 #[doc = "Address transmit fifo 6"]
733 #[inline(always)]
734 pub const fn ftdf_rx_fifo_6_0_reg(
735 &self,
736 ) -> &'static crate::common::Reg<self::FtdfRxFifo60Reg_SPEC, crate::common::RW> {
737 unsafe {
738 crate::common::Reg::<self::FtdfRxFifo60Reg_SPEC, crate::common::RW>::from_ptr(
739 self._svd2pac_as_ptr().add(33536usize),
740 )
741 }
742 }
743
744 #[doc = "Address transmit fifo 7"]
745 #[inline(always)]
746 pub const fn ftdf_rx_fifo_7_0_reg(
747 &self,
748 ) -> &'static crate::common::Reg<self::FtdfRxFifo70Reg_SPEC, crate::common::RW> {
749 unsafe {
750 crate::common::Reg::<self::FtdfRxFifo70Reg_SPEC, crate::common::RW>::from_ptr(
751 self._svd2pac_as_ptr().add(33664usize),
752 )
753 }
754 }
755
756 #[doc = "Receive event mask register"]
757 #[inline(always)]
758 pub const fn ftdf_rx_mask_reg(
759 &self,
760 ) -> &'static crate::common::Reg<self::FtdfRxMaskReg_SPEC, crate::common::RW> {
761 unsafe {
762 crate::common::Reg::<self::FtdfRxMaskReg_SPEC, crate::common::RW>::from_ptr(
763 self._svd2pac_as_ptr().add(66056usize),
764 )
765 }
766 }
767
768 #[doc = "Receive metadata register 0"]
769 #[inline(always)]
770 pub const fn ftdf_rx_meta_0_0_reg(
771 &self,
772 ) -> &'static crate::common::Reg<self::FtdfRxMeta00Reg_SPEC, crate::common::RW> {
773 unsafe {
774 crate::common::Reg::<self::FtdfRxMeta00Reg_SPEC, crate::common::RW>::from_ptr(
775 self._svd2pac_as_ptr().add(640usize),
776 )
777 }
778 }
779
780 #[doc = "Receive metadata register 1"]
781 #[inline(always)]
782 pub const fn ftdf_rx_meta_0_1_reg(
783 &self,
784 ) -> &'static crate::common::Reg<self::FtdfRxMeta01Reg_SPEC, crate::common::RW> {
785 unsafe {
786 crate::common::Reg::<self::FtdfRxMeta01Reg_SPEC, crate::common::RW>::from_ptr(
787 self._svd2pac_as_ptr().add(656usize),
788 )
789 }
790 }
791
792 #[doc = "Receive metadata register 2"]
793 #[inline(always)]
794 pub const fn ftdf_rx_meta_0_2_reg(
795 &self,
796 ) -> &'static crate::common::Reg<self::FtdfRxMeta02Reg_SPEC, crate::common::RW> {
797 unsafe {
798 crate::common::Reg::<self::FtdfRxMeta02Reg_SPEC, crate::common::RW>::from_ptr(
799 self._svd2pac_as_ptr().add(672usize),
800 )
801 }
802 }
803
804 #[doc = "Receive metadata register 3"]
805 #[inline(always)]
806 pub const fn ftdf_rx_meta_0_3_reg(
807 &self,
808 ) -> &'static crate::common::Reg<self::FtdfRxMeta03Reg_SPEC, crate::common::RW> {
809 unsafe {
810 crate::common::Reg::<self::FtdfRxMeta03Reg_SPEC, crate::common::RW>::from_ptr(
811 self._svd2pac_as_ptr().add(688usize),
812 )
813 }
814 }
815
816 #[doc = "Receive metadata register 4"]
817 #[inline(always)]
818 pub const fn ftdf_rx_meta_0_4_reg(
819 &self,
820 ) -> &'static crate::common::Reg<self::FtdfRxMeta04Reg_SPEC, crate::common::RW> {
821 unsafe {
822 crate::common::Reg::<self::FtdfRxMeta04Reg_SPEC, crate::common::RW>::from_ptr(
823 self._svd2pac_as_ptr().add(704usize),
824 )
825 }
826 }
827
828 #[doc = "Receive metadata register 5"]
829 #[inline(always)]
830 pub const fn ftdf_rx_meta_0_5_reg(
831 &self,
832 ) -> &'static crate::common::Reg<self::FtdfRxMeta05Reg_SPEC, crate::common::RW> {
833 unsafe {
834 crate::common::Reg::<self::FtdfRxMeta05Reg_SPEC, crate::common::RW>::from_ptr(
835 self._svd2pac_as_ptr().add(720usize),
836 )
837 }
838 }
839
840 #[doc = "Receive metadata register 6"]
841 #[inline(always)]
842 pub const fn ftdf_rx_meta_0_6_reg(
843 &self,
844 ) -> &'static crate::common::Reg<self::FtdfRxMeta06Reg_SPEC, crate::common::RW> {
845 unsafe {
846 crate::common::Reg::<self::FtdfRxMeta06Reg_SPEC, crate::common::RW>::from_ptr(
847 self._svd2pac_as_ptr().add(736usize),
848 )
849 }
850 }
851
852 #[doc = "Receive metadata register 7"]
853 #[inline(always)]
854 pub const fn ftdf_rx_meta_0_7_reg(
855 &self,
856 ) -> &'static crate::common::Reg<self::FtdfRxMeta07Reg_SPEC, crate::common::RW> {
857 unsafe {
858 crate::common::Reg::<self::FtdfRxMeta07Reg_SPEC, crate::common::RW>::from_ptr(
859 self._svd2pac_as_ptr().add(752usize),
860 )
861 }
862 }
863
864 #[doc = "Receive metadata register 0"]
865 #[inline(always)]
866 pub const fn ftdf_rx_meta_1_0_reg(
867 &self,
868 ) -> &'static crate::common::Reg<self::FtdfRxMeta10Reg_SPEC, crate::common::RW> {
869 unsafe {
870 crate::common::Reg::<self::FtdfRxMeta10Reg_SPEC, crate::common::RW>::from_ptr(
871 self._svd2pac_as_ptr().add(644usize),
872 )
873 }
874 }
875
876 #[doc = "Receive metadata register 1"]
877 #[inline(always)]
878 pub const fn ftdf_rx_meta_1_1_reg(
879 &self,
880 ) -> &'static crate::common::Reg<self::FtdfRxMeta11Reg_SPEC, crate::common::RW> {
881 unsafe {
882 crate::common::Reg::<self::FtdfRxMeta11Reg_SPEC, crate::common::RW>::from_ptr(
883 self._svd2pac_as_ptr().add(660usize),
884 )
885 }
886 }
887
888 #[doc = "Receive metadata register 2"]
889 #[inline(always)]
890 pub const fn ftdf_rx_meta_1_2_reg(
891 &self,
892 ) -> &'static crate::common::Reg<self::FtdfRxMeta12Reg_SPEC, crate::common::RW> {
893 unsafe {
894 crate::common::Reg::<self::FtdfRxMeta12Reg_SPEC, crate::common::RW>::from_ptr(
895 self._svd2pac_as_ptr().add(676usize),
896 )
897 }
898 }
899
900 #[doc = "Receive metadata register 3"]
901 #[inline(always)]
902 pub const fn ftdf_rx_meta_1_3_reg(
903 &self,
904 ) -> &'static crate::common::Reg<self::FtdfRxMeta13Reg_SPEC, crate::common::RW> {
905 unsafe {
906 crate::common::Reg::<self::FtdfRxMeta13Reg_SPEC, crate::common::RW>::from_ptr(
907 self._svd2pac_as_ptr().add(692usize),
908 )
909 }
910 }
911
912 #[doc = "Receive metadata register 4"]
913 #[inline(always)]
914 pub const fn ftdf_rx_meta_1_4_reg(
915 &self,
916 ) -> &'static crate::common::Reg<self::FtdfRxMeta14Reg_SPEC, crate::common::RW> {
917 unsafe {
918 crate::common::Reg::<self::FtdfRxMeta14Reg_SPEC, crate::common::RW>::from_ptr(
919 self._svd2pac_as_ptr().add(708usize),
920 )
921 }
922 }
923
924 #[doc = "Receive metadata register 5"]
925 #[inline(always)]
926 pub const fn ftdf_rx_meta_1_5_reg(
927 &self,
928 ) -> &'static crate::common::Reg<self::FtdfRxMeta15Reg_SPEC, crate::common::RW> {
929 unsafe {
930 crate::common::Reg::<self::FtdfRxMeta15Reg_SPEC, crate::common::RW>::from_ptr(
931 self._svd2pac_as_ptr().add(724usize),
932 )
933 }
934 }
935
936 #[doc = "Receive metadata register 6"]
937 #[inline(always)]
938 pub const fn ftdf_rx_meta_1_6_reg(
939 &self,
940 ) -> &'static crate::common::Reg<self::FtdfRxMeta16Reg_SPEC, crate::common::RW> {
941 unsafe {
942 crate::common::Reg::<self::FtdfRxMeta16Reg_SPEC, crate::common::RW>::from_ptr(
943 self._svd2pac_as_ptr().add(740usize),
944 )
945 }
946 }
947
948 #[doc = "Receive metadata register 7"]
949 #[inline(always)]
950 pub const fn ftdf_rx_meta_1_7_reg(
951 &self,
952 ) -> &'static crate::common::Reg<self::FtdfRxMeta17Reg_SPEC, crate::common::RW> {
953 unsafe {
954 crate::common::Reg::<self::FtdfRxMeta17Reg_SPEC, crate::common::RW>::from_ptr(
955 self._svd2pac_as_ptr().add(756usize),
956 )
957 }
958 }
959
960 #[doc = "Receive status delta register"]
961 #[inline(always)]
962 pub const fn ftdf_rx_status_delta_reg(
963 &self,
964 ) -> &'static crate::common::Reg<self::FtdfRxStatusDeltaReg_SPEC, crate::common::RW> {
965 unsafe {
966 crate::common::Reg::<self::FtdfRxStatusDeltaReg_SPEC, crate::common::RW>::from_ptr(
967 self._svd2pac_as_ptr().add(66080usize),
968 )
969 }
970 }
971
972 #[doc = "Receive status delta mask register"]
973 #[inline(always)]
974 pub const fn ftdf_rx_status_mask_reg(
975 &self,
976 ) -> &'static crate::common::Reg<self::FtdfRxStatusMaskReg_SPEC, crate::common::RW> {
977 unsafe {
978 crate::common::Reg::<self::FtdfRxStatusMaskReg_SPEC, crate::common::RW>::from_ptr(
979 self._svd2pac_as_ptr().add(66084usize),
980 )
981 }
982 }
983
984 #[doc = "Receive status register"]
985 #[inline(always)]
986 pub const fn ftdf_rx_status_reg(
987 &self,
988 ) -> &'static crate::common::Reg<self::FtdfRxStatusReg_SPEC, crate::common::RW> {
989 unsafe {
990 crate::common::Reg::<self::FtdfRxStatusReg_SPEC, crate::common::RW>::from_ptr(
991 self._svd2pac_as_ptr().add(66060usize),
992 )
993 }
994 }
995
996 #[doc = "Seckey register"]
997 #[inline(always)]
998 pub const fn ftdf_seckey_0_reg(
999 &self,
1000 ) -> &'static crate::common::Reg<self::FtdfSeckey0Reg_SPEC, crate::common::RW> {
1001 unsafe {
1002 crate::common::Reg::<self::FtdfSeckey0Reg_SPEC, crate::common::RW>::from_ptr(
1003 self._svd2pac_as_ptr().add(65816usize),
1004 )
1005 }
1006 }
1007
1008 #[doc = "Seckey register"]
1009 #[inline(always)]
1010 pub const fn ftdf_seckey_1_reg(
1011 &self,
1012 ) -> &'static crate::common::Reg<self::FtdfSeckey1Reg_SPEC, crate::common::RW> {
1013 unsafe {
1014 crate::common::Reg::<self::FtdfSeckey1Reg_SPEC, crate::common::RW>::from_ptr(
1015 self._svd2pac_as_ptr().add(65820usize),
1016 )
1017 }
1018 }
1019
1020 #[doc = "SecKey register"]
1021 #[inline(always)]
1022 pub const fn ftdf_seckey_2_reg(
1023 &self,
1024 ) -> &'static crate::common::Reg<self::FtdfSeckey2Reg_SPEC, crate::common::RW> {
1025 unsafe {
1026 crate::common::Reg::<self::FtdfSeckey2Reg_SPEC, crate::common::RW>::from_ptr(
1027 self._svd2pac_as_ptr().add(65824usize),
1028 )
1029 }
1030 }
1031
1032 #[doc = "Seckey register"]
1033 #[inline(always)]
1034 pub const fn ftdf_seckey_3_reg(
1035 &self,
1036 ) -> &'static crate::common::Reg<self::FtdfSeckey3Reg_SPEC, crate::common::RW> {
1037 unsafe {
1038 crate::common::Reg::<self::FtdfSeckey3Reg_SPEC, crate::common::RW>::from_ptr(
1039 self._svd2pac_as_ptr().add(65828usize),
1040 )
1041 }
1042 }
1043
1044 #[doc = "Nonce register used for encryption/decryption"]
1045 #[inline(always)]
1046 pub const fn ftdf_secnonce_0_reg(
1047 &self,
1048 ) -> &'static crate::common::Reg<self::FtdfSecnonce0Reg_SPEC, crate::common::RW> {
1049 unsafe {
1050 crate::common::Reg::<self::FtdfSecnonce0Reg_SPEC, crate::common::RW>::from_ptr(
1051 self._svd2pac_as_ptr().add(65832usize),
1052 )
1053 }
1054 }
1055
1056 #[doc = "Nonce register used for encryption/decryption"]
1057 #[inline(always)]
1058 pub const fn ftdf_secnonce_1_reg(
1059 &self,
1060 ) -> &'static crate::common::Reg<self::FtdfSecnonce1Reg_SPEC, crate::common::RW> {
1061 unsafe {
1062 crate::common::Reg::<self::FtdfSecnonce1Reg_SPEC, crate::common::RW>::from_ptr(
1063 self._svd2pac_as_ptr().add(65836usize),
1064 )
1065 }
1066 }
1067
1068 #[doc = "Nonce register used for encryption/decryption"]
1069 #[inline(always)]
1070 pub const fn ftdf_secnonce_2_reg(
1071 &self,
1072 ) -> &'static crate::common::Reg<self::FtdfSecnonce2Reg_SPEC, crate::common::RW> {
1073 unsafe {
1074 crate::common::Reg::<self::FtdfSecnonce2Reg_SPEC, crate::common::RW>::from_ptr(
1075 self._svd2pac_as_ptr().add(65840usize),
1076 )
1077 }
1078 }
1079
1080 #[doc = "Nonce register used for encryption/decryption"]
1081 #[inline(always)]
1082 pub const fn ftdf_secnonce_3_reg(
1083 &self,
1084 ) -> &'static crate::common::Reg<self::FtdfSecnonce3Reg_SPEC, crate::common::RW> {
1085 unsafe {
1086 crate::common::Reg::<self::FtdfSecnonce3Reg_SPEC, crate::common::RW>::from_ptr(
1087 self._svd2pac_as_ptr().add(65844usize),
1088 )
1089 }
1090 }
1091
1092 #[doc = "Security register"]
1093 #[inline(always)]
1094 pub const fn ftdf_security_0_reg(
1095 &self,
1096 ) -> &'static crate::common::Reg<self::FtdfSecurity0Reg_SPEC, crate::common::RW> {
1097 unsafe {
1098 crate::common::Reg::<self::FtdfSecurity0Reg_SPEC, crate::common::RW>::from_ptr(
1099 self._svd2pac_as_ptr().add(65808usize),
1100 )
1101 }
1102 }
1103
1104 #[doc = "Security register"]
1105 #[inline(always)]
1106 pub const fn ftdf_security_1_reg(
1107 &self,
1108 ) -> &'static crate::common::Reg<self::FtdfSecurity1Reg_SPEC, crate::common::RW> {
1109 unsafe {
1110 crate::common::Reg::<self::FtdfSecurity1Reg_SPEC, crate::common::RW>::from_ptr(
1111 self._svd2pac_as_ptr().add(65812usize),
1112 )
1113 }
1114 }
1115
1116 #[doc = "security event mask register"]
1117 #[inline(always)]
1118 pub const fn ftdf_security_eventmask_reg(
1119 &self,
1120 ) -> &'static crate::common::Reg<self::FtdfSecurityEventmaskReg_SPEC, crate::common::RW> {
1121 unsafe {
1122 crate::common::Reg::<self::FtdfSecurityEventmaskReg_SPEC, crate::common::RW>::from_ptr(
1123 self._svd2pac_as_ptr().add(65876usize),
1124 )
1125 }
1126 }
1127
1128 #[doc = "security event register"]
1129 #[inline(always)]
1130 pub const fn ftdf_security_event_reg(
1131 &self,
1132 ) -> &'static crate::common::Reg<self::FtdfSecurityEventReg_SPEC, crate::common::RW> {
1133 unsafe {
1134 crate::common::Reg::<self::FtdfSecurityEventReg_SPEC, crate::common::RW>::from_ptr(
1135 self._svd2pac_as_ptr().add(65872usize),
1136 )
1137 }
1138 }
1139
1140 #[doc = "One shot register to start encryption/decryption"]
1141 #[inline(always)]
1142 pub const fn ftdf_security_os_reg(
1143 &self,
1144 ) -> &'static crate::common::Reg<self::FtdfSecurityOsReg_SPEC, crate::common::RW> {
1145 unsafe {
1146 crate::common::Reg::<self::FtdfSecurityOsReg_SPEC, crate::common::RW>::from_ptr(
1147 self._svd2pac_as_ptr().add(65848usize),
1148 )
1149 }
1150 }
1151
1152 #[doc = "Security status register"]
1153 #[inline(always)]
1154 pub const fn ftdf_security_status_reg(
1155 &self,
1156 ) -> &'static crate::common::Reg<self::FtdfSecurityStatusReg_SPEC, crate::common::RW> {
1157 unsafe {
1158 crate::common::Reg::<self::FtdfSecurityStatusReg_SPEC, crate::common::RW>::from_ptr(
1159 self._svd2pac_as_ptr().add(65856usize),
1160 )
1161 }
1162 }
1163
1164 #[doc = "Symboltime threshold register 2"]
1165 #[inline(always)]
1166 pub const fn ftdf_symboltime2thr_reg(
1167 &self,
1168 ) -> &'static crate::common::Reg<self::FtdfSymboltime2ThrReg_SPEC, crate::common::RW> {
1169 unsafe {
1170 crate::common::Reg::<self::FtdfSymboltime2ThrReg_SPEC, crate::common::RW>::from_ptr(
1171 self._svd2pac_as_ptr().add(66436usize),
1172 )
1173 }
1174 }
1175
1176 #[doc = "Value timestamp generator"]
1177 #[inline(always)]
1178 pub const fn ftdf_symboltimesnapshotval_reg(
1179 &self,
1180 ) -> &'static crate::common::Reg<self::FtdfSymboltimesnapshotvalReg_SPEC, crate::common::RW>
1181 {
1182 unsafe {
1183 crate::common::Reg::<self::FtdfSymboltimesnapshotvalReg_SPEC, crate::common::RW>::from_ptr(self._svd2pac_as_ptr().add(66064usize))
1184 }
1185 }
1186
1187 #[doc = "Symboltime threshold register 1"]
1188 #[inline(always)]
1189 pub const fn ftdf_symboltimethr_reg(
1190 &self,
1191 ) -> &'static crate::common::Reg<self::FtdfSymboltimethrReg_SPEC, crate::common::RW> {
1192 unsafe {
1193 crate::common::Reg::<self::FtdfSymboltimethrReg_SPEC, crate::common::RW>::from_ptr(
1194 self._svd2pac_as_ptr().add(66432usize),
1195 )
1196 }
1197 }
1198
1199 #[doc = "Timestamp phase value regsiter"]
1200 #[inline(always)]
1201 pub const fn ftdf_synctimestampphaseval_reg(
1202 &self,
1203 ) -> &'static crate::common::Reg<self::FtdfSynctimestampphasevalReg_SPEC, crate::common::RW>
1204 {
1205 unsafe {
1206 crate::common::Reg::<self::FtdfSynctimestampphasevalReg_SPEC, crate::common::RW>::from_ptr(self._svd2pac_as_ptr().add(66336usize))
1207 }
1208 }
1209
1210 #[doc = "Threshold timestamp generator"]
1211 #[inline(always)]
1212 pub const fn ftdf_synctimestampthr_reg(
1213 &self,
1214 ) -> &'static crate::common::Reg<self::FtdfSynctimestampthrReg_SPEC, crate::common::RW> {
1215 unsafe {
1216 crate::common::Reg::<self::FtdfSynctimestampthrReg_SPEC, crate::common::RW>::from_ptr(
1217 self._svd2pac_as_ptr().add(66308usize),
1218 )
1219 }
1220 }
1221
1222 #[doc = "Value timestamp generator"]
1223 #[inline(always)]
1224 pub const fn ftdf_synctimestampval_reg(
1225 &self,
1226 ) -> &'static crate::common::Reg<self::FtdfSynctimestampvalReg_SPEC, crate::common::RW> {
1227 unsafe {
1228 crate::common::Reg::<self::FtdfSynctimestampvalReg_SPEC, crate::common::RW>::from_ptr(
1229 self._svd2pac_as_ptr().add(66312usize),
1230 )
1231 }
1232 }
1233
1234 #[doc = "Timer control register"]
1235 #[inline(always)]
1236 pub const fn ftdf_timer_control_1_reg(
1237 &self,
1238 ) -> &'static crate::common::Reg<self::FtdfTimerControl1Reg_SPEC, crate::common::RW> {
1239 unsafe {
1240 crate::common::Reg::<self::FtdfTimerControl1Reg_SPEC, crate::common::RW>::from_ptr(
1241 self._svd2pac_as_ptr().add(66316usize),
1242 )
1243 }
1244 }
1245
1246 #[doc = "Value of timestamp generator phase within a symbol"]
1247 #[inline(always)]
1248 pub const fn ftdf_timestampcurrphaseval_reg(
1249 &self,
1250 ) -> &'static crate::common::Reg<self::FtdfTimestampcurrphasevalReg_SPEC, crate::common::RW>
1251 {
1252 unsafe {
1253 crate::common::Reg::<self::FtdfTimestampcurrphasevalReg_SPEC, crate::common::RW>::from_ptr(self._svd2pac_as_ptr().add(65652usize))
1254 }
1255 }
1256
1257 #[doc = "Value of timestamp generator"]
1258 #[inline(always)]
1259 pub const fn ftdf_timestampcurrval_reg(
1260 &self,
1261 ) -> &'static crate::common::Reg<self::FtdfTimestampcurrvalReg_SPEC, crate::common::RW> {
1262 unsafe {
1263 crate::common::Reg::<self::FtdfTimestampcurrvalReg_SPEC, crate::common::RW>::from_ptr(
1264 self._svd2pac_as_ptr().add(65628usize),
1265 )
1266 }
1267 }
1268
1269 #[doc = "Lmac tsch control register"]
1270 #[inline(always)]
1271 pub const fn ftdf_tsch_control_0_reg(
1272 &self,
1273 ) -> &'static crate::common::Reg<self::FtdfTschControl0Reg_SPEC, crate::common::RW> {
1274 unsafe {
1275 crate::common::Reg::<self::FtdfTschControl0Reg_SPEC, crate::common::RW>::from_ptr(
1276 self._svd2pac_as_ptr().add(65888usize),
1277 )
1278 }
1279 }
1280
1281 #[doc = "Lmac tsch control register"]
1282 #[inline(always)]
1283 pub const fn ftdf_tsch_control_1_reg(
1284 &self,
1285 ) -> &'static crate::common::Reg<self::FtdfTschControl1Reg_SPEC, crate::common::RW> {
1286 unsafe {
1287 crate::common::Reg::<self::FtdfTschControl1Reg_SPEC, crate::common::RW>::from_ptr(
1288 self._svd2pac_as_ptr().add(65892usize),
1289 )
1290 }
1291 }
1292
1293 #[doc = "Lmac tsch control register"]
1294 #[inline(always)]
1295 pub const fn ftdf_tsch_control_2_reg(
1296 &self,
1297 ) -> &'static crate::common::Reg<self::FtdfTschControl2Reg_SPEC, crate::common::RW> {
1298 unsafe {
1299 crate::common::Reg::<self::FtdfTschControl2Reg_SPEC, crate::common::RW>::from_ptr(
1300 self._svd2pac_as_ptr().add(65896usize),
1301 )
1302 }
1303 }
1304
1305 #[doc = "Transmit first byte register"]
1306 #[inline(always)]
1307 pub const fn ftdf_txbyte_e_reg(
1308 &self,
1309 ) -> &'static crate::common::Reg<self::FtdfTxbyteEReg_SPEC, crate::common::RW> {
1310 unsafe {
1311 crate::common::Reg::<self::FtdfTxbyteEReg_SPEC, crate::common::RW>::from_ptr(
1312 self._svd2pac_as_ptr().add(66452usize),
1313 )
1314 }
1315 }
1316
1317 #[doc = "Transmit first byte mask register"]
1318 #[inline(always)]
1319 pub const fn ftdf_txbyte_m_reg(
1320 &self,
1321 ) -> &'static crate::common::Reg<self::FtdfTxbyteMReg_SPEC, crate::common::RW> {
1322 unsafe {
1323 crate::common::Reg::<self::FtdfTxbyteMReg_SPEC, crate::common::RW>::from_ptr(
1324 self._svd2pac_as_ptr().add(66456usize),
1325 )
1326 }
1327 }
1328
1329 #[doc = "Prop delay transmit register"]
1330 #[inline(always)]
1331 pub const fn ftdf_txpipepropdelay_reg(
1332 &self,
1333 ) -> &'static crate::common::Reg<self::FtdfTxpipepropdelayReg_SPEC, crate::common::RW> {
1334 unsafe {
1335 crate::common::Reg::<self::FtdfTxpipepropdelayReg_SPEC, crate::common::RW>::from_ptr(
1336 self._svd2pac_as_ptr().add(65588usize),
1337 )
1338 }
1339 }
1340
1341 #[doc = "One shot register to clear flag"]
1342 #[inline(always)]
1343 pub const fn ftdf_tx_clear_os_reg(
1344 &self,
1345 ) -> &'static crate::common::Reg<self::FtdfTxClearOsReg_SPEC, crate::common::RW> {
1346 unsafe {
1347 crate::common::Reg::<self::FtdfTxClearOsReg_SPEC, crate::common::RW>::from_ptr(
1348 self._svd2pac_as_ptr().add(66692usize),
1349 )
1350 }
1351 }
1352
1353 #[doc = "Transmit control register"]
1354 #[inline(always)]
1355 pub const fn ftdf_tx_control_0_reg(
1356 &self,
1357 ) -> &'static crate::common::Reg<self::FtdfTxControl0Reg_SPEC, crate::common::RW> {
1358 unsafe {
1359 crate::common::Reg::<self::FtdfTxControl0Reg_SPEC, crate::common::RW>::from_ptr(
1360 self._svd2pac_as_ptr().add(66112usize),
1361 )
1362 }
1363 }
1364
1365 #[doc = "Address transmit fifo 0"]
1366 #[inline(always)]
1367 pub const fn ftdf_tx_fifo_0_0_reg(
1368 &self,
1369 ) -> &'static crate::common::Reg<self::FtdfTxFifo00Reg_SPEC, crate::common::RW> {
1370 unsafe {
1371 crate::common::Reg::<self::FtdfTxFifo00Reg_SPEC, crate::common::RW>::from_ptr(
1372 self._svd2pac_as_ptr().add(0usize),
1373 )
1374 }
1375 }
1376
1377 #[doc = "Address transmit fifo 1"]
1378 #[inline(always)]
1379 pub const fn ftdf_tx_fifo_1_0_reg(
1380 &self,
1381 ) -> &'static crate::common::Reg<self::FtdfTxFifo10Reg_SPEC, crate::common::RW> {
1382 unsafe {
1383 crate::common::Reg::<self::FtdfTxFifo10Reg_SPEC, crate::common::RW>::from_ptr(
1384 self._svd2pac_as_ptr().add(128usize),
1385 )
1386 }
1387 }
1388
1389 #[doc = "Address transmit fifo 2"]
1390 #[inline(always)]
1391 pub const fn ftdf_tx_fifo_2_0_reg(
1392 &self,
1393 ) -> &'static crate::common::Reg<self::FtdfTxFifo20Reg_SPEC, crate::common::RW> {
1394 unsafe {
1395 crate::common::Reg::<self::FtdfTxFifo20Reg_SPEC, crate::common::RW>::from_ptr(
1396 self._svd2pac_as_ptr().add(256usize),
1397 )
1398 }
1399 }
1400
1401 #[doc = "Address transmit fifo 3"]
1402 #[inline(always)]
1403 pub const fn ftdf_tx_fifo_3_0_reg(
1404 &self,
1405 ) -> &'static crate::common::Reg<self::FtdfTxFifo30Reg_SPEC, crate::common::RW> {
1406 unsafe {
1407 crate::common::Reg::<self::FtdfTxFifo30Reg_SPEC, crate::common::RW>::from_ptr(
1408 self._svd2pac_as_ptr().add(384usize),
1409 )
1410 }
1411 }
1412
1413 #[doc = "Clear flag register 0"]
1414 #[inline(always)]
1415 pub const fn ftdf_tx_flag_clear_e_0_reg(
1416 &self,
1417 ) -> &'static crate::common::Reg<self::FtdfTxFlagClearE0Reg_SPEC, crate::common::RW> {
1418 unsafe {
1419 crate::common::Reg::<self::FtdfTxFlagClearE0Reg_SPEC, crate::common::RW>::from_ptr(
1420 self._svd2pac_as_ptr().add(66564usize),
1421 )
1422 }
1423 }
1424
1425 #[doc = "Clear flag register 1"]
1426 #[inline(always)]
1427 pub const fn ftdf_tx_flag_clear_e_1_reg(
1428 &self,
1429 ) -> &'static crate::common::Reg<self::FtdfTxFlagClearE1Reg_SPEC, crate::common::RW> {
1430 unsafe {
1431 crate::common::Reg::<self::FtdfTxFlagClearE1Reg_SPEC, crate::common::RW>::from_ptr(
1432 self._svd2pac_as_ptr().add(66596usize),
1433 )
1434 }
1435 }
1436
1437 #[doc = "Clear flag register 2"]
1438 #[inline(always)]
1439 pub const fn ftdf_tx_flag_clear_e_2_reg(
1440 &self,
1441 ) -> &'static crate::common::Reg<self::FtdfTxFlagClearE2Reg_SPEC, crate::common::RW> {
1442 unsafe {
1443 crate::common::Reg::<self::FtdfTxFlagClearE2Reg_SPEC, crate::common::RW>::from_ptr(
1444 self._svd2pac_as_ptr().add(66628usize),
1445 )
1446 }
1447 }
1448
1449 #[doc = "Clear flag register 3"]
1450 #[inline(always)]
1451 pub const fn ftdf_tx_flag_clear_e_3_reg(
1452 &self,
1453 ) -> &'static crate::common::Reg<self::FtdfTxFlagClearE3Reg_SPEC, crate::common::RW> {
1454 unsafe {
1455 crate::common::Reg::<self::FtdfTxFlagClearE3Reg_SPEC, crate::common::RW>::from_ptr(
1456 self._svd2pac_as_ptr().add(66660usize),
1457 )
1458 }
1459 }
1460
1461 #[doc = "Mask flag register 0"]
1462 #[inline(always)]
1463 pub const fn ftdf_tx_flag_clear_m_0_reg(
1464 &self,
1465 ) -> &'static crate::common::Reg<self::FtdfTxFlagClearM0Reg_SPEC, crate::common::RW> {
1466 unsafe {
1467 crate::common::Reg::<self::FtdfTxFlagClearM0Reg_SPEC, crate::common::RW>::from_ptr(
1468 self._svd2pac_as_ptr().add(66568usize),
1469 )
1470 }
1471 }
1472
1473 #[doc = "Mask flag register 1"]
1474 #[inline(always)]
1475 pub const fn ftdf_tx_flag_clear_m_1_reg(
1476 &self,
1477 ) -> &'static crate::common::Reg<self::FtdfTxFlagClearM1Reg_SPEC, crate::common::RW> {
1478 unsafe {
1479 crate::common::Reg::<self::FtdfTxFlagClearM1Reg_SPEC, crate::common::RW>::from_ptr(
1480 self._svd2pac_as_ptr().add(66600usize),
1481 )
1482 }
1483 }
1484
1485 #[doc = "Clear flag register 2"]
1486 #[inline(always)]
1487 pub const fn ftdf_tx_flag_clear_m_2_reg(
1488 &self,
1489 ) -> &'static crate::common::Reg<self::FtdfTxFlagClearM2Reg_SPEC, crate::common::RW> {
1490 unsafe {
1491 crate::common::Reg::<self::FtdfTxFlagClearM2Reg_SPEC, crate::common::RW>::from_ptr(
1492 self._svd2pac_as_ptr().add(66632usize),
1493 )
1494 }
1495 }
1496
1497 #[doc = "Clear flag register 3"]
1498 #[inline(always)]
1499 pub const fn ftdf_tx_flag_clear_m_3_reg(
1500 &self,
1501 ) -> &'static crate::common::Reg<self::FtdfTxFlagClearM3Reg_SPEC, crate::common::RW> {
1502 unsafe {
1503 crate::common::Reg::<self::FtdfTxFlagClearM3Reg_SPEC, crate::common::RW>::from_ptr(
1504 self._svd2pac_as_ptr().add(66664usize),
1505 )
1506 }
1507 }
1508
1509 #[doc = "Transmit packet ready for transmission register 0"]
1510 #[inline(always)]
1511 pub const fn ftdf_tx_flag_s_0_reg(
1512 &self,
1513 ) -> &'static crate::common::Reg<self::FtdfTxFlagS0Reg_SPEC, crate::common::RW> {
1514 unsafe {
1515 crate::common::Reg::<self::FtdfTxFlagS0Reg_SPEC, crate::common::RW>::from_ptr(
1516 self._svd2pac_as_ptr().add(66560usize),
1517 )
1518 }
1519 }
1520
1521 #[doc = "Transmit packet ready for transmission register 1"]
1522 #[inline(always)]
1523 pub const fn ftdf_tx_flag_s_1_reg(
1524 &self,
1525 ) -> &'static crate::common::Reg<self::FtdfTxFlagS1Reg_SPEC, crate::common::RW> {
1526 unsafe {
1527 crate::common::Reg::<self::FtdfTxFlagS1Reg_SPEC, crate::common::RW>::from_ptr(
1528 self._svd2pac_as_ptr().add(66592usize),
1529 )
1530 }
1531 }
1532
1533 #[doc = "Transmit packet ready for transmission register 2"]
1534 #[inline(always)]
1535 pub const fn ftdf_tx_flag_s_2_reg(
1536 &self,
1537 ) -> &'static crate::common::Reg<self::FtdfTxFlagS2Reg_SPEC, crate::common::RW> {
1538 unsafe {
1539 crate::common::Reg::<self::FtdfTxFlagS2Reg_SPEC, crate::common::RW>::from_ptr(
1540 self._svd2pac_as_ptr().add(66624usize),
1541 )
1542 }
1543 }
1544
1545 #[doc = "Transmit packet ready for transmission register 3"]
1546 #[inline(always)]
1547 pub const fn ftdf_tx_flag_s_3_reg(
1548 &self,
1549 ) -> &'static crate::common::Reg<self::FtdfTxFlagS3Reg_SPEC, crate::common::RW> {
1550 unsafe {
1551 crate::common::Reg::<self::FtdfTxFlagS3Reg_SPEC, crate::common::RW>::from_ptr(
1552 self._svd2pac_as_ptr().add(66656usize),
1553 )
1554 }
1555 }
1556
1557 #[doc = "Transmit metadata register 0"]
1558 #[inline(always)]
1559 pub const fn ftdf_tx_meta_data_0_0_reg(
1560 &self,
1561 ) -> &'static crate::common::Reg<self::FtdfTxMetaData00Reg_SPEC, crate::common::RW> {
1562 unsafe {
1563 crate::common::Reg::<self::FtdfTxMetaData00Reg_SPEC, crate::common::RW>::from_ptr(
1564 self._svd2pac_as_ptr().add(512usize),
1565 )
1566 }
1567 }
1568
1569 #[doc = "Transmit metadata register 1"]
1570 #[inline(always)]
1571 pub const fn ftdf_tx_meta_data_0_1_reg(
1572 &self,
1573 ) -> &'static crate::common::Reg<self::FtdfTxMetaData01Reg_SPEC, crate::common::RW> {
1574 unsafe {
1575 crate::common::Reg::<self::FtdfTxMetaData01Reg_SPEC, crate::common::RW>::from_ptr(
1576 self._svd2pac_as_ptr().add(528usize),
1577 )
1578 }
1579 }
1580
1581 #[doc = "Transmit metadata register 2"]
1582 #[inline(always)]
1583 pub const fn ftdf_tx_meta_data_0_2_reg(
1584 &self,
1585 ) -> &'static crate::common::Reg<self::FtdfTxMetaData02Reg_SPEC, crate::common::RW> {
1586 unsafe {
1587 crate::common::Reg::<self::FtdfTxMetaData02Reg_SPEC, crate::common::RW>::from_ptr(
1588 self._svd2pac_as_ptr().add(544usize),
1589 )
1590 }
1591 }
1592
1593 #[doc = "Transmit metadata register 3"]
1594 #[inline(always)]
1595 pub const fn ftdf_tx_meta_data_0_3_reg(
1596 &self,
1597 ) -> &'static crate::common::Reg<self::FtdfTxMetaData03Reg_SPEC, crate::common::RW> {
1598 unsafe {
1599 crate::common::Reg::<self::FtdfTxMetaData03Reg_SPEC, crate::common::RW>::from_ptr(
1600 self._svd2pac_as_ptr().add(560usize),
1601 )
1602 }
1603 }
1604
1605 #[doc = "Transmit metadata register 0"]
1606 #[inline(always)]
1607 pub const fn ftdf_tx_meta_data_1_0_reg(
1608 &self,
1609 ) -> &'static crate::common::Reg<self::FtdfTxMetaData10Reg_SPEC, crate::common::RW> {
1610 unsafe {
1611 crate::common::Reg::<self::FtdfTxMetaData10Reg_SPEC, crate::common::RW>::from_ptr(
1612 self._svd2pac_as_ptr().add(516usize),
1613 )
1614 }
1615 }
1616
1617 #[doc = "Transmit metadata register 1"]
1618 #[inline(always)]
1619 pub const fn ftdf_tx_meta_data_1_1_reg(
1620 &self,
1621 ) -> &'static crate::common::Reg<self::FtdfTxMetaData11Reg_SPEC, crate::common::RW> {
1622 unsafe {
1623 crate::common::Reg::<self::FtdfTxMetaData11Reg_SPEC, crate::common::RW>::from_ptr(
1624 self._svd2pac_as_ptr().add(532usize),
1625 )
1626 }
1627 }
1628
1629 #[doc = "Transmit metadata register 2"]
1630 #[inline(always)]
1631 pub const fn ftdf_tx_meta_data_1_2_reg(
1632 &self,
1633 ) -> &'static crate::common::Reg<self::FtdfTxMetaData12Reg_SPEC, crate::common::RW> {
1634 unsafe {
1635 crate::common::Reg::<self::FtdfTxMetaData12Reg_SPEC, crate::common::RW>::from_ptr(
1636 self._svd2pac_as_ptr().add(548usize),
1637 )
1638 }
1639 }
1640
1641 #[doc = "Transmit metadata register 3"]
1642 #[inline(always)]
1643 pub const fn ftdf_tx_meta_data_1_3_reg(
1644 &self,
1645 ) -> &'static crate::common::Reg<self::FtdfTxMetaData13Reg_SPEC, crate::common::RW> {
1646 unsafe {
1647 crate::common::Reg::<self::FtdfTxMetaData13Reg_SPEC, crate::common::RW>::from_ptr(
1648 self._svd2pac_as_ptr().add(564usize),
1649 )
1650 }
1651 }
1652
1653 #[doc = "Transmit priority register 0"]
1654 #[inline(always)]
1655 pub const fn ftdf_tx_priority_0_reg(
1656 &self,
1657 ) -> &'static crate::common::Reg<self::FtdfTxPriority0Reg_SPEC, crate::common::RW> {
1658 unsafe {
1659 crate::common::Reg::<self::FtdfTxPriority0Reg_SPEC, crate::common::RW>::from_ptr(
1660 self._svd2pac_as_ptr().add(66576usize),
1661 )
1662 }
1663 }
1664
1665 #[doc = "Transmit priority register 1"]
1666 #[inline(always)]
1667 pub const fn ftdf_tx_priority_1_reg(
1668 &self,
1669 ) -> &'static crate::common::Reg<self::FtdfTxPriority1Reg_SPEC, crate::common::RW> {
1670 unsafe {
1671 crate::common::Reg::<self::FtdfTxPriority1Reg_SPEC, crate::common::RW>::from_ptr(
1672 self._svd2pac_as_ptr().add(66608usize),
1673 )
1674 }
1675 }
1676
1677 #[doc = "Transmit priority register 2"]
1678 #[inline(always)]
1679 pub const fn ftdf_tx_priority_2_reg(
1680 &self,
1681 ) -> &'static crate::common::Reg<self::FtdfTxPriority2Reg_SPEC, crate::common::RW> {
1682 unsafe {
1683 crate::common::Reg::<self::FtdfTxPriority2Reg_SPEC, crate::common::RW>::from_ptr(
1684 self._svd2pac_as_ptr().add(66640usize),
1685 )
1686 }
1687 }
1688
1689 #[doc = "Transmit priority register 3"]
1690 #[inline(always)]
1691 pub const fn ftdf_tx_priority_3_reg(
1692 &self,
1693 ) -> &'static crate::common::Reg<self::FtdfTxPriority3Reg_SPEC, crate::common::RW> {
1694 unsafe {
1695 crate::common::Reg::<self::FtdfTxPriority3Reg_SPEC, crate::common::RW>::from_ptr(
1696 self._svd2pac_as_ptr().add(66672usize),
1697 )
1698 }
1699 }
1700
1701 #[doc = "Transmit status register 0"]
1702 #[inline(always)]
1703 pub const fn ftdf_tx_return_status_0_0_reg(
1704 &self,
1705 ) -> &'static crate::common::Reg<self::FtdfTxReturnStatus00Reg_SPEC, crate::common::RW> {
1706 unsafe {
1707 crate::common::Reg::<self::FtdfTxReturnStatus00Reg_SPEC, crate::common::RW>::from_ptr(
1708 self._svd2pac_as_ptr().add(576usize),
1709 )
1710 }
1711 }
1712
1713 #[doc = "Transmit status register 1"]
1714 #[inline(always)]
1715 pub const fn ftdf_tx_return_status_0_1_reg(
1716 &self,
1717 ) -> &'static crate::common::Reg<self::FtdfTxReturnStatus01Reg_SPEC, crate::common::RW> {
1718 unsafe {
1719 crate::common::Reg::<self::FtdfTxReturnStatus01Reg_SPEC, crate::common::RW>::from_ptr(
1720 self._svd2pac_as_ptr().add(592usize),
1721 )
1722 }
1723 }
1724
1725 #[doc = "Transmit status register 2"]
1726 #[inline(always)]
1727 pub const fn ftdf_tx_return_status_0_2_reg(
1728 &self,
1729 ) -> &'static crate::common::Reg<self::FtdfTxReturnStatus02Reg_SPEC, crate::common::RW> {
1730 unsafe {
1731 crate::common::Reg::<self::FtdfTxReturnStatus02Reg_SPEC, crate::common::RW>::from_ptr(
1732 self._svd2pac_as_ptr().add(608usize),
1733 )
1734 }
1735 }
1736
1737 #[doc = "Transmit status register 3"]
1738 #[inline(always)]
1739 pub const fn ftdf_tx_return_status_0_3_reg(
1740 &self,
1741 ) -> &'static crate::common::Reg<self::FtdfTxReturnStatus03Reg_SPEC, crate::common::RW> {
1742 unsafe {
1743 crate::common::Reg::<self::FtdfTxReturnStatus03Reg_SPEC, crate::common::RW>::from_ptr(
1744 self._svd2pac_as_ptr().add(624usize),
1745 )
1746 }
1747 }
1748
1749 #[doc = "Transmit status register 0"]
1750 #[inline(always)]
1751 pub const fn ftdf_tx_return_status_1_0_reg(
1752 &self,
1753 ) -> &'static crate::common::Reg<self::FtdfTxReturnStatus10Reg_SPEC, crate::common::RW> {
1754 unsafe {
1755 crate::common::Reg::<self::FtdfTxReturnStatus10Reg_SPEC, crate::common::RW>::from_ptr(
1756 self._svd2pac_as_ptr().add(580usize),
1757 )
1758 }
1759 }
1760
1761 #[doc = "Transmit status register 1"]
1762 #[inline(always)]
1763 pub const fn ftdf_tx_return_status_1_1_reg(
1764 &self,
1765 ) -> &'static crate::common::Reg<self::FtdfTxReturnStatus11Reg_SPEC, crate::common::RW> {
1766 unsafe {
1767 crate::common::Reg::<self::FtdfTxReturnStatus11Reg_SPEC, crate::common::RW>::from_ptr(
1768 self._svd2pac_as_ptr().add(596usize),
1769 )
1770 }
1771 }
1772
1773 #[doc = "Transmit status register 2"]
1774 #[inline(always)]
1775 pub const fn ftdf_tx_return_status_1_2_reg(
1776 &self,
1777 ) -> &'static crate::common::Reg<self::FtdfTxReturnStatus12Reg_SPEC, crate::common::RW> {
1778 unsafe {
1779 crate::common::Reg::<self::FtdfTxReturnStatus12Reg_SPEC, crate::common::RW>::from_ptr(
1780 self._svd2pac_as_ptr().add(612usize),
1781 )
1782 }
1783 }
1784
1785 #[doc = "Transmit status register 3"]
1786 #[inline(always)]
1787 pub const fn ftdf_tx_return_status_1_3_reg(
1788 &self,
1789 ) -> &'static crate::common::Reg<self::FtdfTxReturnStatus13Reg_SPEC, crate::common::RW> {
1790 unsafe {
1791 crate::common::Reg::<self::FtdfTxReturnStatus13Reg_SPEC, crate::common::RW>::from_ptr(
1792 self._svd2pac_as_ptr().add(628usize),
1793 )
1794 }
1795 }
1796
1797 #[doc = "One shot register to set flag"]
1798 #[inline(always)]
1799 pub const fn ftdf_tx_set_os_reg(
1800 &self,
1801 ) -> &'static crate::common::Reg<self::FtdfTxSetOsReg_SPEC, crate::common::RW> {
1802 unsafe {
1803 crate::common::Reg::<self::FtdfTxSetOsReg_SPEC, crate::common::RW>::from_ptr(
1804 self._svd2pac_as_ptr().add(66688usize),
1805 )
1806 }
1807 }
1808
1809 #[doc = "Treshold value Wakeup timer"]
1810 #[inline(always)]
1811 pub const fn ftdf_wakeupintthr_reg(
1812 &self,
1813 ) -> &'static crate::common::Reg<self::FtdfWakeupintthrReg_SPEC, crate::common::RW> {
1814 unsafe {
1815 crate::common::Reg::<self::FtdfWakeupintthrReg_SPEC, crate::common::RW>::from_ptr(
1816 self._svd2pac_as_ptr().add(69632usize),
1817 )
1818 }
1819 }
1820
1821 #[doc = "Wakeup timer vcontrol register"]
1822 #[inline(always)]
1823 pub const fn ftdf_wakeup_control_reg(
1824 &self,
1825 ) -> &'static crate::common::Reg<self::FtdfWakeupControlReg_SPEC, crate::common::RW> {
1826 unsafe {
1827 crate::common::Reg::<self::FtdfWakeupControlReg_SPEC, crate::common::RW>::from_ptr(
1828 self._svd2pac_as_ptr().add(69636usize),
1829 )
1830 }
1831 }
1832}
1833#[doc(hidden)]
1834#[derive(Copy, Clone, Eq, PartialEq)]
1835pub struct FtdfBuildtime0Reg_SPEC;
1836impl crate::sealed::RegSpec for FtdfBuildtime0Reg_SPEC {
1837 type DataType = u32;
1838}
1839
1840#[doc = "Build time"]
1841pub type FtdfBuildtime0Reg = crate::RegValueT<FtdfBuildtime0Reg_SPEC>;
1842
1843impl FtdfBuildtime0Reg {
1844 #[doc = "Build time of device"]
1845 #[inline(always)]
1846 pub fn buildtime(
1847 self,
1848 ) -> crate::common::RegisterField<
1849 0,
1850 0xffffffff,
1851 1,
1852 0,
1853 u32,
1854 u32,
1855 FtdfBuildtime0Reg_SPEC,
1856 crate::common::R,
1857 > {
1858 crate::common::RegisterField::<
1859 0,
1860 0xffffffff,
1861 1,
1862 0,
1863 u32,
1864 u32,
1865 FtdfBuildtime0Reg_SPEC,
1866 crate::common::R,
1867 >::from_register(self, 0)
1868 }
1869}
1870impl ::core::default::Default for FtdfBuildtime0Reg {
1871 #[inline(always)]
1872 fn default() -> FtdfBuildtime0Reg {
1873 <crate::RegValueT<FtdfBuildtime0Reg_SPEC> as RegisterValue<_>>::new(0)
1874 }
1875}
1876
1877#[doc(hidden)]
1878#[derive(Copy, Clone, Eq, PartialEq)]
1879pub struct FtdfBuildtime1Reg_SPEC;
1880impl crate::sealed::RegSpec for FtdfBuildtime1Reg_SPEC {
1881 type DataType = u32;
1882}
1883
1884#[doc = "Build time"]
1885pub type FtdfBuildtime1Reg = crate::RegValueT<FtdfBuildtime1Reg_SPEC>;
1886
1887impl FtdfBuildtime1Reg {
1888 #[doc = "Build time of device"]
1889 #[inline(always)]
1890 pub fn buildtime(
1891 self,
1892 ) -> crate::common::RegisterField<
1893 0,
1894 0xffffffff,
1895 1,
1896 0,
1897 u32,
1898 u32,
1899 FtdfBuildtime1Reg_SPEC,
1900 crate::common::R,
1901 > {
1902 crate::common::RegisterField::<
1903 0,
1904 0xffffffff,
1905 1,
1906 0,
1907 u32,
1908 u32,
1909 FtdfBuildtime1Reg_SPEC,
1910 crate::common::R,
1911 >::from_register(self, 0)
1912 }
1913}
1914impl ::core::default::Default for FtdfBuildtime1Reg {
1915 #[inline(always)]
1916 fn default() -> FtdfBuildtime1Reg {
1917 <crate::RegValueT<FtdfBuildtime1Reg_SPEC> as RegisterValue<_>>::new(0)
1918 }
1919}
1920
1921#[doc(hidden)]
1922#[derive(Copy, Clone, Eq, PartialEq)]
1923pub struct FtdfBuildtime2Reg_SPEC;
1924impl crate::sealed::RegSpec for FtdfBuildtime2Reg_SPEC {
1925 type DataType = u32;
1926}
1927
1928#[doc = "Build time"]
1929pub type FtdfBuildtime2Reg = crate::RegValueT<FtdfBuildtime2Reg_SPEC>;
1930
1931impl FtdfBuildtime2Reg {
1932 #[doc = "Build time of device"]
1933 #[inline(always)]
1934 pub fn buildtime(
1935 self,
1936 ) -> crate::common::RegisterField<
1937 0,
1938 0xffffffff,
1939 1,
1940 0,
1941 u32,
1942 u32,
1943 FtdfBuildtime2Reg_SPEC,
1944 crate::common::R,
1945 > {
1946 crate::common::RegisterField::<
1947 0,
1948 0xffffffff,
1949 1,
1950 0,
1951 u32,
1952 u32,
1953 FtdfBuildtime2Reg_SPEC,
1954 crate::common::R,
1955 >::from_register(self, 0)
1956 }
1957}
1958impl ::core::default::Default for FtdfBuildtime2Reg {
1959 #[inline(always)]
1960 fn default() -> FtdfBuildtime2Reg {
1961 <crate::RegValueT<FtdfBuildtime2Reg_SPEC> as RegisterValue<_>>::new(0)
1962 }
1963}
1964
1965#[doc(hidden)]
1966#[derive(Copy, Clone, Eq, PartialEq)]
1967pub struct FtdfBuildtime3Reg_SPEC;
1968impl crate::sealed::RegSpec for FtdfBuildtime3Reg_SPEC {
1969 type DataType = u32;
1970}
1971
1972#[doc = "Build time"]
1973pub type FtdfBuildtime3Reg = crate::RegValueT<FtdfBuildtime3Reg_SPEC>;
1974
1975impl FtdfBuildtime3Reg {
1976 #[doc = "Build time of device"]
1977 #[inline(always)]
1978 pub fn buildtime(
1979 self,
1980 ) -> crate::common::RegisterField<
1981 0,
1982 0xffffffff,
1983 1,
1984 0,
1985 u32,
1986 u32,
1987 FtdfBuildtime3Reg_SPEC,
1988 crate::common::R,
1989 > {
1990 crate::common::RegisterField::<
1991 0,
1992 0xffffffff,
1993 1,
1994 0,
1995 u32,
1996 u32,
1997 FtdfBuildtime3Reg_SPEC,
1998 crate::common::R,
1999 >::from_register(self, 0)
2000 }
2001}
2002impl ::core::default::Default for FtdfBuildtime3Reg {
2003 #[inline(always)]
2004 fn default() -> FtdfBuildtime3Reg {
2005 <crate::RegValueT<FtdfBuildtime3Reg_SPEC> as RegisterValue<_>>::new(0)
2006 }
2007}
2008
2009#[doc(hidden)]
2010#[derive(Copy, Clone, Eq, PartialEq)]
2011pub struct FtdfDebugcontrolReg_SPEC;
2012impl crate::sealed::RegSpec for FtdfDebugcontrolReg_SPEC {
2013 type DataType = u32;
2014}
2015
2016#[doc = "Debug control register"]
2017pub type FtdfDebugcontrolReg = crate::RegValueT<FtdfDebugcontrolReg_SPEC>;
2018
2019impl FtdfDebugcontrolReg {
2020 #[doc = "If set, the Rx debug interface will be selected as input for the Rx pipeline."]
2021 #[inline(always)]
2022 pub fn dbg_rx_input(
2023 self,
2024 ) -> crate::common::RegisterFieldBool<8, 1, 0, FtdfDebugcontrolReg_SPEC, crate::common::RW>
2025 {
2026 crate::common::RegisterFieldBool::<8,1,0,FtdfDebugcontrolReg_SPEC,crate::common::RW>::from_register(self,0)
2027 }
2028}
2029impl ::core::default::Default for FtdfDebugcontrolReg {
2030 #[inline(always)]
2031 fn default() -> FtdfDebugcontrolReg {
2032 <crate::RegValueT<FtdfDebugcontrolReg_SPEC> as RegisterValue<_>>::new(0)
2033 }
2034}
2035
2036#[doc(hidden)]
2037#[derive(Copy, Clone, Eq, PartialEq)]
2038pub struct FtdfEventcurrvalReg_SPEC;
2039impl crate::sealed::RegSpec for FtdfEventcurrvalReg_SPEC {
2040 type DataType = u32;
2041}
2042
2043#[doc = "Value of event generator"]
2044pub type FtdfEventcurrvalReg = crate::RegValueT<FtdfEventcurrvalReg_SPEC>;
2045
2046impl FtdfEventcurrvalReg {
2047 #[doc = "Value of captured Event generator"]
2048 #[inline(always)]
2049 pub fn eventcurrval(
2050 self,
2051 ) -> crate::common::RegisterField<
2052 0,
2053 0xffffffff,
2054 1,
2055 0,
2056 u32,
2057 u32,
2058 FtdfEventcurrvalReg_SPEC,
2059 crate::common::R,
2060 > {
2061 crate::common::RegisterField::<
2062 0,
2063 0xffffffff,
2064 1,
2065 0,
2066 u32,
2067 u32,
2068 FtdfEventcurrvalReg_SPEC,
2069 crate::common::R,
2070 >::from_register(self, 0)
2071 }
2072}
2073impl ::core::default::Default for FtdfEventcurrvalReg {
2074 #[inline(always)]
2075 fn default() -> FtdfEventcurrvalReg {
2076 <crate::RegValueT<FtdfEventcurrvalReg_SPEC> as RegisterValue<_>>::new(0)
2077 }
2078}
2079
2080#[doc(hidden)]
2081#[derive(Copy, Clone, Eq, PartialEq)]
2082pub struct FtdfFtdfCeReg_SPEC;
2083impl crate::sealed::RegSpec for FtdfFtdfCeReg_SPEC {
2084 type DataType = u32;
2085}
2086
2087#[doc = "Selection register events"]
2088pub type FtdfFtdfCeReg = crate::RegValueT<FtdfFtdfCeReg_SPEC>;
2089
2090impl FtdfFtdfCeReg {
2091 #[doc = "Composite serveice request from ftdf macro (see FR0400 in v40.100.2.41.pdf)\nBit 0 = unused\nBit 1 = rx interrupts\nBit 2 = unused\nBit 3 = miscelaneous interrupts\nBit 4 = tx interrupts\nBit 5 = Reserved"]
2092 #[inline(always)]
2093 pub fn ftdf_ce(
2094 self,
2095 ) -> crate::common::RegisterField<0, 0x3f, 1, 0, u8, u8, FtdfFtdfCeReg_SPEC, crate::common::R>
2096 {
2097 crate::common::RegisterField::<0,0x3f,1,0,u8,u8,FtdfFtdfCeReg_SPEC,crate::common::R>::from_register(self,0)
2098 }
2099}
2100impl ::core::default::Default for FtdfFtdfCeReg {
2101 #[inline(always)]
2102 fn default() -> FtdfFtdfCeReg {
2103 <crate::RegValueT<FtdfFtdfCeReg_SPEC> as RegisterValue<_>>::new(0)
2104 }
2105}
2106
2107#[doc(hidden)]
2108#[derive(Copy, Clone, Eq, PartialEq)]
2109pub struct FtdfFtdfCmReg_SPEC;
2110impl crate::sealed::RegSpec for FtdfFtdfCmReg_SPEC {
2111 type DataType = u32;
2112}
2113
2114#[doc = "Mask selection register events"]
2115pub type FtdfFtdfCmReg = crate::RegValueT<FtdfFtdfCmReg_SPEC>;
2116
2117impl FtdfFtdfCmReg {
2118 #[doc = "mask bits for ftf_ce"]
2119 #[inline(always)]
2120 pub fn ftdf_cm(
2121 self,
2122 ) -> crate::common::RegisterField<0, 0x3f, 1, 0, u8, u8, FtdfFtdfCmReg_SPEC, crate::common::RW>
2123 {
2124 crate::common::RegisterField::<0,0x3f,1,0,u8,u8,FtdfFtdfCmReg_SPEC,crate::common::RW>::from_register(self,0)
2125 }
2126}
2127impl ::core::default::Default for FtdfFtdfCmReg {
2128 #[inline(always)]
2129 fn default() -> FtdfFtdfCmReg {
2130 <crate::RegValueT<FtdfFtdfCmReg_SPEC> as RegisterValue<_>>::new(0)
2131 }
2132}
2133
2134#[doc(hidden)]
2135#[derive(Copy, Clone, Eq, PartialEq)]
2136pub struct FtdfGlobControl0Reg_SPEC;
2137impl crate::sealed::RegSpec for FtdfGlobControl0Reg_SPEC {
2138 type DataType = u32;
2139}
2140
2141#[doc = "Global control register"]
2142pub type FtdfGlobControl0Reg = crate::RegValueT<FtdfGlobControl0Reg_SPEC>;
2143
2144impl FtdfGlobControl0Reg {
2145 #[doc = "If set, TSCH mode is enabled"]
2146 #[inline(always)]
2147 pub fn mactschenabled(
2148 self,
2149 ) -> crate::common::RegisterFieldBool<18, 1, 0, FtdfGlobControl0Reg_SPEC, crate::common::RW>
2150 {
2151 crate::common::RegisterFieldBool::<18,1,0,FtdfGlobControl0Reg_SPEC,crate::common::RW>::from_register(self,0)
2152 }
2153
2154 #[doc = "If set, Low Energy mode is enabled"]
2155 #[inline(always)]
2156 pub fn macleenabled(
2157 self,
2158 ) -> crate::common::RegisterFieldBool<17, 1, 0, FtdfGlobControl0Reg_SPEC, crate::common::RW>
2159 {
2160 crate::common::RegisterFieldBool::<17,1,0,FtdfGlobControl0Reg_SPEC,crate::common::RW>::from_register(self,0)
2161 }
2162
2163 #[doc = "Simple address of the PAN coordinator"]
2164 #[inline(always)]
2165 pub fn macsimpleaddress(
2166 self,
2167 ) -> crate::common::RegisterField<
2168 8,
2169 0xff,
2170 1,
2171 0,
2172 u8,
2173 u8,
2174 FtdfGlobControl0Reg_SPEC,
2175 crate::common::RW,
2176 > {
2177 crate::common::RegisterField::<
2178 8,
2179 0xff,
2180 1,
2181 0,
2182 u8,
2183 u8,
2184 FtdfGlobControl0Reg_SPEC,
2185 crate::common::RW,
2186 >::from_register(self, 0)
2187 }
2188
2189 #[doc = "Source of the TX_DMA_REQ output of this block."]
2190 #[inline(always)]
2191 pub fn tx_dma_req(
2192 self,
2193 ) -> crate::common::RegisterFieldBool<3, 1, 0, FtdfGlobControl0Reg_SPEC, crate::common::RW>
2194 {
2195 crate::common::RegisterFieldBool::<3,1,0,FtdfGlobControl0Reg_SPEC,crate::common::RW>::from_register(self,0)
2196 }
2197
2198 #[doc = "Source of the RX_DMA_REQ output of this block."]
2199 #[inline(always)]
2200 pub fn rx_dma_req(
2201 self,
2202 ) -> crate::common::RegisterFieldBool<2, 1, 0, FtdfGlobControl0Reg_SPEC, crate::common::RW>
2203 {
2204 crate::common::RegisterFieldBool::<2,1,0,FtdfGlobControl0Reg_SPEC,crate::common::RW>::from_register(self,0)
2205 }
2206
2207 #[doc = "Enable/disable receiver check on address\nfields (0=enabled, 1=disabled)"]
2208 #[inline(always)]
2209 pub fn ispancoordinator(
2210 self,
2211 ) -> crate::common::RegisterFieldBool<1, 1, 0, FtdfGlobControl0Reg_SPEC, crate::common::RW>
2212 {
2213 crate::common::RegisterFieldBool::<1,1,0,FtdfGlobControl0Reg_SPEC,crate::common::RW>::from_register(self,0)
2214 }
2215}
2216impl ::core::default::Default for FtdfGlobControl0Reg {
2217 #[inline(always)]
2218 fn default() -> FtdfGlobControl0Reg {
2219 <crate::RegValueT<FtdfGlobControl0Reg_SPEC> as RegisterValue<_>>::new(65280)
2220 }
2221}
2222
2223#[doc(hidden)]
2224#[derive(Copy, Clone, Eq, PartialEq)]
2225pub struct FtdfGlobControl1Reg_SPEC;
2226impl crate::sealed::RegSpec for FtdfGlobControl1Reg_SPEC {
2227 type DataType = u32;
2228}
2229
2230#[doc = "Global control register"]
2231pub type FtdfGlobControl1Reg = crate::RegValueT<FtdfGlobControl1Reg_SPEC>;
2232
2233impl FtdfGlobControl1Reg {
2234 #[doc = "The values 0xFFFF and 0xFFFE indicate\nthat no IEEE Short Address is available.\nThe latter one is used if the device i"]
2235 #[inline(always)]
2236 pub fn macshortaddress(
2237 self,
2238 ) -> crate::common::RegisterField<
2239 16,
2240 0xffff,
2241 1,
2242 0,
2243 u16,
2244 u16,
2245 FtdfGlobControl1Reg_SPEC,
2246 crate::common::RW,
2247 > {
2248 crate::common::RegisterField::<
2249 16,
2250 0xffff,
2251 1,
2252 0,
2253 u16,
2254 u16,
2255 FtdfGlobControl1Reg_SPEC,
2256 crate::common::RW,
2257 >::from_register(self, 0)
2258 }
2259
2260 #[doc = "The values 0xFFFF indicates that the device\nis not associated"]
2261 #[inline(always)]
2262 pub fn macpanid(
2263 self,
2264 ) -> crate::common::RegisterField<
2265 0,
2266 0xffff,
2267 1,
2268 0,
2269 u16,
2270 u16,
2271 FtdfGlobControl1Reg_SPEC,
2272 crate::common::RW,
2273 > {
2274 crate::common::RegisterField::<
2275 0,
2276 0xffff,
2277 1,
2278 0,
2279 u16,
2280 u16,
2281 FtdfGlobControl1Reg_SPEC,
2282 crate::common::RW,
2283 >::from_register(self, 0)
2284 }
2285}
2286impl ::core::default::Default for FtdfGlobControl1Reg {
2287 #[inline(always)]
2288 fn default() -> FtdfGlobControl1Reg {
2289 <crate::RegValueT<FtdfGlobControl1Reg_SPEC> as RegisterValue<_>>::new(2147483647)
2290 }
2291}
2292
2293#[doc(hidden)]
2294#[derive(Copy, Clone, Eq, PartialEq)]
2295pub struct FtdfGlobControl2Reg_SPEC;
2296impl crate::sealed::RegSpec for FtdfGlobControl2Reg_SPEC {
2297 type DataType = u32;
2298}
2299
2300#[doc = "Global control register"]
2301pub type FtdfGlobControl2Reg = crate::RegValueT<FtdfGlobControl2Reg_SPEC>;
2302
2303impl FtdfGlobControl2Reg {
2304 #[doc = "Unique device address, lower 32 bit"]
2305 #[inline(always)]
2306 pub fn aextendedaddress_l(
2307 self,
2308 ) -> crate::common::RegisterField<
2309 0,
2310 0xffffffff,
2311 1,
2312 0,
2313 u32,
2314 u32,
2315 FtdfGlobControl2Reg_SPEC,
2316 crate::common::RW,
2317 > {
2318 crate::common::RegisterField::<
2319 0,
2320 0xffffffff,
2321 1,
2322 0,
2323 u32,
2324 u32,
2325 FtdfGlobControl2Reg_SPEC,
2326 crate::common::RW,
2327 >::from_register(self, 0)
2328 }
2329}
2330impl ::core::default::Default for FtdfGlobControl2Reg {
2331 #[inline(always)]
2332 fn default() -> FtdfGlobControl2Reg {
2333 <crate::RegValueT<FtdfGlobControl2Reg_SPEC> as RegisterValue<_>>::new(2147483647)
2334 }
2335}
2336
2337#[doc(hidden)]
2338#[derive(Copy, Clone, Eq, PartialEq)]
2339pub struct FtdfGlobControl3Reg_SPEC;
2340impl crate::sealed::RegSpec for FtdfGlobControl3Reg_SPEC {
2341 type DataType = u32;
2342}
2343
2344#[doc = "Global control register"]
2345pub type FtdfGlobControl3Reg = crate::RegValueT<FtdfGlobControl3Reg_SPEC>;
2346
2347impl FtdfGlobControl3Reg {
2348 #[doc = "Unique device address, higher 16 bit"]
2349 #[inline(always)]
2350 pub fn aextendedaddress_h(
2351 self,
2352 ) -> crate::common::RegisterField<
2353 0,
2354 0xffffffff,
2355 1,
2356 0,
2357 u32,
2358 u32,
2359 FtdfGlobControl3Reg_SPEC,
2360 crate::common::RW,
2361 > {
2362 crate::common::RegisterField::<
2363 0,
2364 0xffffffff,
2365 1,
2366 0,
2367 u32,
2368 u32,
2369 FtdfGlobControl3Reg_SPEC,
2370 crate::common::RW,
2371 >::from_register(self, 0)
2372 }
2373}
2374impl ::core::default::Default for FtdfGlobControl3Reg {
2375 #[inline(always)]
2376 fn default() -> FtdfGlobControl3Reg {
2377 <crate::RegValueT<FtdfGlobControl3Reg_SPEC> as RegisterValue<_>>::new(2147483647)
2378 }
2379}
2380
2381#[doc(hidden)]
2382#[derive(Copy, Clone, Eq, PartialEq)]
2383pub struct FtdfLmacresetReg_SPEC;
2384impl crate::sealed::RegSpec for FtdfLmacresetReg_SPEC {
2385 type DataType = u32;
2386}
2387
2388#[doc = "Lmax reset register"]
2389pub type FtdfLmacresetReg = crate::RegValueT<FtdfLmacresetReg_SPEC>;
2390
2391impl FtdfLmacresetReg {
2392 #[doc = "If set, the LMAC performance and traffic counters will be reset.\nUse this register for functionally reset these counters."]
2393 #[inline(always)]
2394 pub fn lmacglobreset_count(
2395 self,
2396 ) -> crate::common::RegisterFieldBool<16, 1, 0, FtdfLmacresetReg_SPEC, crate::common::W> {
2397 crate::common::RegisterFieldBool::<16,1,0,FtdfLmacresetReg_SPEC,crate::common::W>::from_register(self,0)
2398 }
2399
2400 #[doc = "LmacReset_count: A \'1\' Resets LMAC timing control block (for debug and MLME-reset)"]
2401 #[inline(always)]
2402 pub fn lmacreset_timctrl(
2403 self,
2404 ) -> crate::common::RegisterFieldBool<10, 1, 0, FtdfLmacresetReg_SPEC, crate::common::W> {
2405 crate::common::RegisterFieldBool::<10,1,0,FtdfLmacresetReg_SPEC,crate::common::W>::from_register(self,0)
2406 }
2407
2408 #[doc = "LmacReset_count: A \'1\' Resets LMAC mac counters (for debug and MLME-reset)"]
2409 #[inline(always)]
2410 pub fn lmacreset_count(
2411 self,
2412 ) -> crate::common::RegisterFieldBool<9, 1, 0, FtdfLmacresetReg_SPEC, crate::common::W> {
2413 crate::common::RegisterFieldBool::<9,1,0,FtdfLmacresetReg_SPEC,crate::common::W>::from_register(self,0)
2414 }
2415
2416 #[doc = "LmacReset_sec: A \'1\' Resets LMAC security (for debug and MLME-reset)\n\n#$LmacReset_wutim@on_off_regmap\n#LmacReset_wutim: A \'1\' Resets LMAC wake-up timer (for debug and MLME-reset)"]
2417 #[inline(always)]
2418 pub fn lmacreset_sec(
2419 self,
2420 ) -> crate::common::RegisterFieldBool<7, 1, 0, FtdfLmacresetReg_SPEC, crate::common::W> {
2421 crate::common::RegisterFieldBool::<7,1,0,FtdfLmacresetReg_SPEC,crate::common::W>::from_register(self,0)
2422 }
2423
2424 #[doc = "LmacReset_tstim: A \'1\' Resets LMAC timestamp timer (for debug and MLME-reset)"]
2425 #[inline(always)]
2426 pub fn lmacreset_tstim(
2427 self,
2428 ) -> crate::common::RegisterFieldBool<6, 1, 0, FtdfLmacresetReg_SPEC, crate::common::W> {
2429 crate::common::RegisterFieldBool::<6,1,0,FtdfLmacresetReg_SPEC,crate::common::W>::from_register(self,0)
2430 }
2431
2432 #[doc = "LmacReset_oreg: A \'1\' Resets LMAC on_off regmap (for debug and MLME-reset)\n\n#$LmacReset_areg@on_off_regmap\n#LmacReset_areg: A \'1\' Resets LMAC always_on regmap (for debug and MLME-reset)"]
2433 #[inline(always)]
2434 pub fn lmacreset_oreg(
2435 self,
2436 ) -> crate::common::RegisterFieldBool<4, 1, 0, FtdfLmacresetReg_SPEC, crate::common::W> {
2437 crate::common::RegisterFieldBool::<4,1,0,FtdfLmacresetReg_SPEC,crate::common::W>::from_register(self,0)
2438 }
2439
2440 #[doc = "LmacReset_ahb: A \'1\' Resets LMAC ahb interface (for debug and MLME-reset)"]
2441 #[inline(always)]
2442 pub fn lmacreset_ahb(
2443 self,
2444 ) -> crate::common::RegisterFieldBool<3, 1, 0, FtdfLmacresetReg_SPEC, crate::common::W> {
2445 crate::common::RegisterFieldBool::<3,1,0,FtdfLmacresetReg_SPEC,crate::common::W>::from_register(self,0)
2446 }
2447
2448 #[doc = "LmacReset_tx: A \'1\' Resets LMAC tx pipeline (for debug and MLME-reset)"]
2449 #[inline(always)]
2450 pub fn lmacreset_tx(
2451 self,
2452 ) -> crate::common::RegisterFieldBool<2, 1, 0, FtdfLmacresetReg_SPEC, crate::common::W> {
2453 crate::common::RegisterFieldBool::<2,1,0,FtdfLmacresetReg_SPEC,crate::common::W>::from_register(self,0)
2454 }
2455
2456 #[doc = "LmacReset_rx: A \'1\' Resets LMAC rx pipeline (for debug and MLME-reset)"]
2457 #[inline(always)]
2458 pub fn lmacreset_rx(
2459 self,
2460 ) -> crate::common::RegisterFieldBool<1, 1, 0, FtdfLmacresetReg_SPEC, crate::common::W> {
2461 crate::common::RegisterFieldBool::<1,1,0,FtdfLmacresetReg_SPEC,crate::common::W>::from_register(self,0)
2462 }
2463
2464 #[doc = "LmacReset_control: A \'1\' Resets LMAC Controller (for debug and MLME-reset)"]
2465 #[inline(always)]
2466 pub fn lmacreset_control(
2467 self,
2468 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfLmacresetReg_SPEC, crate::common::W> {
2469 crate::common::RegisterFieldBool::<0,1,0,FtdfLmacresetReg_SPEC,crate::common::W>::from_register(self,0)
2470 }
2471}
2472impl ::core::default::Default for FtdfLmacresetReg {
2473 #[inline(always)]
2474 fn default() -> FtdfLmacresetReg {
2475 <crate::RegValueT<FtdfLmacresetReg_SPEC> as RegisterValue<_>>::new(0)
2476 }
2477}
2478
2479#[doc(hidden)]
2480#[derive(Copy, Clone, Eq, PartialEq)]
2481pub struct FtdfLmacControl0Reg_SPEC;
2482impl crate::sealed::RegSpec for FtdfLmacControl0Reg_SPEC {
2483 type DataType = u32;
2484}
2485
2486#[doc = "Lmac control register"]
2487pub type FtdfLmacControl0Reg = crate::RegValueT<FtdfLmacControl0Reg_SPEC>;
2488
2489impl FtdfLmacControl0Reg {
2490 #[doc = "When the transmit or receive action is ready (LmacReady4Sleep will is set), the phy_en signal is cleared unless the control register keep_phy_en is set.\nWhen the control register keep_phy_en is set, the signal phy_en shall remain being set until the keep_phy_en is cleared."]
2491 #[inline(always)]
2492 pub fn keep_phy_en(
2493 self,
2494 ) -> crate::common::RegisterFieldBool<31, 1, 0, FtdfLmacControl0Reg_SPEC, crate::common::RW>
2495 {
2496 crate::common::RegisterFieldBool::<31,1,0,FtdfLmacControl0Reg_SPEC,crate::common::RW>::from_register(self,0)
2497 }
2498
2499 #[doc = "Info to arbiter if phy_en is set"]
2500 #[inline(always)]
2501 pub fn pti(
2502 self,
2503 ) -> crate::common::RegisterField<
2504 27,
2505 0xf,
2506 1,
2507 0,
2508 u8,
2509 u8,
2510 FtdfLmacControl0Reg_SPEC,
2511 crate::common::RW,
2512 > {
2513 crate::common::RegisterField::<
2514 27,
2515 0xf,
2516 1,
2517 0,
2518 u8,
2519 u8,
2520 FtdfLmacControl0Reg_SPEC,
2521 crate::common::RW,
2522 >::from_register(self, 0)
2523 }
2524
2525 #[doc = "If set, the receiver shall be always on if\nRxEnable is set"]
2526 #[inline(always)]
2527 pub fn rxalwayson(
2528 self,
2529 ) -> crate::common::RegisterFieldBool<25, 1, 0, FtdfLmacControl0Reg_SPEC, crate::common::RW>
2530 {
2531 crate::common::RegisterFieldBool::<25,1,0,FtdfLmacControl0Reg_SPEC,crate::common::RW>::from_register(self,0)
2532 }
2533
2534 #[doc = "Time the Rx must be on"]
2535 #[inline(always)]
2536 pub fn rxonduration(
2537 self,
2538 ) -> crate::common::RegisterField<
2539 1,
2540 0xffffff,
2541 1,
2542 0,
2543 u32,
2544 u32,
2545 FtdfLmacControl0Reg_SPEC,
2546 crate::common::RW,
2547 > {
2548 crate::common::RegisterField::<
2549 1,
2550 0xffffff,
2551 1,
2552 0,
2553 u32,
2554 u32,
2555 FtdfLmacControl0Reg_SPEC,
2556 crate::common::RW,
2557 >::from_register(self, 0)
2558 }
2559}
2560impl ::core::default::Default for FtdfLmacControl0Reg {
2561 #[inline(always)]
2562 fn default() -> FtdfLmacControl0Reg {
2563 <crate::RegValueT<FtdfLmacControl0Reg_SPEC> as RegisterValue<_>>::new(0)
2564 }
2565}
2566
2567#[doc(hidden)]
2568#[derive(Copy, Clone, Eq, PartialEq)]
2569pub struct FtdfLmacControl10Reg_SPEC;
2570impl crate::sealed::RegSpec for FtdfLmacControl10Reg_SPEC {
2571 type DataType = u32;
2572}
2573
2574#[doc = "Lmac control register"]
2575pub type FtdfLmacControl10Reg = crate::RegValueT<FtdfLmacControl10Reg_SPEC>;
2576
2577impl FtdfLmacControl10Reg {
2578 #[doc = "If the current RZtime is less or Equal to macRZzeroVal an RZtime with value zero is inserted in the wakeup frame"]
2579 #[inline(always)]
2580 pub fn macrzzeroval(
2581 self,
2582 ) -> crate::common::RegisterField<
2583 28,
2584 0xf,
2585 1,
2586 0,
2587 u8,
2588 u8,
2589 FtdfLmacControl10Reg_SPEC,
2590 crate::common::RW,
2591 > {
2592 crate::common::RegisterField::<
2593 28,
2594 0xf,
2595 1,
2596 0,
2597 u8,
2598 u8,
2599 FtdfLmacControl10Reg_SPEC,
2600 crate::common::RW,
2601 >::from_register(self, 0)
2602 }
2603
2604 #[doc = "The UMAC can set the margin for the expected frame by control register macCSLmarginRZ (in 10 sym).\nSo the LMAC will make sure the receiver is ready to receive data this amount of time earlier than to be expected by the received RZ time"]
2605 #[inline(always)]
2606 pub fn maccslmarginrz(
2607 self,
2608 ) -> crate::common::RegisterField<
2609 16,
2610 0xf,
2611 1,
2612 0,
2613 u8,
2614 u8,
2615 FtdfLmacControl10Reg_SPEC,
2616 crate::common::RW,
2617 > {
2618 crate::common::RegisterField::<
2619 16,
2620 0xf,
2621 1,
2622 0,
2623 u8,
2624 u8,
2625 FtdfLmacControl10Reg_SPEC,
2626 crate::common::RW,
2627 >::from_register(self, 0)
2628 }
2629
2630 #[doc = "This register shall be used if the Wake-up frame to be transmitted is larger than 15 octets.\nIt shall indicate the amount of extra data in a Wake-up frame after the RZ position in the frame (in 10 sym)."]
2631 #[inline(always)]
2632 pub fn macwurzcorrection(
2633 self,
2634 ) -> crate::common::RegisterField<
2635 0,
2636 0xff,
2637 1,
2638 0,
2639 u8,
2640 u8,
2641 FtdfLmacControl10Reg_SPEC,
2642 crate::common::RW,
2643 > {
2644 crate::common::RegisterField::<
2645 0,
2646 0xff,
2647 1,
2648 0,
2649 u8,
2650 u8,
2651 FtdfLmacControl10Reg_SPEC,
2652 crate::common::RW,
2653 >::from_register(self, 0)
2654 }
2655}
2656impl ::core::default::Default for FtdfLmacControl10Reg {
2657 #[inline(always)]
2658 fn default() -> FtdfLmacControl10Reg {
2659 <crate::RegValueT<FtdfLmacControl10Reg_SPEC> as RegisterValue<_>>::new(536870912)
2660 }
2661}
2662
2663#[doc(hidden)]
2664#[derive(Copy, Clone, Eq, PartialEq)]
2665pub struct FtdfLmacControl11Reg_SPEC;
2666impl crate::sealed::RegSpec for FtdfLmacControl11Reg_SPEC {
2667 type DataType = u32;
2668}
2669
2670#[doc = "Lmac control register"]
2671pub type FtdfLmacControl11Reg = crate::RegValueT<FtdfLmacControl11Reg_SPEC>;
2672
2673impl FtdfLmacControl11Reg {
2674 #[doc = "This switching off and on of the PHY Rx can be disabled whith the control register macDisCaRxOfftoRZ.\n0 : Disabled\n1 : Enabled"]
2675 #[inline(always)]
2676 pub fn macdiscarxofftorz(
2677 self,
2678 ) -> crate::common::RegisterFieldBool<16, 1, 0, FtdfLmacControl11Reg_SPEC, crate::common::RW>
2679 {
2680 crate::common::RegisterFieldBool::<16,1,0,FtdfLmacControl11Reg_SPEC,crate::common::RW>::from_register(self,0)
2681 }
2682
2683 #[doc = "In order to make it easier to calculate if it is efficient to disable and enable the PHY Rx until the RZ time is reached, a control register indicates the time needed to disable and enable the PHY Rx: macRxTotalCycleTime (resolution in 10 sym)"]
2684 #[inline(always)]
2685 pub fn macrxtotalcycletime(
2686 self,
2687 ) -> crate::common::RegisterField<
2688 0,
2689 0xffff,
2690 1,
2691 0,
2692 u16,
2693 u16,
2694 FtdfLmacControl11Reg_SPEC,
2695 crate::common::RW,
2696 > {
2697 crate::common::RegisterField::<
2698 0,
2699 0xffff,
2700 1,
2701 0,
2702 u16,
2703 u16,
2704 FtdfLmacControl11Reg_SPEC,
2705 crate::common::RW,
2706 >::from_register(self, 0)
2707 }
2708}
2709impl ::core::default::Default for FtdfLmacControl11Reg {
2710 #[inline(always)]
2711 fn default() -> FtdfLmacControl11Reg {
2712 <crate::RegValueT<FtdfLmacControl11Reg_SPEC> as RegisterValue<_>>::new(0)
2713 }
2714}
2715
2716#[doc(hidden)]
2717#[derive(Copy, Clone, Eq, PartialEq)]
2718pub struct FtdfLmacControl1Reg_SPEC;
2719impl crate::sealed::RegSpec for FtdfLmacControl1Reg_SPEC {
2720 type DataType = u32;
2721}
2722
2723#[doc = "Lmac control register"]
2724pub type FtdfLmacControl1Reg = crate::RegValueT<FtdfLmacControl1Reg_SPEC>;
2725
2726impl FtdfLmacControl1Reg {
2727 #[doc = "HighSide injection."]
2728 #[inline(always)]
2729 pub fn phyrxattr_hsi(
2730 self,
2731 ) -> crate::common::RegisterFieldBool<15, 1, 0, FtdfLmacControl1Reg_SPEC, crate::common::RW>
2732 {
2733 crate::common::RegisterFieldBool::<15,1,0,FtdfLmacControl1Reg_SPEC,crate::common::RW>::from_register(self,0)
2734 }
2735
2736 #[doc = "Slot-basis signals mapped on GPIO via PPA."]
2737 #[inline(always)]
2738 pub fn phyrxattr_rf_gpio_pins(
2739 self,
2740 ) -> crate::common::RegisterField<
2741 12,
2742 0x7,
2743 1,
2744 0,
2745 u8,
2746 u8,
2747 FtdfLmacControl1Reg_SPEC,
2748 crate::common::RW,
2749 > {
2750 crate::common::RegisterField::<
2751 12,
2752 0x7,
2753 1,
2754 0,
2755 u8,
2756 u8,
2757 FtdfLmacControl1Reg_SPEC,
2758 crate::common::RW,
2759 >::from_register(self, 0)
2760 }
2761
2762 #[doc = "CalCap value."]
2763 #[inline(always)]
2764 pub fn phyrxattr_calcap(
2765 self,
2766 ) -> crate::common::RegisterField<
2767 8,
2768 0xf,
2769 1,
2770 0,
2771 u8,
2772 u8,
2773 FtdfLmacControl1Reg_SPEC,
2774 crate::common::RW,
2775 > {
2776 crate::common::RegisterField::<
2777 8,
2778 0xf,
2779 1,
2780 0,
2781 u8,
2782 u8,
2783 FtdfLmacControl1Reg_SPEC,
2784 crate::common::RW,
2785 >::from_register(self, 0)
2786 }
2787
2788 #[doc = "Channel Number."]
2789 #[inline(always)]
2790 pub fn phyrxattr_cn(
2791 self,
2792 ) -> crate::common::RegisterField<
2793 4,
2794 0xf,
2795 1,
2796 0,
2797 u8,
2798 u8,
2799 FtdfLmacControl1Reg_SPEC,
2800 crate::common::RW,
2801 > {
2802 crate::common::RegisterField::<
2803 4,
2804 0xf,
2805 1,
2806 0,
2807 u8,
2808 u8,
2809 FtdfLmacControl1Reg_SPEC,
2810 crate::common::RW,
2811 >::from_register(self, 0)
2812 }
2813
2814 #[doc = "DEM packet information."]
2815 #[inline(always)]
2816 pub fn phyrxattr_dem_pti(
2817 self,
2818 ) -> crate::common::RegisterField<
2819 0,
2820 0xf,
2821 1,
2822 0,
2823 u8,
2824 u8,
2825 FtdfLmacControl1Reg_SPEC,
2826 crate::common::RW,
2827 > {
2828 crate::common::RegisterField::<
2829 0,
2830 0xf,
2831 1,
2832 0,
2833 u8,
2834 u8,
2835 FtdfLmacControl1Reg_SPEC,
2836 crate::common::RW,
2837 >::from_register(self, 0)
2838 }
2839}
2840impl ::core::default::Default for FtdfLmacControl1Reg {
2841 #[inline(always)]
2842 fn default() -> FtdfLmacControl1Reg {
2843 <crate::RegValueT<FtdfLmacControl1Reg_SPEC> as RegisterValue<_>>::new(0)
2844 }
2845}
2846
2847#[doc(hidden)]
2848#[derive(Copy, Clone, Eq, PartialEq)]
2849pub struct FtdfLmacControl2Reg_SPEC;
2850impl crate::sealed::RegSpec for FtdfLmacControl2Reg_SPEC {
2851 type DataType = u32;
2852}
2853
2854#[doc = "Lmac control register"]
2855pub type FtdfLmacControl2Reg = crate::RegValueT<FtdfLmacControl2Reg_SPEC>;
2856
2857impl FtdfLmacControl2Reg {
2858 #[doc = "Length of ED scan"]
2859 #[inline(always)]
2860 pub fn edscanduration(
2861 self,
2862 ) -> crate::common::RegisterField<
2863 8,
2864 0xffffff,
2865 1,
2866 0,
2867 u32,
2868 u32,
2869 FtdfLmacControl2Reg_SPEC,
2870 crate::common::RW,
2871 > {
2872 crate::common::RegisterField::<
2873 8,
2874 0xffffff,
2875 1,
2876 0,
2877 u32,
2878 u32,
2879 FtdfLmacControl2Reg_SPEC,
2880 crate::common::RW,
2881 >::from_register(self, 0)
2882 }
2883
2884 #[doc = "if set, Energy Detect scan will be done"]
2885 #[inline(always)]
2886 pub fn edscanenable(
2887 self,
2888 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfLmacControl2Reg_SPEC, crate::common::RW>
2889 {
2890 crate::common::RegisterFieldBool::<0,1,0,FtdfLmacControl2Reg_SPEC,crate::common::RW>::from_register(self,0)
2891 }
2892}
2893impl ::core::default::Default for FtdfLmacControl2Reg {
2894 #[inline(always)]
2895 fn default() -> FtdfLmacControl2Reg {
2896 <crate::RegValueT<FtdfLmacControl2Reg_SPEC> as RegisterValue<_>>::new(0)
2897 }
2898}
2899
2900#[doc(hidden)]
2901#[derive(Copy, Clone, Eq, PartialEq)]
2902pub struct FtdfLmacControl3Reg_SPEC;
2903impl crate::sealed::RegSpec for FtdfLmacControl3Reg_SPEC {
2904 type DataType = u32;
2905}
2906
2907#[doc = "Lmac control register"]
2908pub type FtdfLmacControl3Reg = crate::RegValueT<FtdfLmacControl3Reg_SPEC>;
2909
2910impl FtdfLmacControl3Reg {
2911 #[doc = "Time to wait after CCA returned "medium idle" before starting TX-ON (in us).\nNote: not applicable in TSCH mode since there macTSRxTx shall be used."]
2912 #[inline(always)]
2913 pub fn ccaidlewait(
2914 self,
2915 ) -> crate::common::RegisterField<
2916 16,
2917 0xff,
2918 1,
2919 0,
2920 u8,
2921 u8,
2922 FtdfLmacControl3Reg_SPEC,
2923 crate::common::RW,
2924 > {
2925 crate::common::RegisterField::<
2926 16,
2927 0xff,
2928 1,
2929 0,
2930 u8,
2931 u8,
2932 FtdfLmacControl3Reg_SPEC,
2933 crate::common::RW,
2934 >::from_register(self, 0)
2935 }
2936
2937 #[doc = "Max time to wait for a requested Data Frame or an announced broadcast frame"]
2938 #[inline(always)]
2939 pub fn macmaxframetotalwaittime(
2940 self,
2941 ) -> crate::common::RegisterField<
2942 0,
2943 0xffff,
2944 1,
2945 0,
2946 u16,
2947 u16,
2948 FtdfLmacControl3Reg_SPEC,
2949 crate::common::RW,
2950 > {
2951 crate::common::RegisterField::<
2952 0,
2953 0xffff,
2954 1,
2955 0,
2956 u16,
2957 u16,
2958 FtdfLmacControl3Reg_SPEC,
2959 crate::common::RW,
2960 >::from_register(self, 0)
2961 }
2962}
2963impl ::core::default::Default for FtdfLmacControl3Reg {
2964 #[inline(always)]
2965 fn default() -> FtdfLmacControl3Reg {
2966 <crate::RegValueT<FtdfLmacControl3Reg_SPEC> as RegisterValue<_>>::new(1220)
2967 }
2968}
2969
2970#[doc(hidden)]
2971#[derive(Copy, Clone, Eq, PartialEq)]
2972pub struct FtdfLmacControl4Reg_SPEC;
2973impl crate::sealed::RegSpec for FtdfLmacControl4Reg_SPEC {
2974 type DataType = u32;
2975}
2976
2977#[doc = "Lmac control register"]
2978pub type FtdfLmacControl4Reg = crate::RegValueT<FtdfLmacControl4Reg_SPEC>;
2979
2980impl FtdfLmacControl4Reg {
2981 #[doc = "HighSide injection."]
2982 #[inline(always)]
2983 pub fn phyackattr_hsi(
2984 self,
2985 ) -> crate::common::RegisterFieldBool<31, 1, 0, FtdfLmacControl4Reg_SPEC, crate::common::RW>
2986 {
2987 crate::common::RegisterFieldBool::<31,1,0,FtdfLmacControl4Reg_SPEC,crate::common::RW>::from_register(self,0)
2988 }
2989
2990 #[doc = "Slot-basis signals mapped on GPIO via PPA."]
2991 #[inline(always)]
2992 pub fn phyackattr_rf_gpio_pins(
2993 self,
2994 ) -> crate::common::RegisterField<
2995 28,
2996 0x7,
2997 1,
2998 0,
2999 u8,
3000 u8,
3001 FtdfLmacControl4Reg_SPEC,
3002 crate::common::RW,
3003 > {
3004 crate::common::RegisterField::<
3005 28,
3006 0x7,
3007 1,
3008 0,
3009 u8,
3010 u8,
3011 FtdfLmacControl4Reg_SPEC,
3012 crate::common::RW,
3013 >::from_register(self, 0)
3014 }
3015
3016 #[doc = "CalCap value."]
3017 #[inline(always)]
3018 pub fn phyackattr_calcap(
3019 self,
3020 ) -> crate::common::RegisterField<
3021 24,
3022 0xf,
3023 1,
3024 0,
3025 u8,
3026 u8,
3027 FtdfLmacControl4Reg_SPEC,
3028 crate::common::RW,
3029 > {
3030 crate::common::RegisterField::<
3031 24,
3032 0xf,
3033 1,
3034 0,
3035 u8,
3036 u8,
3037 FtdfLmacControl4Reg_SPEC,
3038 crate::common::RW,
3039 >::from_register(self, 0)
3040 }
3041
3042 #[doc = "Channel Number."]
3043 #[inline(always)]
3044 pub fn phyackattr_cn(
3045 self,
3046 ) -> crate::common::RegisterField<
3047 20,
3048 0xf,
3049 1,
3050 0,
3051 u8,
3052 u8,
3053 FtdfLmacControl4Reg_SPEC,
3054 crate::common::RW,
3055 > {
3056 crate::common::RegisterField::<
3057 20,
3058 0xf,
3059 1,
3060 0,
3061 u8,
3062 u8,
3063 FtdfLmacControl4Reg_SPEC,
3064 crate::common::RW,
3065 >::from_register(self, 0)
3066 }
3067
3068 #[doc = "DEM packet information."]
3069 #[inline(always)]
3070 pub fn phyackattr_dem_pti(
3071 self,
3072 ) -> crate::common::RegisterField<
3073 16,
3074 0xf,
3075 1,
3076 0,
3077 u8,
3078 u8,
3079 FtdfLmacControl4Reg_SPEC,
3080 crate::common::RW,
3081 > {
3082 crate::common::RegisterField::<
3083 16,
3084 0xf,
3085 1,
3086 0,
3087 u8,
3088 u8,
3089 FtdfLmacControl4Reg_SPEC,
3090 crate::common::RW,
3091 >::from_register(self, 0)
3092 }
3093
3094 #[doc = "The control register RxPipePropDelay indicates the propagation delay in ~s of the Rx pipeline between the last symbol being captured at the DPHY interface and the "data valid" indication to the LMAC controller."]
3095 #[inline(always)]
3096 pub fn rxpipepropdelay(
3097 self,
3098 ) -> crate::common::RegisterField<
3099 8,
3100 0xff,
3101 1,
3102 0,
3103 u8,
3104 u8,
3105 FtdfLmacControl4Reg_SPEC,
3106 crate::common::RW,
3107 > {
3108 crate::common::RegisterField::<
3109 8,
3110 0xff,
3111 1,
3112 0,
3113 u8,
3114 u8,
3115 FtdfLmacControl4Reg_SPEC,
3116 crate::common::RW,
3117 >::from_register(self, 0)
3118 }
3119
3120 #[doc = "Time between negate and assert PHY_EN\nWhen the signal phy_en is deasserted, it will not be asserted within the time phySleepWait.\nThis time is indicated by the control register phySleepWait (resolution: ~s)."]
3121 #[inline(always)]
3122 pub fn physleepwait(
3123 self,
3124 ) -> crate::common::RegisterField<
3125 0,
3126 0xff,
3127 1,
3128 0,
3129 u8,
3130 u8,
3131 FtdfLmacControl4Reg_SPEC,
3132 crate::common::RW,
3133 > {
3134 crate::common::RegisterField::<
3135 0,
3136 0xff,
3137 1,
3138 0,
3139 u8,
3140 u8,
3141 FtdfLmacControl4Reg_SPEC,
3142 crate::common::RW,
3143 >::from_register(self, 0)
3144 }
3145}
3146impl ::core::default::Default for FtdfLmacControl4Reg {
3147 #[inline(always)]
3148 fn default() -> FtdfLmacControl4Reg {
3149 <crate::RegValueT<FtdfLmacControl4Reg_SPEC> as RegisterValue<_>>::new(0)
3150 }
3151}
3152
3153#[doc(hidden)]
3154#[derive(Copy, Clone, Eq, PartialEq)]
3155pub struct FtdfLmacControl5Reg_SPEC;
3156impl crate::sealed::RegSpec for FtdfLmacControl5Reg_SPEC {
3157 type DataType = u32;
3158}
3159
3160#[doc = "Lmac control register"]
3161pub type FtdfLmacControl5Reg = crate::RegValueT<FtdfLmacControl5Reg_SPEC>;
3162
3163impl FtdfLmacControl5Reg {
3164 #[doc = "HighSide injection."]
3165 #[inline(always)]
3166 pub fn phycsmacaattr_hsi(
3167 self,
3168 ) -> crate::common::RegisterFieldBool<31, 1, 0, FtdfLmacControl5Reg_SPEC, crate::common::RW>
3169 {
3170 crate::common::RegisterFieldBool::<31,1,0,FtdfLmacControl5Reg_SPEC,crate::common::RW>::from_register(self,0)
3171 }
3172
3173 #[doc = "Slot-basis signals mapped on GPIO via PPA."]
3174 #[inline(always)]
3175 pub fn phycsmacaattr_rf_gpio_pins(
3176 self,
3177 ) -> crate::common::RegisterField<
3178 28,
3179 0x7,
3180 1,
3181 0,
3182 u8,
3183 u8,
3184 FtdfLmacControl5Reg_SPEC,
3185 crate::common::RW,
3186 > {
3187 crate::common::RegisterField::<
3188 28,
3189 0x7,
3190 1,
3191 0,
3192 u8,
3193 u8,
3194 FtdfLmacControl5Reg_SPEC,
3195 crate::common::RW,
3196 >::from_register(self, 0)
3197 }
3198
3199 #[doc = "CalCap value."]
3200 #[inline(always)]
3201 pub fn phycsmacaattr_calcap(
3202 self,
3203 ) -> crate::common::RegisterField<
3204 24,
3205 0xf,
3206 1,
3207 0,
3208 u8,
3209 u8,
3210 FtdfLmacControl5Reg_SPEC,
3211 crate::common::RW,
3212 > {
3213 crate::common::RegisterField::<
3214 24,
3215 0xf,
3216 1,
3217 0,
3218 u8,
3219 u8,
3220 FtdfLmacControl5Reg_SPEC,
3221 crate::common::RW,
3222 >::from_register(self, 0)
3223 }
3224
3225 #[doc = "Channel Number."]
3226 #[inline(always)]
3227 pub fn phycsmacaattr_cn(
3228 self,
3229 ) -> crate::common::RegisterField<
3230 20,
3231 0xf,
3232 1,
3233 0,
3234 u8,
3235 u8,
3236 FtdfLmacControl5Reg_SPEC,
3237 crate::common::RW,
3238 > {
3239 crate::common::RegisterField::<
3240 20,
3241 0xf,
3242 1,
3243 0,
3244 u8,
3245 u8,
3246 FtdfLmacControl5Reg_SPEC,
3247 crate::common::RW,
3248 >::from_register(self, 0)
3249 }
3250
3251 #[doc = "DEM packet information."]
3252 #[inline(always)]
3253 pub fn phycsmacaattr_dem_pti(
3254 self,
3255 ) -> crate::common::RegisterField<
3256 16,
3257 0xf,
3258 1,
3259 0,
3260 u8,
3261 u8,
3262 FtdfLmacControl5Reg_SPEC,
3263 crate::common::RW,
3264 > {
3265 crate::common::RegisterField::<
3266 16,
3267 0xf,
3268 1,
3269 0,
3270 u8,
3271 u8,
3272 FtdfLmacControl5Reg_SPEC,
3273 crate::common::RW,
3274 >::from_register(self, 0)
3275 }
3276
3277 #[doc = "The output CCASTAT is valid after 8 symbols + phyRxStartup.\nThe 8 symbols are programmable by control registerCcaStatWait\\[4\\] in symbol timesl.\nDefault value is 8d."]
3278 #[inline(always)]
3279 pub fn ccastatwait(
3280 self,
3281 ) -> crate::common::RegisterField<
3282 8,
3283 0xf,
3284 1,
3285 0,
3286 u8,
3287 u8,
3288 FtdfLmacControl5Reg_SPEC,
3289 crate::common::RW,
3290 > {
3291 crate::common::RegisterField::<
3292 8,
3293 0xf,
3294 1,
3295 0,
3296 u8,
3297 u8,
3298 FtdfLmacControl5Reg_SPEC,
3299 crate::common::RW,
3300 >::from_register(self, 0)
3301 }
3302
3303 #[doc = "In order to have some flexibility the control register Ack_Response_Delay indicates the Acknowledge response time in ~s.\nThe default value shall is 192 ~s (12 symbols)."]
3304 #[inline(always)]
3305 pub fn ack_response_delay(
3306 self,
3307 ) -> crate::common::RegisterField<
3308 0,
3309 0xff,
3310 1,
3311 0,
3312 u8,
3313 u8,
3314 FtdfLmacControl5Reg_SPEC,
3315 crate::common::RW,
3316 > {
3317 crate::common::RegisterField::<
3318 0,
3319 0xff,
3320 1,
3321 0,
3322 u8,
3323 u8,
3324 FtdfLmacControl5Reg_SPEC,
3325 crate::common::RW,
3326 >::from_register(self, 0)
3327 }
3328}
3329impl ::core::default::Default for FtdfLmacControl5Reg {
3330 #[inline(always)]
3331 fn default() -> FtdfLmacControl5Reg {
3332 <crate::RegValueT<FtdfLmacControl5Reg_SPEC> as RegisterValue<_>>::new(2240)
3333 }
3334}
3335
3336#[doc(hidden)]
3337#[derive(Copy, Clone, Eq, PartialEq)]
3338pub struct FtdfLmacControl6Reg_SPEC;
3339impl crate::sealed::RegSpec for FtdfLmacControl6Reg_SPEC {
3340 type DataType = u32;
3341}
3342
3343#[doc = "Lmac control register"]
3344pub type FtdfLmacControl6Reg = crate::RegValueT<FtdfLmacControl6Reg_SPEC>;
3345
3346impl FtdfLmacControl6Reg {
3347 #[doc = "The WakeUp IFS period is programmable by WUifsPeriod (in symbols).\nThe default is 12 symbols (192 ~s)."]
3348 #[inline(always)]
3349 pub fn wuifsperiod(
3350 self,
3351 ) -> crate::common::RegisterField<
3352 16,
3353 0xff,
3354 1,
3355 0,
3356 u8,
3357 u8,
3358 FtdfLmacControl6Reg_SPEC,
3359 crate::common::RW,
3360 > {
3361 crate::common::RegisterField::<
3362 16,
3363 0xff,
3364 1,
3365 0,
3366 u8,
3367 u8,
3368 FtdfLmacControl6Reg_SPEC,
3369 crate::common::RW,
3370 >::from_register(self, 0)
3371 }
3372
3373 #[doc = "The SIFS period is programmable by SifsPeriod (in symbols).\nThe default is 12 symbols (192 ~s)."]
3374 #[inline(always)]
3375 pub fn sifsperiod(
3376 self,
3377 ) -> crate::common::RegisterField<
3378 8,
3379 0xff,
3380 1,
3381 0,
3382 u8,
3383 u8,
3384 FtdfLmacControl6Reg_SPEC,
3385 crate::common::RW,
3386 > {
3387 crate::common::RegisterField::<
3388 8,
3389 0xff,
3390 1,
3391 0,
3392 u8,
3393 u8,
3394 FtdfLmacControl6Reg_SPEC,
3395 crate::common::RW,
3396 >::from_register(self, 0)
3397 }
3398
3399 #[doc = "The LIFS period is programmable by LifsPeriod (in symbols).\nThe default is 40 symbols (640 ~s),"]
3400 #[inline(always)]
3401 pub fn lifsperiod(
3402 self,
3403 ) -> crate::common::RegisterField<
3404 0,
3405 0xff,
3406 1,
3407 0,
3408 u8,
3409 u8,
3410 FtdfLmacControl6Reg_SPEC,
3411 crate::common::RW,
3412 > {
3413 crate::common::RegisterField::<
3414 0,
3415 0xff,
3416 1,
3417 0,
3418 u8,
3419 u8,
3420 FtdfLmacControl6Reg_SPEC,
3421 crate::common::RW,
3422 >::from_register(self, 0)
3423 }
3424}
3425impl ::core::default::Default for FtdfLmacControl6Reg {
3426 #[inline(always)]
3427 fn default() -> FtdfLmacControl6Reg {
3428 <crate::RegValueT<FtdfLmacControl6Reg_SPEC> as RegisterValue<_>>::new(789544)
3429 }
3430}
3431
3432#[doc(hidden)]
3433#[derive(Copy, Clone, Eq, PartialEq)]
3434pub struct FtdfLmacControl7Reg_SPEC;
3435impl crate::sealed::RegSpec for FtdfLmacControl7Reg_SPEC {
3436 type DataType = u32;
3437}
3438
3439#[doc = "Lmac control register"]
3440pub type FtdfLmacControl7Reg = crate::RegValueT<FtdfLmacControl7Reg_SPEC>;
3441
3442impl FtdfLmacControl7Reg {
3443 #[doc = "When performing a idle listening, the receiver is enabled for at least macCSLsamplePeriod (in symbols)."]
3444 #[inline(always)]
3445 pub fn maccslsampleperiod(
3446 self,
3447 ) -> crate::common::RegisterField<
3448 16,
3449 0xffff,
3450 1,
3451 0,
3452 u16,
3453 u16,
3454 FtdfLmacControl7Reg_SPEC,
3455 crate::common::RW,
3456 > {
3457 crate::common::RegisterField::<
3458 16,
3459 0xffff,
3460 1,
3461 0,
3462 u16,
3463 u16,
3464 FtdfLmacControl7Reg_SPEC,
3465 crate::common::RW,
3466 >::from_register(self, 0)
3467 }
3468
3469 #[doc = "Wake-up duration in symbols."]
3470 #[inline(always)]
3471 pub fn macwuperiod(
3472 self,
3473 ) -> crate::common::RegisterField<
3474 0,
3475 0xffff,
3476 1,
3477 0,
3478 u16,
3479 u16,
3480 FtdfLmacControl7Reg_SPEC,
3481 crate::common::RW,
3482 > {
3483 crate::common::RegisterField::<
3484 0,
3485 0xffff,
3486 1,
3487 0,
3488 u16,
3489 u16,
3490 FtdfLmacControl7Reg_SPEC,
3491 crate::common::RW,
3492 >::from_register(self, 0)
3493 }
3494}
3495impl ::core::default::Default for FtdfLmacControl7Reg {
3496 #[inline(always)]
3497 fn default() -> FtdfLmacControl7Reg {
3498 <crate::RegValueT<FtdfLmacControl7Reg_SPEC> as RegisterValue<_>>::new(4325376)
3499 }
3500}
3501
3502#[doc(hidden)]
3503#[derive(Copy, Clone, Eq, PartialEq)]
3504pub struct FtdfLmacControl8Reg_SPEC;
3505impl crate::sealed::RegSpec for FtdfLmacControl8Reg_SPEC {
3506 type DataType = u32;
3507}
3508
3509#[doc = "Lmac control register"]
3510pub type FtdfLmacControl8Reg = crate::RegValueT<FtdfLmacControl8Reg_SPEC>;
3511
3512impl FtdfLmacControl8Reg {
3513 #[doc = "The control register macCSLstartSampleTime indicates the TimeStamp generator time (in symbols) when to start listening (called "idle listening")."]
3514 #[inline(always)]
3515 pub fn maccslstartsampletime(
3516 self,
3517 ) -> crate::common::RegisterField<
3518 0,
3519 0xffffffff,
3520 1,
3521 0,
3522 u32,
3523 u32,
3524 FtdfLmacControl8Reg_SPEC,
3525 crate::common::RW,
3526 > {
3527 crate::common::RegisterField::<
3528 0,
3529 0xffffffff,
3530 1,
3531 0,
3532 u32,
3533 u32,
3534 FtdfLmacControl8Reg_SPEC,
3535 crate::common::RW,
3536 >::from_register(self, 0)
3537 }
3538}
3539impl ::core::default::Default for FtdfLmacControl8Reg {
3540 #[inline(always)]
3541 fn default() -> FtdfLmacControl8Reg {
3542 <crate::RegValueT<FtdfLmacControl8Reg_SPEC> as RegisterValue<_>>::new(0)
3543 }
3544}
3545
3546#[doc(hidden)]
3547#[derive(Copy, Clone, Eq, PartialEq)]
3548pub struct FtdfLmacControl9Reg_SPEC;
3549impl crate::sealed::RegSpec for FtdfLmacControl9Reg_SPEC {
3550 type DataType = u32;
3551}
3552
3553#[doc = "Lmac control register"]
3554pub type FtdfLmacControl9Reg = crate::RegValueT<FtdfLmacControl9Reg_SPEC>;
3555
3556impl FtdfLmacControl9Reg {
3557 #[doc = "If a non Wake-up frame with Frame Pending bit = \'1\' is received, the receiver is enabled for at least an extra period of macCSLFramePendingWaitT (in symbols) after the end of the received frame.\nThe time the Enhanced ACK transmission lasts (if applicable) is included in this time."]
3558 #[inline(always)]
3559 pub fn maccslframependingwaitt(
3560 self,
3561 ) -> crate::common::RegisterField<
3562 16,
3563 0xffff,
3564 1,
3565 0,
3566 u16,
3567 u16,
3568 FtdfLmacControl9Reg_SPEC,
3569 crate::common::RW,
3570 > {
3571 crate::common::RegisterField::<
3572 16,
3573 0xffff,
3574 1,
3575 0,
3576 u16,
3577 u16,
3578 FtdfLmacControl9Reg_SPEC,
3579 crate::common::RW,
3580 >::from_register(self, 0)
3581 }
3582
3583 #[doc = "After the wake-up sequence a frame is expected, the receiver will be enabled for at least a period of macCSLdataPeriod (in symbols)."]
3584 #[inline(always)]
3585 pub fn maccsldataperiod(
3586 self,
3587 ) -> crate::common::RegisterField<
3588 0,
3589 0xffff,
3590 1,
3591 0,
3592 u16,
3593 u16,
3594 FtdfLmacControl9Reg_SPEC,
3595 crate::common::RW,
3596 > {
3597 crate::common::RegisterField::<
3598 0,
3599 0xffff,
3600 1,
3601 0,
3602 u16,
3603 u16,
3604 FtdfLmacControl9Reg_SPEC,
3605 crate::common::RW,
3606 >::from_register(self, 0)
3607 }
3608}
3609impl ::core::default::Default for FtdfLmacControl9Reg {
3610 #[inline(always)]
3611 fn default() -> FtdfLmacControl9Reg {
3612 <crate::RegValueT<FtdfLmacControl9Reg_SPEC> as RegisterValue<_>>::new(66)
3613 }
3614}
3615
3616#[doc(hidden)]
3617#[derive(Copy, Clone, Eq, PartialEq)]
3618pub struct FtdfLmacControlDeltaReg_SPEC;
3619impl crate::sealed::RegSpec for FtdfLmacControlDeltaReg_SPEC {
3620 type DataType = u32;
3621}
3622
3623#[doc = "Lmac delta control register"]
3624pub type FtdfLmacControlDeltaReg = crate::RegValueT<FtdfLmacControlDeltaReg_SPEC>;
3625
3626impl FtdfLmacControlDeltaReg {
3627 #[doc = "Delta which indicates that WakeupTimerEnableStatus has changed"]
3628 #[inline(always)]
3629 pub fn wakeuptimerenablestatus_d(
3630 self,
3631 ) -> crate::common::RegisterFieldBool<6, 1, 0, FtdfLmacControlDeltaReg_SPEC, crate::common::RW>
3632 {
3633 crate::common::RegisterFieldBool::<6,1,0,FtdfLmacControlDeltaReg_SPEC,crate::common::RW>::from_register(self,0)
3634 }
3635
3636 #[doc = "Event which indicates the getGeneratorVal request is completed"]
3637 #[inline(always)]
3638 pub fn getgeneratorval_e(
3639 self,
3640 ) -> crate::common::RegisterFieldBool<5, 1, 0, FtdfLmacControlDeltaReg_SPEC, crate::common::RW>
3641 {
3642 crate::common::RegisterFieldBool::<5,1,0,FtdfLmacControlDeltaReg_SPEC,crate::common::RW>::from_register(self,0)
3643 }
3644
3645 #[doc = "Event that symboltime counter matched SymbolTime2Thr"]
3646 #[inline(always)]
3647 pub fn symboltime2thr_e(
3648 self,
3649 ) -> crate::common::RegisterFieldBool<4, 1, 0, FtdfLmacControlDeltaReg_SPEC, crate::common::RW>
3650 {
3651 crate::common::RegisterFieldBool::<4,1,0,FtdfLmacControlDeltaReg_SPEC,crate::common::RW>::from_register(self,0)
3652 }
3653
3654 #[doc = "Event that symboltime counter matched SymbolTimeThr"]
3655 #[inline(always)]
3656 pub fn symboltimethr_e(
3657 self,
3658 ) -> crate::common::RegisterFieldBool<3, 1, 0, FtdfLmacControlDeltaReg_SPEC, crate::common::RW>
3659 {
3660 crate::common::RegisterFieldBool::<3,1,0,FtdfLmacControlDeltaReg_SPEC,crate::common::RW>::from_register(self,0)
3661 }
3662
3663 #[doc = "The SyncTimeStamp_e event is set when the TimeStampgenerator is loaded with SyncTimeStampVal.\nThis occurs at the rising edge of lp_clk when SyncTimeStampEna is set and the value of the Event generator is equal to the value SyncTimestampThr."]
3664 #[inline(always)]
3665 pub fn synctimestamp_e(
3666 self,
3667 ) -> crate::common::RegisterFieldBool<2, 1, 0, FtdfLmacControlDeltaReg_SPEC, crate::common::RW>
3668 {
3669 crate::common::RegisterFieldBool::<2,1,0,FtdfLmacControlDeltaReg_SPEC,crate::common::RW>::from_register(self,0)
3670 }
3671
3672 #[doc = "Delta bit for register "LmacReady4sleep""]
3673 #[inline(always)]
3674 pub fn lmacready4sleep_d(
3675 self,
3676 ) -> crate::common::RegisterFieldBool<1, 1, 0, FtdfLmacControlDeltaReg_SPEC, crate::common::RW>
3677 {
3678 crate::common::RegisterFieldBool::<1,1,0,FtdfLmacControlDeltaReg_SPEC,crate::common::RW>::from_register(self,0)
3679 }
3680}
3681impl ::core::default::Default for FtdfLmacControlDeltaReg {
3682 #[inline(always)]
3683 fn default() -> FtdfLmacControlDeltaReg {
3684 <crate::RegValueT<FtdfLmacControlDeltaReg_SPEC> as RegisterValue<_>>::new(0)
3685 }
3686}
3687
3688#[doc(hidden)]
3689#[derive(Copy, Clone, Eq, PartialEq)]
3690pub struct FtdfLmacControlMaskReg_SPEC;
3691impl crate::sealed::RegSpec for FtdfLmacControlMaskReg_SPEC {
3692 type DataType = u32;
3693}
3694
3695#[doc = "Lmac mask control register"]
3696pub type FtdfLmacControlMaskReg = crate::RegValueT<FtdfLmacControlMaskReg_SPEC>;
3697
3698impl FtdfLmacControlMaskReg {
3699 #[doc = "Mask for WakeupTimerEnableStatus_d"]
3700 #[inline(always)]
3701 pub fn wakeuptimerenablestatus_m(
3702 self,
3703 ) -> crate::common::RegisterFieldBool<6, 1, 0, FtdfLmacControlMaskReg_SPEC, crate::common::RW>
3704 {
3705 crate::common::RegisterFieldBool::<6,1,0,FtdfLmacControlMaskReg_SPEC,crate::common::RW>::from_register(self,0)
3706 }
3707
3708 #[doc = "Mask for getGeneratorVal_e"]
3709 #[inline(always)]
3710 pub fn getgeneratorval_m(
3711 self,
3712 ) -> crate::common::RegisterFieldBool<5, 1, 0, FtdfLmacControlMaskReg_SPEC, crate::common::RW>
3713 {
3714 crate::common::RegisterFieldBool::<5,1,0,FtdfLmacControlMaskReg_SPEC,crate::common::RW>::from_register(self,0)
3715 }
3716
3717 #[doc = "Mask for SymbolTime2Thr_e"]
3718 #[inline(always)]
3719 pub fn symboltime2thr_m(
3720 self,
3721 ) -> crate::common::RegisterFieldBool<4, 1, 0, FtdfLmacControlMaskReg_SPEC, crate::common::RW>
3722 {
3723 crate::common::RegisterFieldBool::<4,1,0,FtdfLmacControlMaskReg_SPEC,crate::common::RW>::from_register(self,0)
3724 }
3725
3726 #[doc = "Mask for SymbolTimeThr_e"]
3727 #[inline(always)]
3728 pub fn symboltimethr_m(
3729 self,
3730 ) -> crate::common::RegisterFieldBool<3, 1, 0, FtdfLmacControlMaskReg_SPEC, crate::common::RW>
3731 {
3732 crate::common::RegisterFieldBool::<3,1,0,FtdfLmacControlMaskReg_SPEC,crate::common::RW>::from_register(self,0)
3733 }
3734
3735 #[doc = "Mask bit for event register SyncTimeStamp_e."]
3736 #[inline(always)]
3737 pub fn synctimestamp_m(
3738 self,
3739 ) -> crate::common::RegisterFieldBool<2, 1, 0, FtdfLmacControlMaskReg_SPEC, crate::common::RW>
3740 {
3741 crate::common::RegisterFieldBool::<2,1,0,FtdfLmacControlMaskReg_SPEC,crate::common::RW>::from_register(self,0)
3742 }
3743
3744 #[doc = "Mask bit for delta bit "LmacReady4sleep_d""]
3745 #[inline(always)]
3746 pub fn lmacready4sleep_m(
3747 self,
3748 ) -> crate::common::RegisterFieldBool<1, 1, 0, FtdfLmacControlMaskReg_SPEC, crate::common::RW>
3749 {
3750 crate::common::RegisterFieldBool::<1,1,0,FtdfLmacControlMaskReg_SPEC,crate::common::RW>::from_register(self,0)
3751 }
3752}
3753impl ::core::default::Default for FtdfLmacControlMaskReg {
3754 #[inline(always)]
3755 fn default() -> FtdfLmacControlMaskReg {
3756 <crate::RegValueT<FtdfLmacControlMaskReg_SPEC> as RegisterValue<_>>::new(0)
3757 }
3758}
3759
3760#[doc(hidden)]
3761#[derive(Copy, Clone, Eq, PartialEq)]
3762pub struct FtdfLmacControlOsReg_SPEC;
3763impl crate::sealed::RegSpec for FtdfLmacControlOsReg_SPEC {
3764 type DataType = u32;
3765}
3766
3767#[doc = "Lmac control register"]
3768pub type FtdfLmacControlOsReg = crate::RegValueT<FtdfLmacControlOsReg_SPEC>;
3769
3770impl FtdfLmacControlOsReg {
3771 #[doc = "If set, a single CCA will be performed."]
3772 #[inline(always)]
3773 pub fn singlecca(
3774 self,
3775 ) -> crate::common::RegisterFieldBool<2, 1, 0, FtdfLmacControlOsReg_SPEC, crate::common::W>
3776 {
3777 crate::common::RegisterFieldBool::<2,1,0,FtdfLmacControlOsReg_SPEC,crate::common::W>::from_register(self,0)
3778 }
3779
3780 #[doc = "If set, receiving data may be done"]
3781 #[inline(always)]
3782 pub fn rxenable(
3783 self,
3784 ) -> crate::common::RegisterFieldBool<1, 1, 0, FtdfLmacControlOsReg_SPEC, crate::common::W>
3785 {
3786 crate::common::RegisterFieldBool::<1,1,0,FtdfLmacControlOsReg_SPEC,crate::common::W>::from_register(self,0)
3787 }
3788
3789 #[doc = "If set, the current values of WU gen and TS gen will be captured."]
3790 #[inline(always)]
3791 pub fn getgeneratorval(
3792 self,
3793 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfLmacControlOsReg_SPEC, crate::common::W>
3794 {
3795 crate::common::RegisterFieldBool::<0,1,0,FtdfLmacControlOsReg_SPEC,crate::common::W>::from_register(self,0)
3796 }
3797}
3798impl ::core::default::Default for FtdfLmacControlOsReg {
3799 #[inline(always)]
3800 fn default() -> FtdfLmacControlOsReg {
3801 <crate::RegValueT<FtdfLmacControlOsReg_SPEC> as RegisterValue<_>>::new(0)
3802 }
3803}
3804
3805#[doc(hidden)]
3806#[derive(Copy, Clone, Eq, PartialEq)]
3807pub struct FtdfLmacControlStatusReg_SPEC;
3808impl crate::sealed::RegSpec for FtdfLmacControlStatusReg_SPEC {
3809 type DataType = u32;
3810}
3811
3812#[doc = "Lmac status register"]
3813pub type FtdfLmacControlStatusReg = crate::RegValueT<FtdfLmacControlStatusReg_SPEC>;
3814
3815impl FtdfLmacControlStatusReg {
3816 #[doc = "Result of ED scan."]
3817 #[inline(always)]
3818 pub fn edscanvalue(
3819 self,
3820 ) -> crate::common::RegisterField<
3821 8,
3822 0xff,
3823 1,
3824 0,
3825 u8,
3826 u8,
3827 FtdfLmacControlStatusReg_SPEC,
3828 crate::common::R,
3829 > {
3830 crate::common::RegisterField::<
3831 8,
3832 0xff,
3833 1,
3834 0,
3835 u8,
3836 u8,
3837 FtdfLmacControlStatusReg_SPEC,
3838 crate::common::R,
3839 >::from_register(self, 0)
3840 }
3841
3842 #[doc = "Status of WakeupTimerEnable after being clocked by LP_CLK (showing it\'s effective value)."]
3843 #[inline(always)]
3844 pub fn wakeuptimerenablestatus(
3845 self,
3846 ) -> crate::common::RegisterFieldBool<6, 1, 0, FtdfLmacControlStatusReg_SPEC, crate::common::R>
3847 {
3848 crate::common::RegisterFieldBool::<6,1,0,FtdfLmacControlStatusReg_SPEC,crate::common::R>::from_register(self,0)
3849 }
3850
3851 #[doc = "Value single CCA when CCAstat_e is set."]
3852 #[inline(always)]
3853 pub fn ccastat(
3854 self,
3855 ) -> crate::common::RegisterFieldBool<2, 1, 0, FtdfLmacControlStatusReg_SPEC, crate::common::R>
3856 {
3857 crate::common::RegisterFieldBool::<2,1,0,FtdfLmacControlStatusReg_SPEC,crate::common::R>::from_register(self,0)
3858 }
3859
3860 #[doc = "Indicates that the LMAC is ready to go to sleep."]
3861 #[inline(always)]
3862 pub fn lmacready4sleep(
3863 self,
3864 ) -> crate::common::RegisterFieldBool<1, 1, 0, FtdfLmacControlStatusReg_SPEC, crate::common::R>
3865 {
3866 crate::common::RegisterFieldBool::<1,1,0,FtdfLmacControlStatusReg_SPEC,crate::common::R>::from_register(self,0)
3867 }
3868}
3869impl ::core::default::Default for FtdfLmacControlStatusReg {
3870 #[inline(always)]
3871 fn default() -> FtdfLmacControlStatusReg {
3872 <crate::RegValueT<FtdfLmacControlStatusReg_SPEC> as RegisterValue<_>>::new(0)
3873 }
3874}
3875
3876#[doc(hidden)]
3877#[derive(Copy, Clone, Eq, PartialEq)]
3878pub struct FtdfLmacEventReg_SPEC;
3879impl crate::sealed::RegSpec for FtdfLmacEventReg_SPEC {
3880 type DataType = u32;
3881}
3882
3883#[doc = "Lmac event regsiter"]
3884pub type FtdfLmacEventReg = crate::RegValueT<FtdfLmacEventReg_SPEC>;
3885
3886impl FtdfLmacEventReg {
3887 #[doc = "Set if one of the timers enabling the RX-ON mode expires without having received any valid frame"]
3888 #[inline(always)]
3889 pub fn rxtimerexpired_e(
3890 self,
3891 ) -> crate::common::RegisterFieldBool<2, 1, 0, FtdfLmacEventReg_SPEC, crate::common::RW> {
3892 crate::common::RegisterFieldBool::<2,1,0,FtdfLmacEventReg_SPEC,crate::common::RW>::from_register(self,0)
3893 }
3894
3895 #[doc = "If set, the single CCA is ready"]
3896 #[inline(always)]
3897 pub fn ccastat_e(
3898 self,
3899 ) -> crate::common::RegisterFieldBool<1, 1, 0, FtdfLmacEventReg_SPEC, crate::common::RW> {
3900 crate::common::RegisterFieldBool::<1,1,0,FtdfLmacEventReg_SPEC,crate::common::RW>::from_register(self,0)
3901 }
3902
3903 #[doc = "The event EdScanReady_e is set to notify that the ED scan is ready."]
3904 #[inline(always)]
3905 pub fn edscanready_e(
3906 self,
3907 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfLmacEventReg_SPEC, crate::common::RW> {
3908 crate::common::RegisterFieldBool::<0,1,0,FtdfLmacEventReg_SPEC,crate::common::RW>::from_register(self,0)
3909 }
3910}
3911impl ::core::default::Default for FtdfLmacEventReg {
3912 #[inline(always)]
3913 fn default() -> FtdfLmacEventReg {
3914 <crate::RegValueT<FtdfLmacEventReg_SPEC> as RegisterValue<_>>::new(0)
3915 }
3916}
3917
3918#[doc(hidden)]
3919#[derive(Copy, Clone, Eq, PartialEq)]
3920pub struct FtdfLmacManual1Reg_SPEC;
3921impl crate::sealed::RegSpec for FtdfLmacManual1Reg_SPEC {
3922 type DataType = u32;
3923}
3924
3925#[doc = "Lmax manual PHY register"]
3926pub type FtdfLmacManual1Reg = crate::RegValueT<FtdfLmacManual1Reg_SPEC>;
3927
3928impl FtdfLmacManual1Reg {
3929 #[doc = "HighSide injection."]
3930 #[inline(always)]
3931 pub fn lmac_manual_phy_attr_hsi(
3932 self,
3933 ) -> crate::common::RegisterFieldBool<31, 1, 0, FtdfLmacManual1Reg_SPEC, crate::common::RW>
3934 {
3935 crate::common::RegisterFieldBool::<31,1,0,FtdfLmacManual1Reg_SPEC,crate::common::RW>::from_register(self,0)
3936 }
3937
3938 #[doc = "Slot-basis signals mapped on GPIO via PPA."]
3939 #[inline(always)]
3940 pub fn lmac_manual_phy_attr_rf_gpio_pins(
3941 self,
3942 ) -> crate::common::RegisterField<
3943 28,
3944 0x7,
3945 1,
3946 0,
3947 u8,
3948 u8,
3949 FtdfLmacManual1Reg_SPEC,
3950 crate::common::RW,
3951 > {
3952 crate::common::RegisterField::<
3953 28,
3954 0x7,
3955 1,
3956 0,
3957 u8,
3958 u8,
3959 FtdfLmacManual1Reg_SPEC,
3960 crate::common::RW,
3961 >::from_register(self, 0)
3962 }
3963
3964 #[doc = "CalCap value."]
3965 #[inline(always)]
3966 pub fn lmac_manual_phy_attr_calcap(
3967 self,
3968 ) -> crate::common::RegisterField<
3969 24,
3970 0xf,
3971 1,
3972 0,
3973 u8,
3974 u8,
3975 FtdfLmacManual1Reg_SPEC,
3976 crate::common::RW,
3977 > {
3978 crate::common::RegisterField::<
3979 24,
3980 0xf,
3981 1,
3982 0,
3983 u8,
3984 u8,
3985 FtdfLmacManual1Reg_SPEC,
3986 crate::common::RW,
3987 >::from_register(self, 0)
3988 }
3989
3990 #[doc = "Channel Number."]
3991 #[inline(always)]
3992 pub fn lmac_manual_phy_attr_cn(
3993 self,
3994 ) -> crate::common::RegisterField<
3995 20,
3996 0xf,
3997 1,
3998 0,
3999 u8,
4000 u8,
4001 FtdfLmacManual1Reg_SPEC,
4002 crate::common::RW,
4003 > {
4004 crate::common::RegisterField::<
4005 20,
4006 0xf,
4007 1,
4008 0,
4009 u8,
4010 u8,
4011 FtdfLmacManual1Reg_SPEC,
4012 crate::common::RW,
4013 >::from_register(self, 0)
4014 }
4015
4016 #[doc = "DEM packet information."]
4017 #[inline(always)]
4018 pub fn lmac_manual_phy_attr_dem_pti(
4019 self,
4020 ) -> crate::common::RegisterField<
4021 16,
4022 0xf,
4023 1,
4024 0,
4025 u8,
4026 u8,
4027 FtdfLmacManual1Reg_SPEC,
4028 crate::common::RW,
4029 > {
4030 crate::common::RegisterField::<
4031 16,
4032 0xf,
4033 1,
4034 0,
4035 u8,
4036 u8,
4037 FtdfLmacManual1Reg_SPEC,
4038 crate::common::RW,
4039 >::from_register(self, 0)
4040 }
4041
4042 #[doc = "lmac_manual_pti controls the PTI interface signal when lmac_manual_mode is set"]
4043 #[inline(always)]
4044 pub fn lmac_manual_pti(
4045 self,
4046 ) -> crate::common::RegisterField<
4047 8,
4048 0xf,
4049 1,
4050 0,
4051 u8,
4052 u8,
4053 FtdfLmacManual1Reg_SPEC,
4054 crate::common::RW,
4055 > {
4056 crate::common::RegisterField::<
4057 8,
4058 0xf,
4059 1,
4060 0,
4061 u8,
4062 u8,
4063 FtdfLmacManual1Reg_SPEC,
4064 crate::common::RW,
4065 >::from_register(self, 0)
4066 }
4067
4068 #[doc = "lmac_manual_tx_frm_nr controls the entry in the tx buffer to be transmitted."]
4069 #[inline(always)]
4070 pub fn lmac_manual_tx_frm_nr(
4071 self,
4072 ) -> crate::common::RegisterField<
4073 6,
4074 0x3,
4075 1,
4076 0,
4077 u8,
4078 u8,
4079 FtdfLmacManual1Reg_SPEC,
4080 crate::common::RW,
4081 > {
4082 crate::common::RegisterField::<
4083 6,
4084 0x3,
4085 1,
4086 0,
4087 u8,
4088 u8,
4089 FtdfLmacManual1Reg_SPEC,
4090 crate::common::RW,
4091 >::from_register(self, 0)
4092 }
4093
4094 #[doc = "lmac_manual_ed_request controls the ED_REQUEST interface signal when lmac_manual_mode is set"]
4095 #[inline(always)]
4096 pub fn lmac_manual_ed_request(
4097 self,
4098 ) -> crate::common::RegisterFieldBool<5, 1, 0, FtdfLmacManual1Reg_SPEC, crate::common::RW> {
4099 crate::common::RegisterFieldBool::<5,1,0,FtdfLmacManual1Reg_SPEC,crate::common::RW>::from_register(self,0)
4100 }
4101
4102 #[doc = "lmac_manual_rx_pipe_en controls the rx_enable signal towards the rx pipeline when lmac_manual_mode is set"]
4103 #[inline(always)]
4104 pub fn lmac_manual_rx_pipe_en(
4105 self,
4106 ) -> crate::common::RegisterFieldBool<4, 1, 0, FtdfLmacManual1Reg_SPEC, crate::common::RW> {
4107 crate::common::RegisterFieldBool::<4,1,0,FtdfLmacManual1Reg_SPEC,crate::common::RW>::from_register(self,0)
4108 }
4109
4110 #[doc = "lmac_manual_rx_en controls the RX_EN interface signal when lmac_manual_mode is set"]
4111 #[inline(always)]
4112 pub fn lmac_manual_rx_en(
4113 self,
4114 ) -> crate::common::RegisterFieldBool<3, 1, 0, FtdfLmacManual1Reg_SPEC, crate::common::RW> {
4115 crate::common::RegisterFieldBool::<3,1,0,FtdfLmacManual1Reg_SPEC,crate::common::RW>::from_register(self,0)
4116 }
4117
4118 #[doc = "lmac_manual_tx_en controls the TX_EN interface signal when lmac_manual_mode is set"]
4119 #[inline(always)]
4120 pub fn lmac_manual_tx_en(
4121 self,
4122 ) -> crate::common::RegisterFieldBool<2, 1, 0, FtdfLmacManual1Reg_SPEC, crate::common::RW> {
4123 crate::common::RegisterFieldBool::<2,1,0,FtdfLmacManual1Reg_SPEC,crate::common::RW>::from_register(self,0)
4124 }
4125
4126 #[doc = "lmac_manual_phy_en controls the PHY_EN interface signal when lmac_manual_mode is set"]
4127 #[inline(always)]
4128 pub fn lmac_manual_phy_en(
4129 self,
4130 ) -> crate::common::RegisterFieldBool<1, 1, 0, FtdfLmacManual1Reg_SPEC, crate::common::RW> {
4131 crate::common::RegisterFieldBool::<1,1,0,FtdfLmacManual1Reg_SPEC,crate::common::RW>::from_register(self,0)
4132 }
4133
4134 #[doc = "If the control register lmac_manual_mode is set, the LMAC controller control\nsignals should be controlled by the lmac_manual_control registers"]
4135 #[inline(always)]
4136 pub fn lmac_manual_mode(
4137 self,
4138 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfLmacManual1Reg_SPEC, crate::common::RW> {
4139 crate::common::RegisterFieldBool::<0,1,0,FtdfLmacManual1Reg_SPEC,crate::common::RW>::from_register(self,0)
4140 }
4141}
4142impl ::core::default::Default for FtdfLmacManual1Reg {
4143 #[inline(always)]
4144 fn default() -> FtdfLmacManual1Reg {
4145 <crate::RegValueT<FtdfLmacManual1Reg_SPEC> as RegisterValue<_>>::new(0)
4146 }
4147}
4148
4149#[doc(hidden)]
4150#[derive(Copy, Clone, Eq, PartialEq)]
4151pub struct FtdfLmacManualOsReg_SPEC;
4152impl crate::sealed::RegSpec for FtdfLmacManualOsReg_SPEC {
4153 type DataType = u32;
4154}
4155
4156#[doc = "One shot register triggers transmission in manual mode"]
4157pub type FtdfLmacManualOsReg = crate::RegValueT<FtdfLmacManualOsReg_SPEC>;
4158
4159impl FtdfLmacManualOsReg {
4160 #[doc = "One shot register which triggers the transmission of a frame from the tx buffer in lmac_manual_mode"]
4161 #[inline(always)]
4162 pub fn lmac_manual_tx_start(
4163 self,
4164 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfLmacManualOsReg_SPEC, crate::common::W> {
4165 crate::common::RegisterFieldBool::<0,1,0,FtdfLmacManualOsReg_SPEC,crate::common::W>::from_register(self,0)
4166 }
4167}
4168impl ::core::default::Default for FtdfLmacManualOsReg {
4169 #[inline(always)]
4170 fn default() -> FtdfLmacManualOsReg {
4171 <crate::RegValueT<FtdfLmacManualOsReg_SPEC> as RegisterValue<_>>::new(0)
4172 }
4173}
4174
4175#[doc(hidden)]
4176#[derive(Copy, Clone, Eq, PartialEq)]
4177pub struct FtdfLmacManualStatusReg_SPEC;
4178impl crate::sealed::RegSpec for FtdfLmacManualStatusReg_SPEC {
4179 type DataType = u32;
4180}
4181
4182#[doc = "Lmac status register in manual mode"]
4183pub type FtdfLmacManualStatusReg = crate::RegValueT<FtdfLmacManualStatusReg_SPEC>;
4184
4185impl FtdfLmacManualStatusReg {
4186 #[doc = "lmac_manual_ed_stat shows the status of the ED_STAT interface signal."]
4187 #[inline(always)]
4188 pub fn lmac_manual_ed_stat(
4189 self,
4190 ) -> crate::common::RegisterField<
4191 8,
4192 0xff,
4193 1,
4194 0,
4195 u8,
4196 u8,
4197 FtdfLmacManualStatusReg_SPEC,
4198 crate::common::R,
4199 > {
4200 crate::common::RegisterField::<
4201 8,
4202 0xff,
4203 1,
4204 0,
4205 u8,
4206 u8,
4207 FtdfLmacManualStatusReg_SPEC,
4208 crate::common::R,
4209 >::from_register(self, 0)
4210 }
4211
4212 #[doc = "lmac_manual_cca_stat shows the status of the CCA_STAT"]
4213 #[inline(always)]
4214 pub fn lmac_manual_cca_stat(
4215 self,
4216 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfLmacManualStatusReg_SPEC, crate::common::R>
4217 {
4218 crate::common::RegisterFieldBool::<0,1,0,FtdfLmacManualStatusReg_SPEC,crate::common::R>::from_register(self,0)
4219 }
4220}
4221impl ::core::default::Default for FtdfLmacManualStatusReg {
4222 #[inline(always)]
4223 fn default() -> FtdfLmacManualStatusReg {
4224 <crate::RegValueT<FtdfLmacManualStatusReg_SPEC> as RegisterValue<_>>::new(0)
4225 }
4226}
4227
4228#[doc(hidden)]
4229#[derive(Copy, Clone, Eq, PartialEq)]
4230pub struct FtdfLmacMaskReg_SPEC;
4231impl crate::sealed::RegSpec for FtdfLmacMaskReg_SPEC {
4232 type DataType = u32;
4233}
4234
4235#[doc = "Lmac mask register"]
4236pub type FtdfLmacMaskReg = crate::RegValueT<FtdfLmacMaskReg_SPEC>;
4237
4238impl FtdfLmacMaskReg {
4239 #[doc = "Mask bit for event "RxTimerExpired_e""]
4240 #[inline(always)]
4241 pub fn rxtimerexpired_m(
4242 self,
4243 ) -> crate::common::RegisterFieldBool<2, 1, 0, FtdfLmacMaskReg_SPEC, crate::common::RW> {
4244 crate::common::RegisterFieldBool::<2,1,0,FtdfLmacMaskReg_SPEC,crate::common::RW>::from_register(self,0)
4245 }
4246
4247 #[doc = "Mask bit for event "CCAstat_e""]
4248 #[inline(always)]
4249 pub fn ccastat_m(
4250 self,
4251 ) -> crate::common::RegisterFieldBool<1, 1, 0, FtdfLmacMaskReg_SPEC, crate::common::RW> {
4252 crate::common::RegisterFieldBool::<1,1,0,FtdfLmacMaskReg_SPEC,crate::common::RW>::from_register(self,0)
4253 }
4254
4255 #[doc = "Mask bit for event "EdScanReady_e""]
4256 #[inline(always)]
4257 pub fn edscanready_m(
4258 self,
4259 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfLmacMaskReg_SPEC, crate::common::RW> {
4260 crate::common::RegisterFieldBool::<0,1,0,FtdfLmacMaskReg_SPEC,crate::common::RW>::from_register(self,0)
4261 }
4262}
4263impl ::core::default::Default for FtdfLmacMaskReg {
4264 #[inline(always)]
4265 fn default() -> FtdfLmacMaskReg {
4266 <crate::RegValueT<FtdfLmacMaskReg_SPEC> as RegisterValue<_>>::new(0)
4267 }
4268}
4269
4270#[doc(hidden)]
4271#[derive(Copy, Clone, Eq, PartialEq)]
4272pub struct FtdfMacackwaitdurationReg_SPEC;
4273impl crate::sealed::RegSpec for FtdfMacackwaitdurationReg_SPEC {
4274 type DataType = u32;
4275}
4276
4277#[doc = "Maximum time to wait for a ACK"]
4278pub type FtdfMacackwaitdurationReg = crate::RegValueT<FtdfMacackwaitdurationReg_SPEC>;
4279
4280impl FtdfMacackwaitdurationReg {
4281 #[doc = "Max time to wait for a (normal) ACK"]
4282 #[inline(always)]
4283 pub fn macackwaitduration(
4284 self,
4285 ) -> crate::common::RegisterField<
4286 0,
4287 0xff,
4288 1,
4289 0,
4290 u8,
4291 u8,
4292 FtdfMacackwaitdurationReg_SPEC,
4293 crate::common::RW,
4294 > {
4295 crate::common::RegisterField::<
4296 0,
4297 0xff,
4298 1,
4299 0,
4300 u8,
4301 u8,
4302 FtdfMacackwaitdurationReg_SPEC,
4303 crate::common::RW,
4304 >::from_register(self, 0)
4305 }
4306}
4307impl ::core::default::Default for FtdfMacackwaitdurationReg {
4308 #[inline(always)]
4309 fn default() -> FtdfMacackwaitdurationReg {
4310 <crate::RegValueT<FtdfMacackwaitdurationReg_SPEC> as RegisterValue<_>>::new(54)
4311 }
4312}
4313
4314#[doc(hidden)]
4315#[derive(Copy, Clone, Eq, PartialEq)]
4316pub struct FtdfMacenhackwaitdurationReg_SPEC;
4317impl crate::sealed::RegSpec for FtdfMacenhackwaitdurationReg_SPEC {
4318 type DataType = u32;
4319}
4320
4321#[doc = "Maximum time to wait for an enhanced ACK frame"]
4322pub type FtdfMacenhackwaitdurationReg = crate::RegValueT<FtdfMacenhackwaitdurationReg_SPEC>;
4323
4324impl FtdfMacenhackwaitdurationReg {
4325 #[doc = "The maximum time (in s) to wait for an enhanced acknowledgement frame"]
4326 #[inline(always)]
4327 pub fn macenhackwaitduration(
4328 self,
4329 ) -> crate::common::RegisterField<
4330 0,
4331 0xffff,
4332 1,
4333 0,
4334 u16,
4335 u16,
4336 FtdfMacenhackwaitdurationReg_SPEC,
4337 crate::common::RW,
4338 > {
4339 crate::common::RegisterField::<
4340 0,
4341 0xffff,
4342 1,
4343 0,
4344 u16,
4345 u16,
4346 FtdfMacenhackwaitdurationReg_SPEC,
4347 crate::common::RW,
4348 >::from_register(self, 0)
4349 }
4350}
4351impl ::core::default::Default for FtdfMacenhackwaitdurationReg {
4352 #[inline(always)]
4353 fn default() -> FtdfMacenhackwaitdurationReg {
4354 <crate::RegValueT<FtdfMacenhackwaitdurationReg_SPEC> as RegisterValue<_>>::new(864)
4355 }
4356}
4357
4358#[doc(hidden)]
4359#[derive(Copy, Clone, Eq, PartialEq)]
4360pub struct FtdfMacfcserrorcountReg_SPEC;
4361impl crate::sealed::RegSpec for FtdfMacfcserrorcountReg_SPEC {
4362 type DataType = u32;
4363}
4364
4365#[doc = "Lmac FCS error register"]
4366pub type FtdfMacfcserrorcountReg = crate::RegValueT<FtdfMacfcserrorcountReg_SPEC>;
4367
4368impl FtdfMacfcserrorcountReg {
4369 #[doc = "The number of received frames that were discarded due to an incorrect FCS."]
4370 #[inline(always)]
4371 pub fn macfcserrorcount(
4372 self,
4373 ) -> crate::common::RegisterField<
4374 0,
4375 0xffffffff,
4376 1,
4377 0,
4378 u32,
4379 u32,
4380 FtdfMacfcserrorcountReg_SPEC,
4381 crate::common::R,
4382 > {
4383 crate::common::RegisterField::<
4384 0,
4385 0xffffffff,
4386 1,
4387 0,
4388 u32,
4389 u32,
4390 FtdfMacfcserrorcountReg_SPEC,
4391 crate::common::R,
4392 >::from_register(self, 0)
4393 }
4394}
4395impl ::core::default::Default for FtdfMacfcserrorcountReg {
4396 #[inline(always)]
4397 fn default() -> FtdfMacfcserrorcountReg {
4398 <crate::RegValueT<FtdfMacfcserrorcountReg_SPEC> as RegisterValue<_>>::new(0)
4399 }
4400}
4401
4402#[doc(hidden)]
4403#[derive(Copy, Clone, Eq, PartialEq)]
4404pub struct FtdfMacrxaddrfailfrmcntReg_SPEC;
4405impl crate::sealed::RegSpec for FtdfMacrxaddrfailfrmcntReg_SPEC {
4406 type DataType = u32;
4407}
4408
4409#[doc = "Discarded frames register"]
4410pub type FtdfMacrxaddrfailfrmcntReg = crate::RegValueT<FtdfMacrxaddrfailfrmcntReg_SPEC>;
4411
4412impl FtdfMacrxaddrfailfrmcntReg {
4413 #[doc = "Frames discarded due to incorrect address or PAN Id"]
4414 #[inline(always)]
4415 pub fn macrxaddrfailfrmcnt(
4416 self,
4417 ) -> crate::common::RegisterField<
4418 0,
4419 0xffffffff,
4420 1,
4421 0,
4422 u32,
4423 u32,
4424 FtdfMacrxaddrfailfrmcntReg_SPEC,
4425 crate::common::R,
4426 > {
4427 crate::common::RegisterField::<
4428 0,
4429 0xffffffff,
4430 1,
4431 0,
4432 u32,
4433 u32,
4434 FtdfMacrxaddrfailfrmcntReg_SPEC,
4435 crate::common::R,
4436 >::from_register(self, 0)
4437 }
4438}
4439impl ::core::default::Default for FtdfMacrxaddrfailfrmcntReg {
4440 #[inline(always)]
4441 fn default() -> FtdfMacrxaddrfailfrmcntReg {
4442 <crate::RegValueT<FtdfMacrxaddrfailfrmcntReg_SPEC> as RegisterValue<_>>::new(0)
4443 }
4444}
4445
4446#[doc(hidden)]
4447#[derive(Copy, Clone, Eq, PartialEq)]
4448pub struct FtdfMacrxstdackfrmokcntReg_SPEC;
4449impl crate::sealed::RegSpec for FtdfMacrxstdackfrmokcntReg_SPEC {
4450 type DataType = u32;
4451}
4452
4453#[doc = "Received acknowledgment frames"]
4454pub type FtdfMacrxstdackfrmokcntReg = crate::RegValueT<FtdfMacrxstdackfrmokcntReg_SPEC>;
4455
4456impl FtdfMacrxstdackfrmokcntReg {
4457 #[doc = "Standard Acknowledgment frames received"]
4458 #[inline(always)]
4459 pub fn macrxstdackfrmokcnt(
4460 self,
4461 ) -> crate::common::RegisterField<
4462 0,
4463 0xffffffff,
4464 1,
4465 0,
4466 u32,
4467 u32,
4468 FtdfMacrxstdackfrmokcntReg_SPEC,
4469 crate::common::R,
4470 > {
4471 crate::common::RegisterField::<
4472 0,
4473 0xffffffff,
4474 1,
4475 0,
4476 u32,
4477 u32,
4478 FtdfMacrxstdackfrmokcntReg_SPEC,
4479 crate::common::R,
4480 >::from_register(self, 0)
4481 }
4482}
4483impl ::core::default::Default for FtdfMacrxstdackfrmokcntReg {
4484 #[inline(always)]
4485 fn default() -> FtdfMacrxstdackfrmokcntReg {
4486 <crate::RegValueT<FtdfMacrxstdackfrmokcntReg_SPEC> as RegisterValue<_>>::new(0)
4487 }
4488}
4489
4490#[doc(hidden)]
4491#[derive(Copy, Clone, Eq, PartialEq)]
4492pub struct FtdfMacrxunsupfrmcntReg_SPEC;
4493impl crate::sealed::RegSpec for FtdfMacrxunsupfrmcntReg_SPEC {
4494 type DataType = u32;
4495}
4496
4497#[doc = "Unsupported frames register"]
4498pub type FtdfMacrxunsupfrmcntReg = crate::RegValueT<FtdfMacrxunsupfrmcntReg_SPEC>;
4499
4500impl FtdfMacrxunsupfrmcntReg {
4501 #[doc = "Frames which do pass the checks but are not supported"]
4502 #[inline(always)]
4503 pub fn macrxunsupfrmcnt(
4504 self,
4505 ) -> crate::common::RegisterField<
4506 0,
4507 0xffffffff,
4508 1,
4509 0,
4510 u32,
4511 u32,
4512 FtdfMacrxunsupfrmcntReg_SPEC,
4513 crate::common::R,
4514 > {
4515 crate::common::RegisterField::<
4516 0,
4517 0xffffffff,
4518 1,
4519 0,
4520 u32,
4521 u32,
4522 FtdfMacrxunsupfrmcntReg_SPEC,
4523 crate::common::R,
4524 >::from_register(self, 0)
4525 }
4526}
4527impl ::core::default::Default for FtdfMacrxunsupfrmcntReg {
4528 #[inline(always)]
4529 fn default() -> FtdfMacrxunsupfrmcntReg {
4530 <crate::RegValueT<FtdfMacrxunsupfrmcntReg_SPEC> as RegisterValue<_>>::new(0)
4531 }
4532}
4533
4534#[doc(hidden)]
4535#[derive(Copy, Clone, Eq, PartialEq)]
4536pub struct FtdfMactstxackdelayvalReg_SPEC;
4537impl crate::sealed::RegSpec for FtdfMactstxackdelayvalReg_SPEC {
4538 type DataType = u32;
4539}
4540
4541#[doc = "Time left until next ACK is sent (us)"]
4542pub type FtdfMactstxackdelayvalReg = crate::RegValueT<FtdfMactstxackdelayvalReg_SPEC>;
4543
4544impl FtdfMactstxackdelayvalReg {
4545 #[doc = "The time in us left until the ack frame is sent by the lmac"]
4546 #[inline(always)]
4547 pub fn mactstxackdelayval(
4548 self,
4549 ) -> crate::common::RegisterField<
4550 0,
4551 0xffff,
4552 1,
4553 0,
4554 u16,
4555 u16,
4556 FtdfMactstxackdelayvalReg_SPEC,
4557 crate::common::R,
4558 > {
4559 crate::common::RegisterField::<
4560 0,
4561 0xffff,
4562 1,
4563 0,
4564 u16,
4565 u16,
4566 FtdfMactstxackdelayvalReg_SPEC,
4567 crate::common::R,
4568 >::from_register(self, 0)
4569 }
4570}
4571impl ::core::default::Default for FtdfMactstxackdelayvalReg {
4572 #[inline(always)]
4573 fn default() -> FtdfMactstxackdelayvalReg {
4574 <crate::RegValueT<FtdfMactstxackdelayvalReg_SPEC> as RegisterValue<_>>::new(0)
4575 }
4576}
4577
4578#[doc(hidden)]
4579#[derive(Copy, Clone, Eq, PartialEq)]
4580pub struct FtdfMactxstdackfrmcntReg_SPEC;
4581impl crate::sealed::RegSpec for FtdfMactxstdackfrmcntReg_SPEC {
4582 type DataType = u32;
4583}
4584
4585#[doc = "Transmitted acknowledgment frames"]
4586pub type FtdfMactxstdackfrmcntReg = crate::RegValueT<FtdfMactxstdackfrmcntReg_SPEC>;
4587
4588impl FtdfMactxstdackfrmcntReg {
4589 #[doc = "Standard Acknowledgment frames transmitted"]
4590 #[inline(always)]
4591 pub fn mactxstdackfrmcnt(
4592 self,
4593 ) -> crate::common::RegisterField<
4594 0,
4595 0xffffffff,
4596 1,
4597 0,
4598 u32,
4599 u32,
4600 FtdfMactxstdackfrmcntReg_SPEC,
4601 crate::common::R,
4602 > {
4603 crate::common::RegisterField::<
4604 0,
4605 0xffffffff,
4606 1,
4607 0,
4608 u32,
4609 u32,
4610 FtdfMactxstdackfrmcntReg_SPEC,
4611 crate::common::R,
4612 >::from_register(self, 0)
4613 }
4614}
4615impl ::core::default::Default for FtdfMactxstdackfrmcntReg {
4616 #[inline(always)]
4617 fn default() -> FtdfMactxstdackfrmcntReg {
4618 <crate::RegValueT<FtdfMactxstdackfrmcntReg_SPEC> as RegisterValue<_>>::new(0)
4619 }
4620}
4621
4622#[doc(hidden)]
4623#[derive(Copy, Clone, Eq, PartialEq)]
4624pub struct FtdfPhyParameters0Reg_SPEC;
4625impl crate::sealed::RegSpec for FtdfPhyParameters0Reg_SPEC {
4626 type DataType = u32;
4627}
4628
4629#[doc = "Lmac PHY parameter register"]
4630pub type FtdfPhyParameters0Reg = crate::RegValueT<FtdfPhyParameters0Reg_SPEC>;
4631
4632impl FtdfPhyParameters0Reg {
4633 #[doc = "See rxBitPos_0"]
4634 #[inline(always)]
4635 pub fn rxbitpos_7(
4636 self,
4637 ) -> crate::common::RegisterField<
4638 28,
4639 0x7,
4640 1,
4641 0,
4642 u8,
4643 u8,
4644 FtdfPhyParameters0Reg_SPEC,
4645 crate::common::RW,
4646 > {
4647 crate::common::RegisterField::<
4648 28,
4649 0x7,
4650 1,
4651 0,
4652 u8,
4653 u8,
4654 FtdfPhyParameters0Reg_SPEC,
4655 crate::common::RW,
4656 >::from_register(self, 0)
4657 }
4658
4659 #[doc = "See rxBitPos_0"]
4660 #[inline(always)]
4661 pub fn rxbitpos_6(
4662 self,
4663 ) -> crate::common::RegisterField<
4664 24,
4665 0x7,
4666 1,
4667 0,
4668 u8,
4669 u8,
4670 FtdfPhyParameters0Reg_SPEC,
4671 crate::common::RW,
4672 > {
4673 crate::common::RegisterField::<
4674 24,
4675 0x7,
4676 1,
4677 0,
4678 u8,
4679 u8,
4680 FtdfPhyParameters0Reg_SPEC,
4681 crate::common::RW,
4682 >::from_register(self, 0)
4683 }
4684
4685 #[doc = "See rxBitPos_0"]
4686 #[inline(always)]
4687 pub fn rxbitpos_5(
4688 self,
4689 ) -> crate::common::RegisterField<
4690 20,
4691 0x7,
4692 1,
4693 0,
4694 u8,
4695 u8,
4696 FtdfPhyParameters0Reg_SPEC,
4697 crate::common::RW,
4698 > {
4699 crate::common::RegisterField::<
4700 20,
4701 0x7,
4702 1,
4703 0,
4704 u8,
4705 u8,
4706 FtdfPhyParameters0Reg_SPEC,
4707 crate::common::RW,
4708 >::from_register(self, 0)
4709 }
4710
4711 #[doc = "See rxBitPos_0"]
4712 #[inline(always)]
4713 pub fn rxbitpos_4(
4714 self,
4715 ) -> crate::common::RegisterField<
4716 16,
4717 0x7,
4718 1,
4719 0,
4720 u8,
4721 u8,
4722 FtdfPhyParameters0Reg_SPEC,
4723 crate::common::RW,
4724 > {
4725 crate::common::RegisterField::<
4726 16,
4727 0x7,
4728 1,
4729 0,
4730 u8,
4731 u8,
4732 FtdfPhyParameters0Reg_SPEC,
4733 crate::common::RW,
4734 >::from_register(self, 0)
4735 }
4736
4737 #[doc = "See rxBitPos_0"]
4738 #[inline(always)]
4739 pub fn rxbitpos_3(
4740 self,
4741 ) -> crate::common::RegisterField<
4742 12,
4743 0x7,
4744 1,
4745 0,
4746 u8,
4747 u8,
4748 FtdfPhyParameters0Reg_SPEC,
4749 crate::common::RW,
4750 > {
4751 crate::common::RegisterField::<
4752 12,
4753 0x7,
4754 1,
4755 0,
4756 u8,
4757 u8,
4758 FtdfPhyParameters0Reg_SPEC,
4759 crate::common::RW,
4760 >::from_register(self, 0)
4761 }
4762
4763 #[doc = "See rxBitPos_0"]
4764 #[inline(always)]
4765 pub fn rxbitpos_2(
4766 self,
4767 ) -> crate::common::RegisterField<
4768 8,
4769 0x7,
4770 1,
4771 0,
4772 u8,
4773 u8,
4774 FtdfPhyParameters0Reg_SPEC,
4775 crate::common::RW,
4776 > {
4777 crate::common::RegisterField::<
4778 8,
4779 0x7,
4780 1,
4781 0,
4782 u8,
4783 u8,
4784 FtdfPhyParameters0Reg_SPEC,
4785 crate::common::RW,
4786 >::from_register(self, 0)
4787 }
4788
4789 #[doc = "See rxBitPos_0"]
4790 #[inline(always)]
4791 pub fn rxbitpos_1(
4792 self,
4793 ) -> crate::common::RegisterField<
4794 4,
4795 0x7,
4796 1,
4797 0,
4798 u8,
4799 u8,
4800 FtdfPhyParameters0Reg_SPEC,
4801 crate::common::RW,
4802 > {
4803 crate::common::RegisterField::<
4804 4,
4805 0x7,
4806 1,
4807 0,
4808 u8,
4809 u8,
4810 FtdfPhyParameters0Reg_SPEC,
4811 crate::common::RW,
4812 >::from_register(self, 0)
4813 }
4814
4815 #[doc = "Control rxBitPos(8)(3) controls the position that a bit should have at the DPHY interface.\nSo the default values are rxBitPos_0 = 0, rxBitPos_1 = 1, rxBitPos_2 = 2, etc.\n\nNote1 that this is a conversion from rx DPHY interface to the internal data byte\nSo\nfor(n=7;n>=0;n--)\nrx_data(n) = dphy_bit(tx_BitPos(n))\nendfor\n\nNote2 that rxBitPos and txBitPos must have inverse functions."]
4816 #[inline(always)]
4817 pub fn rxbitpos_0(
4818 self,
4819 ) -> crate::common::RegisterField<
4820 0,
4821 0x7,
4822 1,
4823 0,
4824 u8,
4825 u8,
4826 FtdfPhyParameters0Reg_SPEC,
4827 crate::common::RW,
4828 > {
4829 crate::common::RegisterField::<
4830 0,
4831 0x7,
4832 1,
4833 0,
4834 u8,
4835 u8,
4836 FtdfPhyParameters0Reg_SPEC,
4837 crate::common::RW,
4838 >::from_register(self, 0)
4839 }
4840}
4841impl ::core::default::Default for FtdfPhyParameters0Reg {
4842 #[inline(always)]
4843 fn default() -> FtdfPhyParameters0Reg {
4844 <crate::RegValueT<FtdfPhyParameters0Reg_SPEC> as RegisterValue<_>>::new(1985229328)
4845 }
4846}
4847
4848#[doc(hidden)]
4849#[derive(Copy, Clone, Eq, PartialEq)]
4850pub struct FtdfPhyParameters1Reg_SPEC;
4851impl crate::sealed::RegSpec for FtdfPhyParameters1Reg_SPEC {
4852 type DataType = u32;
4853}
4854
4855#[doc = "Lmac PHY parameter register"]
4856pub type FtdfPhyParameters1Reg = crate::RegValueT<FtdfPhyParameters1Reg_SPEC>;
4857
4858impl FtdfPhyParameters1Reg {
4859 #[doc = "See txBitPos_0"]
4860 #[inline(always)]
4861 pub fn txbitpos_7(
4862 self,
4863 ) -> crate::common::RegisterField<
4864 28,
4865 0x7,
4866 1,
4867 0,
4868 u8,
4869 u8,
4870 FtdfPhyParameters1Reg_SPEC,
4871 crate::common::RW,
4872 > {
4873 crate::common::RegisterField::<
4874 28,
4875 0x7,
4876 1,
4877 0,
4878 u8,
4879 u8,
4880 FtdfPhyParameters1Reg_SPEC,
4881 crate::common::RW,
4882 >::from_register(self, 0)
4883 }
4884
4885 #[doc = "See txBitPos_0"]
4886 #[inline(always)]
4887 pub fn txbitpos_6(
4888 self,
4889 ) -> crate::common::RegisterField<
4890 24,
4891 0x7,
4892 1,
4893 0,
4894 u8,
4895 u8,
4896 FtdfPhyParameters1Reg_SPEC,
4897 crate::common::RW,
4898 > {
4899 crate::common::RegisterField::<
4900 24,
4901 0x7,
4902 1,
4903 0,
4904 u8,
4905 u8,
4906 FtdfPhyParameters1Reg_SPEC,
4907 crate::common::RW,
4908 >::from_register(self, 0)
4909 }
4910
4911 #[doc = "See txBitPos_0"]
4912 #[inline(always)]
4913 pub fn txbitpos_5(
4914 self,
4915 ) -> crate::common::RegisterField<
4916 20,
4917 0x7,
4918 1,
4919 0,
4920 u8,
4921 u8,
4922 FtdfPhyParameters1Reg_SPEC,
4923 crate::common::RW,
4924 > {
4925 crate::common::RegisterField::<
4926 20,
4927 0x7,
4928 1,
4929 0,
4930 u8,
4931 u8,
4932 FtdfPhyParameters1Reg_SPEC,
4933 crate::common::RW,
4934 >::from_register(self, 0)
4935 }
4936
4937 #[doc = "See txBitPos_0"]
4938 #[inline(always)]
4939 pub fn txbitpos_4(
4940 self,
4941 ) -> crate::common::RegisterField<
4942 16,
4943 0x7,
4944 1,
4945 0,
4946 u8,
4947 u8,
4948 FtdfPhyParameters1Reg_SPEC,
4949 crate::common::RW,
4950 > {
4951 crate::common::RegisterField::<
4952 16,
4953 0x7,
4954 1,
4955 0,
4956 u8,
4957 u8,
4958 FtdfPhyParameters1Reg_SPEC,
4959 crate::common::RW,
4960 >::from_register(self, 0)
4961 }
4962
4963 #[doc = "See txBitPos_0"]
4964 #[inline(always)]
4965 pub fn txbitpos_3(
4966 self,
4967 ) -> crate::common::RegisterField<
4968 12,
4969 0x7,
4970 1,
4971 0,
4972 u8,
4973 u8,
4974 FtdfPhyParameters1Reg_SPEC,
4975 crate::common::RW,
4976 > {
4977 crate::common::RegisterField::<
4978 12,
4979 0x7,
4980 1,
4981 0,
4982 u8,
4983 u8,
4984 FtdfPhyParameters1Reg_SPEC,
4985 crate::common::RW,
4986 >::from_register(self, 0)
4987 }
4988
4989 #[doc = "See txBitPos_0"]
4990 #[inline(always)]
4991 pub fn txbitpos_2(
4992 self,
4993 ) -> crate::common::RegisterField<
4994 8,
4995 0x7,
4996 1,
4997 0,
4998 u8,
4999 u8,
5000 FtdfPhyParameters1Reg_SPEC,
5001 crate::common::RW,
5002 > {
5003 crate::common::RegisterField::<
5004 8,
5005 0x7,
5006 1,
5007 0,
5008 u8,
5009 u8,
5010 FtdfPhyParameters1Reg_SPEC,
5011 crate::common::RW,
5012 >::from_register(self, 0)
5013 }
5014
5015 #[doc = "See txBitPos_0"]
5016 #[inline(always)]
5017 pub fn txbitpos_1(
5018 self,
5019 ) -> crate::common::RegisterField<
5020 4,
5021 0x7,
5022 1,
5023 0,
5024 u8,
5025 u8,
5026 FtdfPhyParameters1Reg_SPEC,
5027 crate::common::RW,
5028 > {
5029 crate::common::RegisterField::<
5030 4,
5031 0x7,
5032 1,
5033 0,
5034 u8,
5035 u8,
5036 FtdfPhyParameters1Reg_SPEC,
5037 crate::common::RW,
5038 >::from_register(self, 0)
5039 }
5040
5041 #[doc = "Control txBitPos(8)(3) controls the position that a bit should have at the DPHY interface.\nSo the default values are txBitPos_0 = 0, txBitPos_1 = 1, txBitPos_2 = 2, etc.\n\nNote1 that this is a conversion from internal data byte to the DPHY interface.\nSo\nfor(n=7;n>=0;n--)\ntx_dphy_bit(n) = tx_data(tx_BitPos(n))\nendfor\n\nNote2 that txBitPos and rxBitPos must have inverse functions."]
5042 #[inline(always)]
5043 pub fn txbitpos_0(
5044 self,
5045 ) -> crate::common::RegisterField<
5046 0,
5047 0x7,
5048 1,
5049 0,
5050 u8,
5051 u8,
5052 FtdfPhyParameters1Reg_SPEC,
5053 crate::common::RW,
5054 > {
5055 crate::common::RegisterField::<
5056 0,
5057 0x7,
5058 1,
5059 0,
5060 u8,
5061 u8,
5062 FtdfPhyParameters1Reg_SPEC,
5063 crate::common::RW,
5064 >::from_register(self, 0)
5065 }
5066}
5067impl ::core::default::Default for FtdfPhyParameters1Reg {
5068 #[inline(always)]
5069 fn default() -> FtdfPhyParameters1Reg {
5070 <crate::RegValueT<FtdfPhyParameters1Reg_SPEC> as RegisterValue<_>>::new(1985229328)
5071 }
5072}
5073
5074#[doc(hidden)]
5075#[derive(Copy, Clone, Eq, PartialEq)]
5076pub struct FtdfPhyParameters2Reg_SPEC;
5077impl crate::sealed::RegSpec for FtdfPhyParameters2Reg_SPEC {
5078 type DataType = u32;
5079}
5080
5081#[doc = "Lmac PHY parameter register"]
5082pub type FtdfPhyParameters2Reg = crate::RegValueT<FtdfPhyParameters2Reg_SPEC>;
5083
5084impl FtdfPhyParameters2Reg {
5085 #[doc = "Phy wait time between TX_EN/RX_EN"]
5086 #[inline(always)]
5087 pub fn phytrxwait(
5088 self,
5089 ) -> crate::common::RegisterField<
5090 24,
5091 0xff,
5092 1,
5093 0,
5094 u8,
5095 u8,
5096 FtdfPhyParameters2Reg_SPEC,
5097 crate::common::RW,
5098 > {
5099 crate::common::RegisterField::<
5100 24,
5101 0xff,
5102 1,
5103 0,
5104 u8,
5105 u8,
5106 FtdfPhyParameters2Reg_SPEC,
5107 crate::common::RW,
5108 >::from_register(self, 0)
5109 }
5110
5111 #[doc = "Phy wait time before deasserting TX_EN"]
5112 #[inline(always)]
5113 pub fn phytxfinish(
5114 self,
5115 ) -> crate::common::RegisterField<
5116 16,
5117 0xff,
5118 1,
5119 0,
5120 u8,
5121 u8,
5122 FtdfPhyParameters2Reg_SPEC,
5123 crate::common::RW,
5124 > {
5125 crate::common::RegisterField::<
5126 16,
5127 0xff,
5128 1,
5129 0,
5130 u8,
5131 u8,
5132 FtdfPhyParameters2Reg_SPEC,
5133 crate::common::RW,
5134 >::from_register(self, 0)
5135 }
5136
5137 #[doc = "Phy delay between DPHY i/f and air"]
5138 #[inline(always)]
5139 pub fn phytxlatency(
5140 self,
5141 ) -> crate::common::RegisterField<
5142 8,
5143 0xff,
5144 1,
5145 0,
5146 u8,
5147 u8,
5148 FtdfPhyParameters2Reg_SPEC,
5149 crate::common::RW,
5150 > {
5151 crate::common::RegisterField::<
5152 8,
5153 0xff,
5154 1,
5155 0,
5156 u8,
5157 u8,
5158 FtdfPhyParameters2Reg_SPEC,
5159 crate::common::RW,
5160 >::from_register(self, 0)
5161 }
5162
5163 #[doc = "Phy wait time before transmission"]
5164 #[inline(always)]
5165 pub fn phytxstartup(
5166 self,
5167 ) -> crate::common::RegisterField<
5168 0,
5169 0xff,
5170 1,
5171 0,
5172 u8,
5173 u8,
5174 FtdfPhyParameters2Reg_SPEC,
5175 crate::common::RW,
5176 > {
5177 crate::common::RegisterField::<
5178 0,
5179 0xff,
5180 1,
5181 0,
5182 u8,
5183 u8,
5184 FtdfPhyParameters2Reg_SPEC,
5185 crate::common::RW,
5186 >::from_register(self, 0)
5187 }
5188}
5189impl ::core::default::Default for FtdfPhyParameters2Reg {
5190 #[inline(always)]
5191 fn default() -> FtdfPhyParameters2Reg {
5192 <crate::RegValueT<FtdfPhyParameters2Reg_SPEC> as RegisterValue<_>>::new(0)
5193 }
5194}
5195
5196#[doc(hidden)]
5197#[derive(Copy, Clone, Eq, PartialEq)]
5198pub struct FtdfPhyParameters3Reg_SPEC;
5199impl crate::sealed::RegSpec for FtdfPhyParameters3Reg_SPEC {
5200 type DataType = u32;
5201}
5202
5203#[doc = "Lmac PHY parameter register"]
5204pub type FtdfPhyParameters3Reg = crate::RegValueT<FtdfPhyParameters3Reg_SPEC>;
5205
5206impl FtdfPhyParameters3Reg {
5207 #[doc = "Asserting the DPHY interface signals TX_EN or RX_EN does not take place within the time phyEnable after asserting the signal phy_en.\n(resolution: ~s)."]
5208 #[inline(always)]
5209 pub fn phyenable(
5210 self,
5211 ) -> crate::common::RegisterField<
5212 16,
5213 0xff,
5214 1,
5215 0,
5216 u8,
5217 u8,
5218 FtdfPhyParameters3Reg_SPEC,
5219 crate::common::RW,
5220 > {
5221 crate::common::RegisterField::<
5222 16,
5223 0xff,
5224 1,
5225 0,
5226 u8,
5227 u8,
5228 FtdfPhyParameters3Reg_SPEC,
5229 crate::common::RW,
5230 >::from_register(self, 0)
5231 }
5232
5233 #[doc = "Phy delay between air and DPHY i/f"]
5234 #[inline(always)]
5235 pub fn phyrxlatency(
5236 self,
5237 ) -> crate::common::RegisterField<
5238 8,
5239 0xff,
5240 1,
5241 0,
5242 u8,
5243 u8,
5244 FtdfPhyParameters3Reg_SPEC,
5245 crate::common::RW,
5246 > {
5247 crate::common::RegisterField::<
5248 8,
5249 0xff,
5250 1,
5251 0,
5252 u8,
5253 u8,
5254 FtdfPhyParameters3Reg_SPEC,
5255 crate::common::RW,
5256 >::from_register(self, 0)
5257 }
5258
5259 #[doc = "Phy wait time before receiving"]
5260 #[inline(always)]
5261 pub fn phyrxstartup(
5262 self,
5263 ) -> crate::common::RegisterField<
5264 0,
5265 0xff,
5266 1,
5267 0,
5268 u8,
5269 u8,
5270 FtdfPhyParameters3Reg_SPEC,
5271 crate::common::RW,
5272 > {
5273 crate::common::RegisterField::<
5274 0,
5275 0xff,
5276 1,
5277 0,
5278 u8,
5279 u8,
5280 FtdfPhyParameters3Reg_SPEC,
5281 crate::common::RW,
5282 >::from_register(self, 0)
5283 }
5284}
5285impl ::core::default::Default for FtdfPhyParameters3Reg {
5286 #[inline(always)]
5287 fn default() -> FtdfPhyParameters3Reg {
5288 <crate::RegValueT<FtdfPhyParameters3Reg_SPEC> as RegisterValue<_>>::new(0)
5289 }
5290}
5291
5292#[doc(hidden)]
5293#[derive(Copy, Clone, Eq, PartialEq)]
5294pub struct FtdfRelName0Reg_SPEC;
5295impl crate::sealed::RegSpec for FtdfRelName0Reg_SPEC {
5296 type DataType = u32;
5297}
5298
5299#[doc = "Name of the release"]
5300pub type FtdfRelName0Reg = crate::RegValueT<FtdfRelName0Reg_SPEC>;
5301
5302impl FtdfRelName0Reg {
5303 #[doc = "Name of the release"]
5304 #[inline(always)]
5305 pub fn rel_name(
5306 self,
5307 ) -> crate::common::RegisterField<
5308 0,
5309 0xffffffff,
5310 1,
5311 0,
5312 u32,
5313 u32,
5314 FtdfRelName0Reg_SPEC,
5315 crate::common::R,
5316 > {
5317 crate::common::RegisterField::<
5318 0,
5319 0xffffffff,
5320 1,
5321 0,
5322 u32,
5323 u32,
5324 FtdfRelName0Reg_SPEC,
5325 crate::common::R,
5326 >::from_register(self, 0)
5327 }
5328}
5329impl ::core::default::Default for FtdfRelName0Reg {
5330 #[inline(always)]
5331 fn default() -> FtdfRelName0Reg {
5332 <crate::RegValueT<FtdfRelName0Reg_SPEC> as RegisterValue<_>>::new(0)
5333 }
5334}
5335
5336#[doc(hidden)]
5337#[derive(Copy, Clone, Eq, PartialEq)]
5338pub struct FtdfRelName1Reg_SPEC;
5339impl crate::sealed::RegSpec for FtdfRelName1Reg_SPEC {
5340 type DataType = u32;
5341}
5342
5343#[doc = "Name of the release"]
5344pub type FtdfRelName1Reg = crate::RegValueT<FtdfRelName1Reg_SPEC>;
5345
5346impl FtdfRelName1Reg {
5347 #[doc = "Name of the release"]
5348 #[inline(always)]
5349 pub fn rel_name(
5350 self,
5351 ) -> crate::common::RegisterField<
5352 0,
5353 0xffffffff,
5354 1,
5355 0,
5356 u32,
5357 u32,
5358 FtdfRelName1Reg_SPEC,
5359 crate::common::R,
5360 > {
5361 crate::common::RegisterField::<
5362 0,
5363 0xffffffff,
5364 1,
5365 0,
5366 u32,
5367 u32,
5368 FtdfRelName1Reg_SPEC,
5369 crate::common::R,
5370 >::from_register(self, 0)
5371 }
5372}
5373impl ::core::default::Default for FtdfRelName1Reg {
5374 #[inline(always)]
5375 fn default() -> FtdfRelName1Reg {
5376 <crate::RegValueT<FtdfRelName1Reg_SPEC> as RegisterValue<_>>::new(0)
5377 }
5378}
5379
5380#[doc(hidden)]
5381#[derive(Copy, Clone, Eq, PartialEq)]
5382pub struct FtdfRelName2Reg_SPEC;
5383impl crate::sealed::RegSpec for FtdfRelName2Reg_SPEC {
5384 type DataType = u32;
5385}
5386
5387#[doc = "Name of the release"]
5388pub type FtdfRelName2Reg = crate::RegValueT<FtdfRelName2Reg_SPEC>;
5389
5390impl FtdfRelName2Reg {
5391 #[doc = "Name of the release"]
5392 #[inline(always)]
5393 pub fn rel_name(
5394 self,
5395 ) -> crate::common::RegisterField<
5396 0,
5397 0xffffffff,
5398 1,
5399 0,
5400 u32,
5401 u32,
5402 FtdfRelName2Reg_SPEC,
5403 crate::common::R,
5404 > {
5405 crate::common::RegisterField::<
5406 0,
5407 0xffffffff,
5408 1,
5409 0,
5410 u32,
5411 u32,
5412 FtdfRelName2Reg_SPEC,
5413 crate::common::R,
5414 >::from_register(self, 0)
5415 }
5416}
5417impl ::core::default::Default for FtdfRelName2Reg {
5418 #[inline(always)]
5419 fn default() -> FtdfRelName2Reg {
5420 <crate::RegValueT<FtdfRelName2Reg_SPEC> as RegisterValue<_>>::new(0)
5421 }
5422}
5423
5424#[doc(hidden)]
5425#[derive(Copy, Clone, Eq, PartialEq)]
5426pub struct FtdfRelName3Reg_SPEC;
5427impl crate::sealed::RegSpec for FtdfRelName3Reg_SPEC {
5428 type DataType = u32;
5429}
5430
5431#[doc = "Name of the release"]
5432pub type FtdfRelName3Reg = crate::RegValueT<FtdfRelName3Reg_SPEC>;
5433
5434impl FtdfRelName3Reg {
5435 #[doc = "Name of the release"]
5436 #[inline(always)]
5437 pub fn rel_name(
5438 self,
5439 ) -> crate::common::RegisterField<
5440 0,
5441 0xffffffff,
5442 1,
5443 0,
5444 u32,
5445 u32,
5446 FtdfRelName3Reg_SPEC,
5447 crate::common::R,
5448 > {
5449 crate::common::RegisterField::<
5450 0,
5451 0xffffffff,
5452 1,
5453 0,
5454 u32,
5455 u32,
5456 FtdfRelName3Reg_SPEC,
5457 crate::common::R,
5458 >::from_register(self, 0)
5459 }
5460}
5461impl ::core::default::Default for FtdfRelName3Reg {
5462 #[inline(always)]
5463 fn default() -> FtdfRelName3Reg {
5464 <crate::RegValueT<FtdfRelName3Reg_SPEC> as RegisterValue<_>>::new(0)
5465 }
5466}
5467
5468#[doc(hidden)]
5469#[derive(Copy, Clone, Eq, PartialEq)]
5470pub struct FtdfRxControl0Reg_SPEC;
5471impl crate::sealed::RegSpec for FtdfRxControl0Reg_SPEC {
5472 type DataType = u32;
5473}
5474
5475#[doc = "Receive control register"]
5476pub type FtdfRxControl0Reg = crate::RegValueT<FtdfRxControl0Reg_SPEC>;
5477
5478impl FtdfRxControl0Reg {
5479 #[doc = "If set, the LMAC controller shall ignore all consequent actions upon a set AR bit in the transmitted frame"]
5480 #[inline(always)]
5481 pub fn disrxackreceivedca(
5482 self,
5483 ) -> crate::common::RegisterFieldBool<27, 1, 0, FtdfRxControl0Reg_SPEC, crate::common::RW> {
5484 crate::common::RegisterFieldBool::<27,1,0,FtdfRxControl0Reg_SPEC,crate::common::RW>::from_register(self,0)
5485 }
5486
5487 #[doc = "If set, Frame Version 2 frames without Daddr or DPANId shall be accepted."]
5488 #[inline(always)]
5489 pub fn macimplicitbroadcast(
5490 self,
5491 ) -> crate::common::RegisterFieldBool<26, 1, 0, FtdfRxControl0Reg_SPEC, crate::common::RW> {
5492 crate::common::RegisterFieldBool::<26,1,0,FtdfRxControl0Reg_SPEC,crate::common::RW>::from_register(self,0)
5493 }
5494
5495 #[doc = "If set, WakeUp frames will not be reported but will be put into the Rx buffer."]
5496 #[inline(always)]
5497 pub fn macpasswakeup(
5498 self,
5499 ) -> crate::common::RegisterFieldBool<25, 1, 0, FtdfRxControl0Reg_SPEC, crate::common::RW> {
5500 crate::common::RegisterFieldBool::<25,1,0,FtdfRxControl0Reg_SPEC,crate::common::RW>::from_register(self,0)
5501 }
5502
5503 #[doc = "If the control register macAlwaysPassWakeUp is set, received Wake- up frames for this device are put into the Rx packet buffer without notifying the LMAC Controller."]
5504 #[inline(always)]
5505 pub fn macalwayspasswakeup(
5506 self,
5507 ) -> crate::common::RegisterFieldBool<24, 1, 0, FtdfRxControl0Reg_SPEC, crate::common::RW> {
5508 crate::common::RegisterFieldBool::<24,1,0,FtdfRxControl0Reg_SPEC,crate::common::RW>::from_register(self,0)
5509 }
5510
5511 #[doc = "The control registers macAlwaysPassFrmType\\[7:0\\], shall control if this Frame Type shall be dropped.\nIf a bit is set, the Frame Type corresponding with the bit position is not dropped, even in case of a CRC error.\nExample: if bit 1 is set, Frame Type 1 shall not be dropped.\nThe error shall be reported in the Rx meta data"]
5512 #[inline(always)]
5513 pub fn macalwayspassfrmtype(
5514 self,
5515 ) -> crate::common::RegisterField<
5516 16,
5517 0xff,
5518 1,
5519 0,
5520 u8,
5521 u8,
5522 FtdfRxControl0Reg_SPEC,
5523 crate::common::RW,
5524 > {
5525 crate::common::RegisterField::<
5526 16,
5527 0xff,
5528 1,
5529 0,
5530 u8,
5531 u8,
5532 FtdfRxControl0Reg_SPEC,
5533 crate::common::RW,
5534 >::from_register(self, 0)
5535 }
5536
5537 #[doc = "When the control register macAlwaysPassToPanCoordinator is set, the frame is not dropped due to a span_coord_error.\nHowever, in case of an FCS error, the packet is dropped."]
5538 #[inline(always)]
5539 pub fn macalwayspasstopancoordinator(
5540 self,
5541 ) -> crate::common::RegisterFieldBool<15, 1, 0, FtdfRxControl0Reg_SPEC, crate::common::RW> {
5542 crate::common::RegisterFieldBool::<15,1,0,FtdfRxControl0Reg_SPEC,crate::common::RW>::from_register(self,0)
5543 }
5544
5545 #[doc = "If the control register macAlwaysPassBeaconWrongPANId is set, the frame is not dropped in case of a mismatch in PAN-ID, irrespective of the setting of RxBeaconOnly."]
5546 #[inline(always)]
5547 pub fn macalwayspassbeaconwrongpanid(
5548 self,
5549 ) -> crate::common::RegisterFieldBool<14, 1, 0, FtdfRxControl0Reg_SPEC, crate::common::RW> {
5550 crate::common::RegisterFieldBool::<14,1,0,FtdfRxControl0Reg_SPEC,crate::common::RW>::from_register(self,0)
5551 }
5552
5553 #[doc = "If set, a packet with a wrong DAddr is not dropped"]
5554 #[inline(always)]
5555 pub fn macalwayspasswrongdaddr(
5556 self,
5557 ) -> crate::common::RegisterFieldBool<13, 1, 0, FtdfRxControl0Reg_SPEC, crate::common::RW> {
5558 crate::common::RegisterFieldBool::<13,1,0,FtdfRxControl0Reg_SPEC,crate::common::RW>::from_register(self,0)
5559 }
5560
5561 #[doc = "If register macAlwaysPassWrongDPANId is set, packet with a wrong Destiantion PanID will not be dropped.\nHowever, in case of an FCS error, the packet is dropped."]
5562 #[inline(always)]
5563 pub fn macalwayspasswrongdpanid(
5564 self,
5565 ) -> crate::common::RegisterFieldBool<12, 1, 0, FtdfRxControl0Reg_SPEC, crate::common::RW> {
5566 crate::common::RegisterFieldBool::<12,1,0,FtdfRxControl0Reg_SPEC,crate::common::RW>::from_register(self,0)
5567 }
5568
5569 #[doc = "If set, a packet with a reserved FrameVersion shall not be dropped"]
5570 #[inline(always)]
5571 pub fn macalwayspassresframeversion(
5572 self,
5573 ) -> crate::common::RegisterFieldBool<11, 1, 0, FtdfRxControl0Reg_SPEC, crate::common::RW> {
5574 crate::common::RegisterFieldBool::<11,1,0,FtdfRxControl0Reg_SPEC,crate::common::RW>::from_register(self,0)
5575 }
5576
5577 #[doc = "When the control register DisDataRequestCa is set, the notification of the received Data Request is disabled."]
5578 #[inline(always)]
5579 pub fn disdatarequestca(
5580 self,
5581 ) -> crate::common::RegisterFieldBool<10, 1, 0, FtdfRxControl0Reg_SPEC, crate::common::RW> {
5582 crate::common::RegisterFieldBool::<10,1,0,FtdfRxControl0Reg_SPEC,crate::common::RW>::from_register(self,0)
5583 }
5584
5585 #[doc = "If set, a FCS error will not drop the frame"]
5586 #[inline(always)]
5587 pub fn macalwayspasscrcerror(
5588 self,
5589 ) -> crate::common::RegisterFieldBool<9, 1, 0, FtdfRxControl0Reg_SPEC, crate::common::RW> {
5590 crate::common::RegisterFieldBool::<9,1,0,FtdfRxControl0Reg_SPEC,crate::common::RW>::from_register(self,0)
5591 }
5592
5593 #[doc = "When the control register DisRxAckRequestca is set all consequent actions for a received Acknowledge Request bit are disabled."]
5594 #[inline(always)]
5595 pub fn disrxackrequestca(
5596 self,
5597 ) -> crate::common::RegisterFieldBool<8, 1, 0, FtdfRxControl0Reg_SPEC, crate::common::RW> {
5598 crate::common::RegisterFieldBool::<8,1,0,FtdfRxControl0Reg_SPEC,crate::common::RW>::from_register(self,0)
5599 }
5600
5601 #[doc = "Whan the control register DisRxFrmPendingCa is set, the notification of the received FP bit to the LMAC Controller is disabled."]
5602 #[inline(always)]
5603 pub fn disrxfrmpendingca(
5604 self,
5605 ) -> crate::common::RegisterFieldBool<7, 1, 0, FtdfRxControl0Reg_SPEC, crate::common::RW> {
5606 crate::common::RegisterFieldBool::<7,1,0,FtdfRxControl0Reg_SPEC,crate::common::RW>::from_register(self,0)
5607 }
5608
5609 #[doc = "Indication where new data will be read\nAll four bits shall be used when using these pointer values (0d - 15d).\nHowever, the Receive Packet buffer has a size of 8 entries.\nSo reading the Receive Packet buffer entries shall use the mod8 of the pointer values."]
5610 #[inline(always)]
5611 pub fn rx_read_buf_ptr(
5612 self,
5613 ) -> crate::common::RegisterField<3, 0xf, 1, 0, u8, u8, FtdfRxControl0Reg_SPEC, crate::common::RW>
5614 {
5615 crate::common::RegisterField::<
5616 3,
5617 0xf,
5618 1,
5619 0,
5620 u8,
5621 u8,
5622 FtdfRxControl0Reg_SPEC,
5623 crate::common::RW,
5624 >::from_register(self, 0)
5625 }
5626
5627 #[doc = "If set, only Coordinator Realignment frames are accepted"]
5628 #[inline(always)]
5629 pub fn rxcoordrealignonly(
5630 self,
5631 ) -> crate::common::RegisterFieldBool<2, 1, 0, FtdfRxControl0Reg_SPEC, crate::common::RW> {
5632 crate::common::RegisterFieldBool::<2,1,0,FtdfRxControl0Reg_SPEC,crate::common::RW>::from_register(self,0)
5633 }
5634
5635 #[doc = "If set, only Beacons frames are accepted"]
5636 #[inline(always)]
5637 pub fn rxbeacononly(
5638 self,
5639 ) -> crate::common::RegisterFieldBool<1, 1, 0, FtdfRxControl0Reg_SPEC, crate::common::RW> {
5640 crate::common::RegisterFieldBool::<1,1,0,FtdfRxControl0Reg_SPEC,crate::common::RW>::from_register(self,0)
5641 }
5642
5643 #[doc = "If set, Rx pipe is fully set in transparent mode (for debug purpose)."]
5644 #[inline(always)]
5645 pub fn dbgrxtransparentmode(
5646 self,
5647 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfRxControl0Reg_SPEC, crate::common::RW> {
5648 crate::common::RegisterFieldBool::<0,1,0,FtdfRxControl0Reg_SPEC,crate::common::RW>::from_register(self,0)
5649 }
5650}
5651impl ::core::default::Default for FtdfRxControl0Reg {
5652 #[inline(always)]
5653 fn default() -> FtdfRxControl0Reg {
5654 <crate::RegValueT<FtdfRxControl0Reg_SPEC> as RegisterValue<_>>::new(0)
5655 }
5656}
5657
5658#[doc(hidden)]
5659#[derive(Copy, Clone, Eq, PartialEq)]
5660pub struct FtdfRxEventReg_SPEC;
5661impl crate::sealed::RegSpec for FtdfRxEventReg_SPEC {
5662 type DataType = u32;
5663}
5664
5665#[doc = "Receive event register"]
5666pub type FtdfRxEventReg = crate::RegValueT<FtdfRxEventReg_SPEC>;
5667
5668impl FtdfRxEventReg {
5669 #[doc = "Indicates the first byte of a new packet is received"]
5670 #[inline(always)]
5671 pub fn rxbyte_e(
5672 self,
5673 ) -> crate::common::RegisterFieldBool<3, 1, 0, FtdfRxEventReg_SPEC, crate::common::RW> {
5674 crate::common::RegisterFieldBool::<3,1,0,FtdfRxEventReg_SPEC,crate::common::RW>::from_register(self,0)
5675 }
5676
5677 #[doc = "Indicates that a new packet is received"]
5678 #[inline(always)]
5679 pub fn rx_buf_avail_e(
5680 self,
5681 ) -> crate::common::RegisterFieldBool<2, 1, 0, FtdfRxEventReg_SPEC, crate::common::RW> {
5682 crate::common::RegisterFieldBool::<2,1,0,FtdfRxEventReg_SPEC,crate::common::RW>::from_register(self,0)
5683 }
5684
5685 #[doc = "Indicates that the Rx packet buffer has an\noverflowl"]
5686 #[inline(always)]
5687 pub fn rx_overflow_e(
5688 self,
5689 ) -> crate::common::RegisterFieldBool<1, 1, 0, FtdfRxEventReg_SPEC, crate::common::RW> {
5690 crate::common::RegisterFieldBool::<1,1,0,FtdfRxEventReg_SPEC,crate::common::RW>::from_register(self,0)
5691 }
5692
5693 #[doc = "Set when RX_SOF has been detected."]
5694 #[inline(always)]
5695 pub fn rxsof_e(
5696 self,
5697 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfRxEventReg_SPEC, crate::common::RW> {
5698 crate::common::RegisterFieldBool::<0,1,0,FtdfRxEventReg_SPEC,crate::common::RW>::from_register(self,0)
5699 }
5700}
5701impl ::core::default::Default for FtdfRxEventReg {
5702 #[inline(always)]
5703 fn default() -> FtdfRxEventReg {
5704 <crate::RegValueT<FtdfRxEventReg_SPEC> as RegisterValue<_>>::new(0)
5705 }
5706}
5707
5708#[doc(hidden)]
5709#[derive(Copy, Clone, Eq, PartialEq)]
5710pub struct FtdfRxFifo00Reg_SPEC;
5711impl crate::sealed::RegSpec for FtdfRxFifo00Reg_SPEC {
5712 type DataType = u32;
5713}
5714
5715#[doc = "Address receive fifo 0"]
5716pub type FtdfRxFifo00Reg = crate::RegValueT<FtdfRxFifo00Reg_SPEC>;
5717
5718impl FtdfRxFifo00Reg {
5719 #[doc = "Receive fifo ram, contains 32 addresses per entry (32b x 32a = 128B). There are 8 entries supported."]
5720 #[inline(always)]
5721 pub fn rx_fifo(
5722 self,
5723 ) -> crate::common::RegisterField<
5724 0,
5725 0xffffffff,
5726 1,
5727 0,
5728 u32,
5729 u32,
5730 FtdfRxFifo00Reg_SPEC,
5731 crate::common::RW,
5732 > {
5733 crate::common::RegisterField::<
5734 0,
5735 0xffffffff,
5736 1,
5737 0,
5738 u32,
5739 u32,
5740 FtdfRxFifo00Reg_SPEC,
5741 crate::common::RW,
5742 >::from_register(self, 0)
5743 }
5744}
5745impl ::core::default::Default for FtdfRxFifo00Reg {
5746 #[inline(always)]
5747 fn default() -> FtdfRxFifo00Reg {
5748 <crate::RegValueT<FtdfRxFifo00Reg_SPEC> as RegisterValue<_>>::new(0)
5749 }
5750}
5751
5752#[doc(hidden)]
5753#[derive(Copy, Clone, Eq, PartialEq)]
5754pub struct FtdfRxFifo10Reg_SPEC;
5755impl crate::sealed::RegSpec for FtdfRxFifo10Reg_SPEC {
5756 type DataType = u32;
5757}
5758
5759#[doc = "Address transmit fifo 1"]
5760pub type FtdfRxFifo10Reg = crate::RegValueT<FtdfRxFifo10Reg_SPEC>;
5761
5762impl FtdfRxFifo10Reg {
5763 #[doc = "Receive fifo ram, contains 32 addresses per entry (32b x 32a = 128B). There are 8 entries supported."]
5764 #[inline(always)]
5765 pub fn rx_fifo(
5766 self,
5767 ) -> crate::common::RegisterField<
5768 0,
5769 0xffffffff,
5770 1,
5771 0,
5772 u32,
5773 u32,
5774 FtdfRxFifo10Reg_SPEC,
5775 crate::common::RW,
5776 > {
5777 crate::common::RegisterField::<
5778 0,
5779 0xffffffff,
5780 1,
5781 0,
5782 u32,
5783 u32,
5784 FtdfRxFifo10Reg_SPEC,
5785 crate::common::RW,
5786 >::from_register(self, 0)
5787 }
5788}
5789impl ::core::default::Default for FtdfRxFifo10Reg {
5790 #[inline(always)]
5791 fn default() -> FtdfRxFifo10Reg {
5792 <crate::RegValueT<FtdfRxFifo10Reg_SPEC> as RegisterValue<_>>::new(0)
5793 }
5794}
5795
5796#[doc(hidden)]
5797#[derive(Copy, Clone, Eq, PartialEq)]
5798pub struct FtdfRxFifo20Reg_SPEC;
5799impl crate::sealed::RegSpec for FtdfRxFifo20Reg_SPEC {
5800 type DataType = u32;
5801}
5802
5803#[doc = "Address transmit fifo 2"]
5804pub type FtdfRxFifo20Reg = crate::RegValueT<FtdfRxFifo20Reg_SPEC>;
5805
5806impl FtdfRxFifo20Reg {
5807 #[doc = "Receive fifo ram, contains 32 addresses per entry (32b x 32a = 128B). There are 8 entries supported."]
5808 #[inline(always)]
5809 pub fn rx_fifo(
5810 self,
5811 ) -> crate::common::RegisterField<
5812 0,
5813 0xffffffff,
5814 1,
5815 0,
5816 u32,
5817 u32,
5818 FtdfRxFifo20Reg_SPEC,
5819 crate::common::RW,
5820 > {
5821 crate::common::RegisterField::<
5822 0,
5823 0xffffffff,
5824 1,
5825 0,
5826 u32,
5827 u32,
5828 FtdfRxFifo20Reg_SPEC,
5829 crate::common::RW,
5830 >::from_register(self, 0)
5831 }
5832}
5833impl ::core::default::Default for FtdfRxFifo20Reg {
5834 #[inline(always)]
5835 fn default() -> FtdfRxFifo20Reg {
5836 <crate::RegValueT<FtdfRxFifo20Reg_SPEC> as RegisterValue<_>>::new(0)
5837 }
5838}
5839
5840#[doc(hidden)]
5841#[derive(Copy, Clone, Eq, PartialEq)]
5842pub struct FtdfRxFifo30Reg_SPEC;
5843impl crate::sealed::RegSpec for FtdfRxFifo30Reg_SPEC {
5844 type DataType = u32;
5845}
5846
5847#[doc = "Address transmit fifo 3"]
5848pub type FtdfRxFifo30Reg = crate::RegValueT<FtdfRxFifo30Reg_SPEC>;
5849
5850impl FtdfRxFifo30Reg {
5851 #[doc = "Receive fifo ram, contains 32 addresses per entry (32b x 32a = 128B). There are 8 entries supported."]
5852 #[inline(always)]
5853 pub fn rx_fifo(
5854 self,
5855 ) -> crate::common::RegisterField<
5856 0,
5857 0xffffffff,
5858 1,
5859 0,
5860 u32,
5861 u32,
5862 FtdfRxFifo30Reg_SPEC,
5863 crate::common::RW,
5864 > {
5865 crate::common::RegisterField::<
5866 0,
5867 0xffffffff,
5868 1,
5869 0,
5870 u32,
5871 u32,
5872 FtdfRxFifo30Reg_SPEC,
5873 crate::common::RW,
5874 >::from_register(self, 0)
5875 }
5876}
5877impl ::core::default::Default for FtdfRxFifo30Reg {
5878 #[inline(always)]
5879 fn default() -> FtdfRxFifo30Reg {
5880 <crate::RegValueT<FtdfRxFifo30Reg_SPEC> as RegisterValue<_>>::new(0)
5881 }
5882}
5883
5884#[doc(hidden)]
5885#[derive(Copy, Clone, Eq, PartialEq)]
5886pub struct FtdfRxFifo40Reg_SPEC;
5887impl crate::sealed::RegSpec for FtdfRxFifo40Reg_SPEC {
5888 type DataType = u32;
5889}
5890
5891#[doc = "Address transmit fifo 4"]
5892pub type FtdfRxFifo40Reg = crate::RegValueT<FtdfRxFifo40Reg_SPEC>;
5893
5894impl FtdfRxFifo40Reg {
5895 #[doc = "Receive fifo ram, contains 32 addresses per entry (32b x 32a = 128B). There are 8 entries supported."]
5896 #[inline(always)]
5897 pub fn rx_fifo(
5898 self,
5899 ) -> crate::common::RegisterField<
5900 0,
5901 0xffffffff,
5902 1,
5903 0,
5904 u32,
5905 u32,
5906 FtdfRxFifo40Reg_SPEC,
5907 crate::common::RW,
5908 > {
5909 crate::common::RegisterField::<
5910 0,
5911 0xffffffff,
5912 1,
5913 0,
5914 u32,
5915 u32,
5916 FtdfRxFifo40Reg_SPEC,
5917 crate::common::RW,
5918 >::from_register(self, 0)
5919 }
5920}
5921impl ::core::default::Default for FtdfRxFifo40Reg {
5922 #[inline(always)]
5923 fn default() -> FtdfRxFifo40Reg {
5924 <crate::RegValueT<FtdfRxFifo40Reg_SPEC> as RegisterValue<_>>::new(0)
5925 }
5926}
5927
5928#[doc(hidden)]
5929#[derive(Copy, Clone, Eq, PartialEq)]
5930pub struct FtdfRxFifo50Reg_SPEC;
5931impl crate::sealed::RegSpec for FtdfRxFifo50Reg_SPEC {
5932 type DataType = u32;
5933}
5934
5935#[doc = "Address transmit fifo 5"]
5936pub type FtdfRxFifo50Reg = crate::RegValueT<FtdfRxFifo50Reg_SPEC>;
5937
5938impl FtdfRxFifo50Reg {
5939 #[doc = "Receive fifo ram, contains 32 addresses per entry (32b x 32a = 128B). There are 8 entries supported."]
5940 #[inline(always)]
5941 pub fn rx_fifo(
5942 self,
5943 ) -> crate::common::RegisterField<
5944 0,
5945 0xffffffff,
5946 1,
5947 0,
5948 u32,
5949 u32,
5950 FtdfRxFifo50Reg_SPEC,
5951 crate::common::RW,
5952 > {
5953 crate::common::RegisterField::<
5954 0,
5955 0xffffffff,
5956 1,
5957 0,
5958 u32,
5959 u32,
5960 FtdfRxFifo50Reg_SPEC,
5961 crate::common::RW,
5962 >::from_register(self, 0)
5963 }
5964}
5965impl ::core::default::Default for FtdfRxFifo50Reg {
5966 #[inline(always)]
5967 fn default() -> FtdfRxFifo50Reg {
5968 <crate::RegValueT<FtdfRxFifo50Reg_SPEC> as RegisterValue<_>>::new(0)
5969 }
5970}
5971
5972#[doc(hidden)]
5973#[derive(Copy, Clone, Eq, PartialEq)]
5974pub struct FtdfRxFifo60Reg_SPEC;
5975impl crate::sealed::RegSpec for FtdfRxFifo60Reg_SPEC {
5976 type DataType = u32;
5977}
5978
5979#[doc = "Address transmit fifo 6"]
5980pub type FtdfRxFifo60Reg = crate::RegValueT<FtdfRxFifo60Reg_SPEC>;
5981
5982impl FtdfRxFifo60Reg {
5983 #[doc = "Receive fifo ram, contains 32 addresses per entry (32b x 32a = 128B). There are 8 entries supported."]
5984 #[inline(always)]
5985 pub fn rx_fifo(
5986 self,
5987 ) -> crate::common::RegisterField<
5988 0,
5989 0xffffffff,
5990 1,
5991 0,
5992 u32,
5993 u32,
5994 FtdfRxFifo60Reg_SPEC,
5995 crate::common::RW,
5996 > {
5997 crate::common::RegisterField::<
5998 0,
5999 0xffffffff,
6000 1,
6001 0,
6002 u32,
6003 u32,
6004 FtdfRxFifo60Reg_SPEC,
6005 crate::common::RW,
6006 >::from_register(self, 0)
6007 }
6008}
6009impl ::core::default::Default for FtdfRxFifo60Reg {
6010 #[inline(always)]
6011 fn default() -> FtdfRxFifo60Reg {
6012 <crate::RegValueT<FtdfRxFifo60Reg_SPEC> as RegisterValue<_>>::new(0)
6013 }
6014}
6015
6016#[doc(hidden)]
6017#[derive(Copy, Clone, Eq, PartialEq)]
6018pub struct FtdfRxFifo70Reg_SPEC;
6019impl crate::sealed::RegSpec for FtdfRxFifo70Reg_SPEC {
6020 type DataType = u32;
6021}
6022
6023#[doc = "Address transmit fifo 7"]
6024pub type FtdfRxFifo70Reg = crate::RegValueT<FtdfRxFifo70Reg_SPEC>;
6025
6026impl FtdfRxFifo70Reg {
6027 #[doc = "Receive fifo ram, contains 32 addresses per entry (32b x 32a = 128B). There are 8 entries supported."]
6028 #[inline(always)]
6029 pub fn rx_fifo(
6030 self,
6031 ) -> crate::common::RegisterField<
6032 0,
6033 0xffffffff,
6034 1,
6035 0,
6036 u32,
6037 u32,
6038 FtdfRxFifo70Reg_SPEC,
6039 crate::common::RW,
6040 > {
6041 crate::common::RegisterField::<
6042 0,
6043 0xffffffff,
6044 1,
6045 0,
6046 u32,
6047 u32,
6048 FtdfRxFifo70Reg_SPEC,
6049 crate::common::RW,
6050 >::from_register(self, 0)
6051 }
6052}
6053impl ::core::default::Default for FtdfRxFifo70Reg {
6054 #[inline(always)]
6055 fn default() -> FtdfRxFifo70Reg {
6056 <crate::RegValueT<FtdfRxFifo70Reg_SPEC> as RegisterValue<_>>::new(0)
6057 }
6058}
6059
6060#[doc(hidden)]
6061#[derive(Copy, Clone, Eq, PartialEq)]
6062pub struct FtdfRxMaskReg_SPEC;
6063impl crate::sealed::RegSpec for FtdfRxMaskReg_SPEC {
6064 type DataType = u32;
6065}
6066
6067#[doc = "Receive event mask register"]
6068pub type FtdfRxMaskReg = crate::RegValueT<FtdfRxMaskReg_SPEC>;
6069
6070impl FtdfRxMaskReg {
6071 #[doc = "Mask bit for event "rxbyte_e"."]
6072 #[inline(always)]
6073 pub fn rxbyte_m(
6074 self,
6075 ) -> crate::common::RegisterFieldBool<3, 1, 0, FtdfRxMaskReg_SPEC, crate::common::RW> {
6076 crate::common::RegisterFieldBool::<3,1,0,FtdfRxMaskReg_SPEC,crate::common::RW>::from_register(self,0)
6077 }
6078
6079 #[doc = "Mask bit for event "rx_buf_avail_e"."]
6080 #[inline(always)]
6081 pub fn rx_buf_avail_m(
6082 self,
6083 ) -> crate::common::RegisterFieldBool<2, 1, 0, FtdfRxMaskReg_SPEC, crate::common::RW> {
6084 crate::common::RegisterFieldBool::<2,1,0,FtdfRxMaskReg_SPEC,crate::common::RW>::from_register(self,0)
6085 }
6086
6087 #[doc = "Mask bit for event " rx_overflow_e"."]
6088 #[inline(always)]
6089 pub fn rx_overflow_m(
6090 self,
6091 ) -> crate::common::RegisterFieldBool<1, 1, 0, FtdfRxMaskReg_SPEC, crate::common::RW> {
6092 crate::common::RegisterFieldBool::<1,1,0,FtdfRxMaskReg_SPEC,crate::common::RW>::from_register(self,0)
6093 }
6094
6095 #[doc = "Mask bit for event "RxSof_e"."]
6096 #[inline(always)]
6097 pub fn rxsof_m(
6098 self,
6099 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfRxMaskReg_SPEC, crate::common::RW> {
6100 crate::common::RegisterFieldBool::<0,1,0,FtdfRxMaskReg_SPEC,crate::common::RW>::from_register(self,0)
6101 }
6102}
6103impl ::core::default::Default for FtdfRxMaskReg {
6104 #[inline(always)]
6105 fn default() -> FtdfRxMaskReg {
6106 <crate::RegValueT<FtdfRxMaskReg_SPEC> as RegisterValue<_>>::new(0)
6107 }
6108}
6109
6110#[doc(hidden)]
6111#[derive(Copy, Clone, Eq, PartialEq)]
6112pub struct FtdfRxMeta00Reg_SPEC;
6113impl crate::sealed::RegSpec for FtdfRxMeta00Reg_SPEC {
6114 type DataType = u32;
6115}
6116
6117#[doc = "Receive metadata register 0"]
6118pub type FtdfRxMeta00Reg = crate::RegValueT<FtdfRxMeta00Reg_SPEC>;
6119
6120impl FtdfRxMeta00Reg {
6121 #[doc = "Timestamp taken when frame was received"]
6122 #[inline(always)]
6123 pub fn rx_timestamp(
6124 self,
6125 ) -> crate::common::RegisterField<
6126 0,
6127 0xffffffff,
6128 1,
6129 0,
6130 u32,
6131 u32,
6132 FtdfRxMeta00Reg_SPEC,
6133 crate::common::R,
6134 > {
6135 crate::common::RegisterField::<
6136 0,
6137 0xffffffff,
6138 1,
6139 0,
6140 u32,
6141 u32,
6142 FtdfRxMeta00Reg_SPEC,
6143 crate::common::R,
6144 >::from_register(self, 0)
6145 }
6146}
6147impl ::core::default::Default for FtdfRxMeta00Reg {
6148 #[inline(always)]
6149 fn default() -> FtdfRxMeta00Reg {
6150 <crate::RegValueT<FtdfRxMeta00Reg_SPEC> as RegisterValue<_>>::new(0)
6151 }
6152}
6153
6154#[doc(hidden)]
6155#[derive(Copy, Clone, Eq, PartialEq)]
6156pub struct FtdfRxMeta01Reg_SPEC;
6157impl crate::sealed::RegSpec for FtdfRxMeta01Reg_SPEC {
6158 type DataType = u32;
6159}
6160
6161#[doc = "Receive metadata register 1"]
6162pub type FtdfRxMeta01Reg = crate::RegValueT<FtdfRxMeta01Reg_SPEC>;
6163
6164impl FtdfRxMeta01Reg {
6165 #[doc = "Timestamp taken when frame was received"]
6166 #[inline(always)]
6167 pub fn rx_timestamp(
6168 self,
6169 ) -> crate::common::RegisterField<
6170 0,
6171 0xffffffff,
6172 1,
6173 0,
6174 u32,
6175 u32,
6176 FtdfRxMeta01Reg_SPEC,
6177 crate::common::R,
6178 > {
6179 crate::common::RegisterField::<
6180 0,
6181 0xffffffff,
6182 1,
6183 0,
6184 u32,
6185 u32,
6186 FtdfRxMeta01Reg_SPEC,
6187 crate::common::R,
6188 >::from_register(self, 0)
6189 }
6190}
6191impl ::core::default::Default for FtdfRxMeta01Reg {
6192 #[inline(always)]
6193 fn default() -> FtdfRxMeta01Reg {
6194 <crate::RegValueT<FtdfRxMeta01Reg_SPEC> as RegisterValue<_>>::new(0)
6195 }
6196}
6197
6198#[doc(hidden)]
6199#[derive(Copy, Clone, Eq, PartialEq)]
6200pub struct FtdfRxMeta02Reg_SPEC;
6201impl crate::sealed::RegSpec for FtdfRxMeta02Reg_SPEC {
6202 type DataType = u32;
6203}
6204
6205#[doc = "Receive metadata register 2"]
6206pub type FtdfRxMeta02Reg = crate::RegValueT<FtdfRxMeta02Reg_SPEC>;
6207
6208impl FtdfRxMeta02Reg {
6209 #[doc = "Timestamp taken when frame was received"]
6210 #[inline(always)]
6211 pub fn rx_timestamp(
6212 self,
6213 ) -> crate::common::RegisterField<
6214 0,
6215 0xffffffff,
6216 1,
6217 0,
6218 u32,
6219 u32,
6220 FtdfRxMeta02Reg_SPEC,
6221 crate::common::R,
6222 > {
6223 crate::common::RegisterField::<
6224 0,
6225 0xffffffff,
6226 1,
6227 0,
6228 u32,
6229 u32,
6230 FtdfRxMeta02Reg_SPEC,
6231 crate::common::R,
6232 >::from_register(self, 0)
6233 }
6234}
6235impl ::core::default::Default for FtdfRxMeta02Reg {
6236 #[inline(always)]
6237 fn default() -> FtdfRxMeta02Reg {
6238 <crate::RegValueT<FtdfRxMeta02Reg_SPEC> as RegisterValue<_>>::new(0)
6239 }
6240}
6241
6242#[doc(hidden)]
6243#[derive(Copy, Clone, Eq, PartialEq)]
6244pub struct FtdfRxMeta03Reg_SPEC;
6245impl crate::sealed::RegSpec for FtdfRxMeta03Reg_SPEC {
6246 type DataType = u32;
6247}
6248
6249#[doc = "Receive metadata register 3"]
6250pub type FtdfRxMeta03Reg = crate::RegValueT<FtdfRxMeta03Reg_SPEC>;
6251
6252impl FtdfRxMeta03Reg {
6253 #[doc = "Timestamp taken when frame was received"]
6254 #[inline(always)]
6255 pub fn rx_timestamp(
6256 self,
6257 ) -> crate::common::RegisterField<
6258 0,
6259 0xffffffff,
6260 1,
6261 0,
6262 u32,
6263 u32,
6264 FtdfRxMeta03Reg_SPEC,
6265 crate::common::R,
6266 > {
6267 crate::common::RegisterField::<
6268 0,
6269 0xffffffff,
6270 1,
6271 0,
6272 u32,
6273 u32,
6274 FtdfRxMeta03Reg_SPEC,
6275 crate::common::R,
6276 >::from_register(self, 0)
6277 }
6278}
6279impl ::core::default::Default for FtdfRxMeta03Reg {
6280 #[inline(always)]
6281 fn default() -> FtdfRxMeta03Reg {
6282 <crate::RegValueT<FtdfRxMeta03Reg_SPEC> as RegisterValue<_>>::new(0)
6283 }
6284}
6285
6286#[doc(hidden)]
6287#[derive(Copy, Clone, Eq, PartialEq)]
6288pub struct FtdfRxMeta04Reg_SPEC;
6289impl crate::sealed::RegSpec for FtdfRxMeta04Reg_SPEC {
6290 type DataType = u32;
6291}
6292
6293#[doc = "Receive metadata register 4"]
6294pub type FtdfRxMeta04Reg = crate::RegValueT<FtdfRxMeta04Reg_SPEC>;
6295
6296impl FtdfRxMeta04Reg {
6297 #[doc = "Timestamp taken when frame was received"]
6298 #[inline(always)]
6299 pub fn rx_timestamp(
6300 self,
6301 ) -> crate::common::RegisterField<
6302 0,
6303 0xffffffff,
6304 1,
6305 0,
6306 u32,
6307 u32,
6308 FtdfRxMeta04Reg_SPEC,
6309 crate::common::R,
6310 > {
6311 crate::common::RegisterField::<
6312 0,
6313 0xffffffff,
6314 1,
6315 0,
6316 u32,
6317 u32,
6318 FtdfRxMeta04Reg_SPEC,
6319 crate::common::R,
6320 >::from_register(self, 0)
6321 }
6322}
6323impl ::core::default::Default for FtdfRxMeta04Reg {
6324 #[inline(always)]
6325 fn default() -> FtdfRxMeta04Reg {
6326 <crate::RegValueT<FtdfRxMeta04Reg_SPEC> as RegisterValue<_>>::new(0)
6327 }
6328}
6329
6330#[doc(hidden)]
6331#[derive(Copy, Clone, Eq, PartialEq)]
6332pub struct FtdfRxMeta05Reg_SPEC;
6333impl crate::sealed::RegSpec for FtdfRxMeta05Reg_SPEC {
6334 type DataType = u32;
6335}
6336
6337#[doc = "Receive metadata register 5"]
6338pub type FtdfRxMeta05Reg = crate::RegValueT<FtdfRxMeta05Reg_SPEC>;
6339
6340impl FtdfRxMeta05Reg {
6341 #[doc = "Timestamp taken when frame was received"]
6342 #[inline(always)]
6343 pub fn rx_timestamp(
6344 self,
6345 ) -> crate::common::RegisterField<
6346 0,
6347 0xffffffff,
6348 1,
6349 0,
6350 u32,
6351 u32,
6352 FtdfRxMeta05Reg_SPEC,
6353 crate::common::R,
6354 > {
6355 crate::common::RegisterField::<
6356 0,
6357 0xffffffff,
6358 1,
6359 0,
6360 u32,
6361 u32,
6362 FtdfRxMeta05Reg_SPEC,
6363 crate::common::R,
6364 >::from_register(self, 0)
6365 }
6366}
6367impl ::core::default::Default for FtdfRxMeta05Reg {
6368 #[inline(always)]
6369 fn default() -> FtdfRxMeta05Reg {
6370 <crate::RegValueT<FtdfRxMeta05Reg_SPEC> as RegisterValue<_>>::new(0)
6371 }
6372}
6373
6374#[doc(hidden)]
6375#[derive(Copy, Clone, Eq, PartialEq)]
6376pub struct FtdfRxMeta06Reg_SPEC;
6377impl crate::sealed::RegSpec for FtdfRxMeta06Reg_SPEC {
6378 type DataType = u32;
6379}
6380
6381#[doc = "Receive metadata register 6"]
6382pub type FtdfRxMeta06Reg = crate::RegValueT<FtdfRxMeta06Reg_SPEC>;
6383
6384impl FtdfRxMeta06Reg {
6385 #[doc = "Timestamp taken when frame was received"]
6386 #[inline(always)]
6387 pub fn rx_timestamp(
6388 self,
6389 ) -> crate::common::RegisterField<
6390 0,
6391 0xffffffff,
6392 1,
6393 0,
6394 u32,
6395 u32,
6396 FtdfRxMeta06Reg_SPEC,
6397 crate::common::R,
6398 > {
6399 crate::common::RegisterField::<
6400 0,
6401 0xffffffff,
6402 1,
6403 0,
6404 u32,
6405 u32,
6406 FtdfRxMeta06Reg_SPEC,
6407 crate::common::R,
6408 >::from_register(self, 0)
6409 }
6410}
6411impl ::core::default::Default for FtdfRxMeta06Reg {
6412 #[inline(always)]
6413 fn default() -> FtdfRxMeta06Reg {
6414 <crate::RegValueT<FtdfRxMeta06Reg_SPEC> as RegisterValue<_>>::new(0)
6415 }
6416}
6417
6418#[doc(hidden)]
6419#[derive(Copy, Clone, Eq, PartialEq)]
6420pub struct FtdfRxMeta07Reg_SPEC;
6421impl crate::sealed::RegSpec for FtdfRxMeta07Reg_SPEC {
6422 type DataType = u32;
6423}
6424
6425#[doc = "Receive metadata register 7"]
6426pub type FtdfRxMeta07Reg = crate::RegValueT<FtdfRxMeta07Reg_SPEC>;
6427
6428impl FtdfRxMeta07Reg {
6429 #[doc = "Timestamp taken when frame was received"]
6430 #[inline(always)]
6431 pub fn rx_timestamp(
6432 self,
6433 ) -> crate::common::RegisterField<
6434 0,
6435 0xffffffff,
6436 1,
6437 0,
6438 u32,
6439 u32,
6440 FtdfRxMeta07Reg_SPEC,
6441 crate::common::R,
6442 > {
6443 crate::common::RegisterField::<
6444 0,
6445 0xffffffff,
6446 1,
6447 0,
6448 u32,
6449 u32,
6450 FtdfRxMeta07Reg_SPEC,
6451 crate::common::R,
6452 >::from_register(self, 0)
6453 }
6454}
6455impl ::core::default::Default for FtdfRxMeta07Reg {
6456 #[inline(always)]
6457 fn default() -> FtdfRxMeta07Reg {
6458 <crate::RegValueT<FtdfRxMeta07Reg_SPEC> as RegisterValue<_>>::new(0)
6459 }
6460}
6461
6462#[doc(hidden)]
6463#[derive(Copy, Clone, Eq, PartialEq)]
6464pub struct FtdfRxMeta10Reg_SPEC;
6465impl crate::sealed::RegSpec for FtdfRxMeta10Reg_SPEC {
6466 type DataType = u32;
6467}
6468
6469#[doc = "Receive metadata register 0"]
6470pub type FtdfRxMeta10Reg = crate::RegValueT<FtdfRxMeta10Reg_SPEC>;
6471
6472impl FtdfRxMeta10Reg {
6473 #[doc = "Link Quality Indication\n\n# $software_scratch@retention_ram\n# TX ram not used by hardware, can be used by software as scratch ram with retention."]
6474 #[inline(always)]
6475 pub fn quality_indicator(
6476 self,
6477 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, FtdfRxMeta10Reg_SPEC, crate::common::R>
6478 {
6479 crate::common::RegisterField::<8,0xff,1,0,u8,u8,FtdfRxMeta10Reg_SPEC,crate::common::R>::from_register(self,0)
6480 }
6481
6482 #[doc = "Received frame not for PAN coordinator, applicable when frame is not discarded"]
6483 #[inline(always)]
6484 pub fn ispanid_coord_error(
6485 self,
6486 ) -> crate::common::RegisterFieldBool<7, 1, 0, FtdfRxMeta10Reg_SPEC, crate::common::R> {
6487 crate::common::RegisterFieldBool::<7,1,0,FtdfRxMeta10Reg_SPEC,crate::common::R>::from_register(self,0)
6488 }
6489
6490 #[doc = "PAN ID error, applicable when frame is not discarded"]
6491 #[inline(always)]
6492 pub fn spanid_error(
6493 self,
6494 ) -> crate::common::RegisterFieldBool<6, 1, 0, FtdfRxMeta10Reg_SPEC, crate::common::R> {
6495 crate::common::RegisterFieldBool::<6,1,0,FtdfRxMeta10Reg_SPEC,crate::common::R>::from_register(self,0)
6496 }
6497
6498 #[doc = "D Address error, applicable when frame is not discarded"]
6499 #[inline(always)]
6500 pub fn daddr_error(
6501 self,
6502 ) -> crate::common::RegisterFieldBool<5, 1, 0, FtdfRxMeta10Reg_SPEC, crate::common::R> {
6503 crate::common::RegisterFieldBool::<5,1,0,FtdfRxMeta10Reg_SPEC,crate::common::R>::from_register(self,0)
6504 }
6505
6506 #[doc = "D PAN ID error, applicable when frame is not discarded"]
6507 #[inline(always)]
6508 pub fn dpanid_error(
6509 self,
6510 ) -> crate::common::RegisterFieldBool<4, 1, 0, FtdfRxMeta10Reg_SPEC, crate::common::R> {
6511 crate::common::RegisterFieldBool::<4,1,0,FtdfRxMeta10Reg_SPEC,crate::common::R>::from_register(self,0)
6512 }
6513
6514 #[doc = "Not supported frame version error, applicable when frame is not discarded."]
6515 #[inline(always)]
6516 pub fn res_frm_version_error(
6517 self,
6518 ) -> crate::common::RegisterFieldBool<3, 1, 0, FtdfRxMeta10Reg_SPEC, crate::common::R> {
6519 crate::common::RegisterFieldBool::<3,1,0,FtdfRxMeta10Reg_SPEC,crate::common::R>::from_register(self,0)
6520 }
6521
6522 #[doc = "Not supported frame type error, applicable when frame is not discarded"]
6523 #[inline(always)]
6524 pub fn res_frm_type_error(
6525 self,
6526 ) -> crate::common::RegisterFieldBool<2, 1, 0, FtdfRxMeta10Reg_SPEC, crate::common::R> {
6527 crate::common::RegisterFieldBool::<2,1,0,FtdfRxMeta10Reg_SPEC,crate::common::R>::from_register(self,0)
6528 }
6529
6530 #[doc = "CRC error, applicable for transparent mode only"]
6531 #[inline(always)]
6532 pub fn crc16_error(
6533 self,
6534 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfRxMeta10Reg_SPEC, crate::common::R> {
6535 crate::common::RegisterFieldBool::<0,1,0,FtdfRxMeta10Reg_SPEC,crate::common::R>::from_register(self,0)
6536 }
6537}
6538impl ::core::default::Default for FtdfRxMeta10Reg {
6539 #[inline(always)]
6540 fn default() -> FtdfRxMeta10Reg {
6541 <crate::RegValueT<FtdfRxMeta10Reg_SPEC> as RegisterValue<_>>::new(0)
6542 }
6543}
6544
6545#[doc(hidden)]
6546#[derive(Copy, Clone, Eq, PartialEq)]
6547pub struct FtdfRxMeta11Reg_SPEC;
6548impl crate::sealed::RegSpec for FtdfRxMeta11Reg_SPEC {
6549 type DataType = u32;
6550}
6551
6552#[doc = "Receive metadata register 1"]
6553pub type FtdfRxMeta11Reg = crate::RegValueT<FtdfRxMeta11Reg_SPEC>;
6554
6555impl FtdfRxMeta11Reg {
6556 #[doc = "Link Quality Indication\n\n# $software_scratch@retention_ram\n# TX ram not used by hardware, can be used by software as scratch ram with retention."]
6557 #[inline(always)]
6558 pub fn quality_indicator(
6559 self,
6560 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, FtdfRxMeta11Reg_SPEC, crate::common::R>
6561 {
6562 crate::common::RegisterField::<8,0xff,1,0,u8,u8,FtdfRxMeta11Reg_SPEC,crate::common::R>::from_register(self,0)
6563 }
6564
6565 #[doc = "Received frame not for PAN coordinator, applicable when frame is not discarded"]
6566 #[inline(always)]
6567 pub fn ispanid_coord_error(
6568 self,
6569 ) -> crate::common::RegisterFieldBool<7, 1, 0, FtdfRxMeta11Reg_SPEC, crate::common::R> {
6570 crate::common::RegisterFieldBool::<7,1,0,FtdfRxMeta11Reg_SPEC,crate::common::R>::from_register(self,0)
6571 }
6572
6573 #[doc = "PAN ID error, applicable when frame is not discarded"]
6574 #[inline(always)]
6575 pub fn spanid_error(
6576 self,
6577 ) -> crate::common::RegisterFieldBool<6, 1, 0, FtdfRxMeta11Reg_SPEC, crate::common::R> {
6578 crate::common::RegisterFieldBool::<6,1,0,FtdfRxMeta11Reg_SPEC,crate::common::R>::from_register(self,0)
6579 }
6580
6581 #[doc = "D Address error, applicable when frame is not discarded"]
6582 #[inline(always)]
6583 pub fn daddr_error(
6584 self,
6585 ) -> crate::common::RegisterFieldBool<5, 1, 0, FtdfRxMeta11Reg_SPEC, crate::common::R> {
6586 crate::common::RegisterFieldBool::<5,1,0,FtdfRxMeta11Reg_SPEC,crate::common::R>::from_register(self,0)
6587 }
6588
6589 #[doc = "D PAN ID error, applicable when frame is not discarded"]
6590 #[inline(always)]
6591 pub fn dpanid_error(
6592 self,
6593 ) -> crate::common::RegisterFieldBool<4, 1, 0, FtdfRxMeta11Reg_SPEC, crate::common::R> {
6594 crate::common::RegisterFieldBool::<4,1,0,FtdfRxMeta11Reg_SPEC,crate::common::R>::from_register(self,0)
6595 }
6596
6597 #[doc = "Not supported frame version error, applicable when frame is not discarded."]
6598 #[inline(always)]
6599 pub fn res_frm_version_error(
6600 self,
6601 ) -> crate::common::RegisterFieldBool<3, 1, 0, FtdfRxMeta11Reg_SPEC, crate::common::R> {
6602 crate::common::RegisterFieldBool::<3,1,0,FtdfRxMeta11Reg_SPEC,crate::common::R>::from_register(self,0)
6603 }
6604
6605 #[doc = "Not supported frame type error, applicable when frame is not discarded"]
6606 #[inline(always)]
6607 pub fn res_frm_type_error(
6608 self,
6609 ) -> crate::common::RegisterFieldBool<2, 1, 0, FtdfRxMeta11Reg_SPEC, crate::common::R> {
6610 crate::common::RegisterFieldBool::<2,1,0,FtdfRxMeta11Reg_SPEC,crate::common::R>::from_register(self,0)
6611 }
6612
6613 #[doc = "CRC error, applicable for transparent mode only"]
6614 #[inline(always)]
6615 pub fn crc16_error(
6616 self,
6617 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfRxMeta11Reg_SPEC, crate::common::R> {
6618 crate::common::RegisterFieldBool::<0,1,0,FtdfRxMeta11Reg_SPEC,crate::common::R>::from_register(self,0)
6619 }
6620}
6621impl ::core::default::Default for FtdfRxMeta11Reg {
6622 #[inline(always)]
6623 fn default() -> FtdfRxMeta11Reg {
6624 <crate::RegValueT<FtdfRxMeta11Reg_SPEC> as RegisterValue<_>>::new(0)
6625 }
6626}
6627
6628#[doc(hidden)]
6629#[derive(Copy, Clone, Eq, PartialEq)]
6630pub struct FtdfRxMeta12Reg_SPEC;
6631impl crate::sealed::RegSpec for FtdfRxMeta12Reg_SPEC {
6632 type DataType = u32;
6633}
6634
6635#[doc = "Receive metadata register 2"]
6636pub type FtdfRxMeta12Reg = crate::RegValueT<FtdfRxMeta12Reg_SPEC>;
6637
6638impl FtdfRxMeta12Reg {
6639 #[doc = "Link Quality Indication\n\n# $software_scratch@retention_ram\n# TX ram not used by hardware, can be used by software as scratch ram with retention."]
6640 #[inline(always)]
6641 pub fn quality_indicator(
6642 self,
6643 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, FtdfRxMeta12Reg_SPEC, crate::common::R>
6644 {
6645 crate::common::RegisterField::<8,0xff,1,0,u8,u8,FtdfRxMeta12Reg_SPEC,crate::common::R>::from_register(self,0)
6646 }
6647
6648 #[doc = "Received frame not for PAN coordinator, applicable when frame is not discarded"]
6649 #[inline(always)]
6650 pub fn ispanid_coord_error(
6651 self,
6652 ) -> crate::common::RegisterFieldBool<7, 1, 0, FtdfRxMeta12Reg_SPEC, crate::common::R> {
6653 crate::common::RegisterFieldBool::<7,1,0,FtdfRxMeta12Reg_SPEC,crate::common::R>::from_register(self,0)
6654 }
6655
6656 #[doc = "PAN ID error, applicable when frame is not discarded"]
6657 #[inline(always)]
6658 pub fn spanid_error(
6659 self,
6660 ) -> crate::common::RegisterFieldBool<6, 1, 0, FtdfRxMeta12Reg_SPEC, crate::common::R> {
6661 crate::common::RegisterFieldBool::<6,1,0,FtdfRxMeta12Reg_SPEC,crate::common::R>::from_register(self,0)
6662 }
6663
6664 #[doc = "D Address error, applicable when frame is not discarded"]
6665 #[inline(always)]
6666 pub fn daddr_error(
6667 self,
6668 ) -> crate::common::RegisterFieldBool<5, 1, 0, FtdfRxMeta12Reg_SPEC, crate::common::R> {
6669 crate::common::RegisterFieldBool::<5,1,0,FtdfRxMeta12Reg_SPEC,crate::common::R>::from_register(self,0)
6670 }
6671
6672 #[doc = "D PAN ID error, applicable when frame is not discarded"]
6673 #[inline(always)]
6674 pub fn dpanid_error(
6675 self,
6676 ) -> crate::common::RegisterFieldBool<4, 1, 0, FtdfRxMeta12Reg_SPEC, crate::common::R> {
6677 crate::common::RegisterFieldBool::<4,1,0,FtdfRxMeta12Reg_SPEC,crate::common::R>::from_register(self,0)
6678 }
6679
6680 #[doc = "Not supported frame version error, applicable when frame is not discarded."]
6681 #[inline(always)]
6682 pub fn res_frm_version_error(
6683 self,
6684 ) -> crate::common::RegisterFieldBool<3, 1, 0, FtdfRxMeta12Reg_SPEC, crate::common::R> {
6685 crate::common::RegisterFieldBool::<3,1,0,FtdfRxMeta12Reg_SPEC,crate::common::R>::from_register(self,0)
6686 }
6687
6688 #[doc = "Not supported frame type error, applicable when frame is not discarded"]
6689 #[inline(always)]
6690 pub fn res_frm_type_error(
6691 self,
6692 ) -> crate::common::RegisterFieldBool<2, 1, 0, FtdfRxMeta12Reg_SPEC, crate::common::R> {
6693 crate::common::RegisterFieldBool::<2,1,0,FtdfRxMeta12Reg_SPEC,crate::common::R>::from_register(self,0)
6694 }
6695
6696 #[doc = "CRC error, applicable for transparent mode only"]
6697 #[inline(always)]
6698 pub fn crc16_error(
6699 self,
6700 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfRxMeta12Reg_SPEC, crate::common::R> {
6701 crate::common::RegisterFieldBool::<0,1,0,FtdfRxMeta12Reg_SPEC,crate::common::R>::from_register(self,0)
6702 }
6703}
6704impl ::core::default::Default for FtdfRxMeta12Reg {
6705 #[inline(always)]
6706 fn default() -> FtdfRxMeta12Reg {
6707 <crate::RegValueT<FtdfRxMeta12Reg_SPEC> as RegisterValue<_>>::new(0)
6708 }
6709}
6710
6711#[doc(hidden)]
6712#[derive(Copy, Clone, Eq, PartialEq)]
6713pub struct FtdfRxMeta13Reg_SPEC;
6714impl crate::sealed::RegSpec for FtdfRxMeta13Reg_SPEC {
6715 type DataType = u32;
6716}
6717
6718#[doc = "Receive metadata register 3"]
6719pub type FtdfRxMeta13Reg = crate::RegValueT<FtdfRxMeta13Reg_SPEC>;
6720
6721impl FtdfRxMeta13Reg {
6722 #[doc = "Link Quality Indication\n\n# $software_scratch@retention_ram\n# TX ram not used by hardware, can be used by software as scratch ram with retention."]
6723 #[inline(always)]
6724 pub fn quality_indicator(
6725 self,
6726 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, FtdfRxMeta13Reg_SPEC, crate::common::R>
6727 {
6728 crate::common::RegisterField::<8,0xff,1,0,u8,u8,FtdfRxMeta13Reg_SPEC,crate::common::R>::from_register(self,0)
6729 }
6730
6731 #[doc = "Received frame not for PAN coordinator, applicable when frame is not discarded"]
6732 #[inline(always)]
6733 pub fn ispanid_coord_error(
6734 self,
6735 ) -> crate::common::RegisterFieldBool<7, 1, 0, FtdfRxMeta13Reg_SPEC, crate::common::R> {
6736 crate::common::RegisterFieldBool::<7,1,0,FtdfRxMeta13Reg_SPEC,crate::common::R>::from_register(self,0)
6737 }
6738
6739 #[doc = "PAN ID error, applicable when frame is not discarded"]
6740 #[inline(always)]
6741 pub fn spanid_error(
6742 self,
6743 ) -> crate::common::RegisterFieldBool<6, 1, 0, FtdfRxMeta13Reg_SPEC, crate::common::R> {
6744 crate::common::RegisterFieldBool::<6,1,0,FtdfRxMeta13Reg_SPEC,crate::common::R>::from_register(self,0)
6745 }
6746
6747 #[doc = "D Address error, applicable when frame is not discarded"]
6748 #[inline(always)]
6749 pub fn daddr_error(
6750 self,
6751 ) -> crate::common::RegisterFieldBool<5, 1, 0, FtdfRxMeta13Reg_SPEC, crate::common::R> {
6752 crate::common::RegisterFieldBool::<5,1,0,FtdfRxMeta13Reg_SPEC,crate::common::R>::from_register(self,0)
6753 }
6754
6755 #[doc = "D PAN ID error, applicable when frame is not discarded"]
6756 #[inline(always)]
6757 pub fn dpanid_error(
6758 self,
6759 ) -> crate::common::RegisterFieldBool<4, 1, 0, FtdfRxMeta13Reg_SPEC, crate::common::R> {
6760 crate::common::RegisterFieldBool::<4,1,0,FtdfRxMeta13Reg_SPEC,crate::common::R>::from_register(self,0)
6761 }
6762
6763 #[doc = "Not supported frame version error, applicable when frame is not discarded."]
6764 #[inline(always)]
6765 pub fn res_frm_version_error(
6766 self,
6767 ) -> crate::common::RegisterFieldBool<3, 1, 0, FtdfRxMeta13Reg_SPEC, crate::common::R> {
6768 crate::common::RegisterFieldBool::<3,1,0,FtdfRxMeta13Reg_SPEC,crate::common::R>::from_register(self,0)
6769 }
6770
6771 #[doc = "Not supported frame type error, applicable when frame is not discarded"]
6772 #[inline(always)]
6773 pub fn res_frm_type_error(
6774 self,
6775 ) -> crate::common::RegisterFieldBool<2, 1, 0, FtdfRxMeta13Reg_SPEC, crate::common::R> {
6776 crate::common::RegisterFieldBool::<2,1,0,FtdfRxMeta13Reg_SPEC,crate::common::R>::from_register(self,0)
6777 }
6778
6779 #[doc = "CRC error, applicable for transparent mode only"]
6780 #[inline(always)]
6781 pub fn crc16_error(
6782 self,
6783 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfRxMeta13Reg_SPEC, crate::common::R> {
6784 crate::common::RegisterFieldBool::<0,1,0,FtdfRxMeta13Reg_SPEC,crate::common::R>::from_register(self,0)
6785 }
6786}
6787impl ::core::default::Default for FtdfRxMeta13Reg {
6788 #[inline(always)]
6789 fn default() -> FtdfRxMeta13Reg {
6790 <crate::RegValueT<FtdfRxMeta13Reg_SPEC> as RegisterValue<_>>::new(0)
6791 }
6792}
6793
6794#[doc(hidden)]
6795#[derive(Copy, Clone, Eq, PartialEq)]
6796pub struct FtdfRxMeta14Reg_SPEC;
6797impl crate::sealed::RegSpec for FtdfRxMeta14Reg_SPEC {
6798 type DataType = u32;
6799}
6800
6801#[doc = "Receive metadata register 4"]
6802pub type FtdfRxMeta14Reg = crate::RegValueT<FtdfRxMeta14Reg_SPEC>;
6803
6804impl FtdfRxMeta14Reg {
6805 #[doc = "Link Quality Indication\n\n# $software_scratch@retention_ram\n# TX ram not used by hardware, can be used by software as scratch ram with retention."]
6806 #[inline(always)]
6807 pub fn quality_indicator(
6808 self,
6809 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, FtdfRxMeta14Reg_SPEC, crate::common::R>
6810 {
6811 crate::common::RegisterField::<8,0xff,1,0,u8,u8,FtdfRxMeta14Reg_SPEC,crate::common::R>::from_register(self,0)
6812 }
6813
6814 #[doc = "Received frame not for PAN coordinator, applicable when frame is not discarded"]
6815 #[inline(always)]
6816 pub fn ispanid_coord_error(
6817 self,
6818 ) -> crate::common::RegisterFieldBool<7, 1, 0, FtdfRxMeta14Reg_SPEC, crate::common::R> {
6819 crate::common::RegisterFieldBool::<7,1,0,FtdfRxMeta14Reg_SPEC,crate::common::R>::from_register(self,0)
6820 }
6821
6822 #[doc = "PAN ID error, applicable when frame is not discarded"]
6823 #[inline(always)]
6824 pub fn spanid_error(
6825 self,
6826 ) -> crate::common::RegisterFieldBool<6, 1, 0, FtdfRxMeta14Reg_SPEC, crate::common::R> {
6827 crate::common::RegisterFieldBool::<6,1,0,FtdfRxMeta14Reg_SPEC,crate::common::R>::from_register(self,0)
6828 }
6829
6830 #[doc = "D Address error, applicable when frame is not discarded"]
6831 #[inline(always)]
6832 pub fn daddr_error(
6833 self,
6834 ) -> crate::common::RegisterFieldBool<5, 1, 0, FtdfRxMeta14Reg_SPEC, crate::common::R> {
6835 crate::common::RegisterFieldBool::<5,1,0,FtdfRxMeta14Reg_SPEC,crate::common::R>::from_register(self,0)
6836 }
6837
6838 #[doc = "D PAN ID error, applicable when frame is not discarded"]
6839 #[inline(always)]
6840 pub fn dpanid_error(
6841 self,
6842 ) -> crate::common::RegisterFieldBool<4, 1, 0, FtdfRxMeta14Reg_SPEC, crate::common::R> {
6843 crate::common::RegisterFieldBool::<4,1,0,FtdfRxMeta14Reg_SPEC,crate::common::R>::from_register(self,0)
6844 }
6845
6846 #[doc = "Not supported frame version error, applicable when frame is not discarded."]
6847 #[inline(always)]
6848 pub fn res_frm_version_error(
6849 self,
6850 ) -> crate::common::RegisterFieldBool<3, 1, 0, FtdfRxMeta14Reg_SPEC, crate::common::R> {
6851 crate::common::RegisterFieldBool::<3,1,0,FtdfRxMeta14Reg_SPEC,crate::common::R>::from_register(self,0)
6852 }
6853
6854 #[doc = "Not supported frame type error, applicable when frame is not discarded"]
6855 #[inline(always)]
6856 pub fn res_frm_type_error(
6857 self,
6858 ) -> crate::common::RegisterFieldBool<2, 1, 0, FtdfRxMeta14Reg_SPEC, crate::common::R> {
6859 crate::common::RegisterFieldBool::<2,1,0,FtdfRxMeta14Reg_SPEC,crate::common::R>::from_register(self,0)
6860 }
6861
6862 #[doc = "CRC error, applicable for transparent mode only"]
6863 #[inline(always)]
6864 pub fn crc16_error(
6865 self,
6866 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfRxMeta14Reg_SPEC, crate::common::R> {
6867 crate::common::RegisterFieldBool::<0,1,0,FtdfRxMeta14Reg_SPEC,crate::common::R>::from_register(self,0)
6868 }
6869}
6870impl ::core::default::Default for FtdfRxMeta14Reg {
6871 #[inline(always)]
6872 fn default() -> FtdfRxMeta14Reg {
6873 <crate::RegValueT<FtdfRxMeta14Reg_SPEC> as RegisterValue<_>>::new(0)
6874 }
6875}
6876
6877#[doc(hidden)]
6878#[derive(Copy, Clone, Eq, PartialEq)]
6879pub struct FtdfRxMeta15Reg_SPEC;
6880impl crate::sealed::RegSpec for FtdfRxMeta15Reg_SPEC {
6881 type DataType = u32;
6882}
6883
6884#[doc = "Receive metadata register 5"]
6885pub type FtdfRxMeta15Reg = crate::RegValueT<FtdfRxMeta15Reg_SPEC>;
6886
6887impl FtdfRxMeta15Reg {
6888 #[doc = "Link Quality Indication\n\n# $software_scratch@retention_ram\n# TX ram not used by hardware, can be used by software as scratch ram with retention."]
6889 #[inline(always)]
6890 pub fn quality_indicator(
6891 self,
6892 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, FtdfRxMeta15Reg_SPEC, crate::common::R>
6893 {
6894 crate::common::RegisterField::<8,0xff,1,0,u8,u8,FtdfRxMeta15Reg_SPEC,crate::common::R>::from_register(self,0)
6895 }
6896
6897 #[doc = "Received frame not for PAN coordinator, applicable when frame is not discarded"]
6898 #[inline(always)]
6899 pub fn ispanid_coord_error(
6900 self,
6901 ) -> crate::common::RegisterFieldBool<7, 1, 0, FtdfRxMeta15Reg_SPEC, crate::common::R> {
6902 crate::common::RegisterFieldBool::<7,1,0,FtdfRxMeta15Reg_SPEC,crate::common::R>::from_register(self,0)
6903 }
6904
6905 #[doc = "PAN ID error, applicable when frame is not discarded"]
6906 #[inline(always)]
6907 pub fn spanid_error(
6908 self,
6909 ) -> crate::common::RegisterFieldBool<6, 1, 0, FtdfRxMeta15Reg_SPEC, crate::common::R> {
6910 crate::common::RegisterFieldBool::<6,1,0,FtdfRxMeta15Reg_SPEC,crate::common::R>::from_register(self,0)
6911 }
6912
6913 #[doc = "D Address error, applicable when frame is not discarded"]
6914 #[inline(always)]
6915 pub fn daddr_error(
6916 self,
6917 ) -> crate::common::RegisterFieldBool<5, 1, 0, FtdfRxMeta15Reg_SPEC, crate::common::R> {
6918 crate::common::RegisterFieldBool::<5,1,0,FtdfRxMeta15Reg_SPEC,crate::common::R>::from_register(self,0)
6919 }
6920
6921 #[doc = "D PAN ID error, applicable when frame is not discarded"]
6922 #[inline(always)]
6923 pub fn dpanid_error(
6924 self,
6925 ) -> crate::common::RegisterFieldBool<4, 1, 0, FtdfRxMeta15Reg_SPEC, crate::common::R> {
6926 crate::common::RegisterFieldBool::<4,1,0,FtdfRxMeta15Reg_SPEC,crate::common::R>::from_register(self,0)
6927 }
6928
6929 #[doc = "Not supported frame version error, applicable when frame is not discarded."]
6930 #[inline(always)]
6931 pub fn res_frm_version_error(
6932 self,
6933 ) -> crate::common::RegisterFieldBool<3, 1, 0, FtdfRxMeta15Reg_SPEC, crate::common::R> {
6934 crate::common::RegisterFieldBool::<3,1,0,FtdfRxMeta15Reg_SPEC,crate::common::R>::from_register(self,0)
6935 }
6936
6937 #[doc = "Not supported frame type error, applicable when frame is not discarded"]
6938 #[inline(always)]
6939 pub fn res_frm_type_error(
6940 self,
6941 ) -> crate::common::RegisterFieldBool<2, 1, 0, FtdfRxMeta15Reg_SPEC, crate::common::R> {
6942 crate::common::RegisterFieldBool::<2,1,0,FtdfRxMeta15Reg_SPEC,crate::common::R>::from_register(self,0)
6943 }
6944
6945 #[doc = "CRC error, applicable for transparent mode only"]
6946 #[inline(always)]
6947 pub fn crc16_error(
6948 self,
6949 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfRxMeta15Reg_SPEC, crate::common::R> {
6950 crate::common::RegisterFieldBool::<0,1,0,FtdfRxMeta15Reg_SPEC,crate::common::R>::from_register(self,0)
6951 }
6952}
6953impl ::core::default::Default for FtdfRxMeta15Reg {
6954 #[inline(always)]
6955 fn default() -> FtdfRxMeta15Reg {
6956 <crate::RegValueT<FtdfRxMeta15Reg_SPEC> as RegisterValue<_>>::new(0)
6957 }
6958}
6959
6960#[doc(hidden)]
6961#[derive(Copy, Clone, Eq, PartialEq)]
6962pub struct FtdfRxMeta16Reg_SPEC;
6963impl crate::sealed::RegSpec for FtdfRxMeta16Reg_SPEC {
6964 type DataType = u32;
6965}
6966
6967#[doc = "Receive metadata register 6"]
6968pub type FtdfRxMeta16Reg = crate::RegValueT<FtdfRxMeta16Reg_SPEC>;
6969
6970impl FtdfRxMeta16Reg {
6971 #[doc = "Link Quality Indication\n\n# $software_scratch@retention_ram\n# TX ram not used by hardware, can be used by software as scratch ram with retention."]
6972 #[inline(always)]
6973 pub fn quality_indicator(
6974 self,
6975 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, FtdfRxMeta16Reg_SPEC, crate::common::R>
6976 {
6977 crate::common::RegisterField::<8,0xff,1,0,u8,u8,FtdfRxMeta16Reg_SPEC,crate::common::R>::from_register(self,0)
6978 }
6979
6980 #[doc = "Received frame not for PAN coordinator, applicable when frame is not discarded"]
6981 #[inline(always)]
6982 pub fn ispanid_coord_error(
6983 self,
6984 ) -> crate::common::RegisterFieldBool<7, 1, 0, FtdfRxMeta16Reg_SPEC, crate::common::R> {
6985 crate::common::RegisterFieldBool::<7,1,0,FtdfRxMeta16Reg_SPEC,crate::common::R>::from_register(self,0)
6986 }
6987
6988 #[doc = "PAN ID error, applicable when frame is not discarded"]
6989 #[inline(always)]
6990 pub fn spanid_error(
6991 self,
6992 ) -> crate::common::RegisterFieldBool<6, 1, 0, FtdfRxMeta16Reg_SPEC, crate::common::R> {
6993 crate::common::RegisterFieldBool::<6,1,0,FtdfRxMeta16Reg_SPEC,crate::common::R>::from_register(self,0)
6994 }
6995
6996 #[doc = "D Address error, applicable when frame is not discarded"]
6997 #[inline(always)]
6998 pub fn daddr_error(
6999 self,
7000 ) -> crate::common::RegisterFieldBool<5, 1, 0, FtdfRxMeta16Reg_SPEC, crate::common::R> {
7001 crate::common::RegisterFieldBool::<5,1,0,FtdfRxMeta16Reg_SPEC,crate::common::R>::from_register(self,0)
7002 }
7003
7004 #[doc = "D PAN ID error, applicable when frame is not discarded"]
7005 #[inline(always)]
7006 pub fn dpanid_error(
7007 self,
7008 ) -> crate::common::RegisterFieldBool<4, 1, 0, FtdfRxMeta16Reg_SPEC, crate::common::R> {
7009 crate::common::RegisterFieldBool::<4,1,0,FtdfRxMeta16Reg_SPEC,crate::common::R>::from_register(self,0)
7010 }
7011
7012 #[doc = "Not supported frame version error, applicable when frame is not discarded."]
7013 #[inline(always)]
7014 pub fn res_frm_version_error(
7015 self,
7016 ) -> crate::common::RegisterFieldBool<3, 1, 0, FtdfRxMeta16Reg_SPEC, crate::common::R> {
7017 crate::common::RegisterFieldBool::<3,1,0,FtdfRxMeta16Reg_SPEC,crate::common::R>::from_register(self,0)
7018 }
7019
7020 #[doc = "Not supported frame type error, applicable when frame is not discarded"]
7021 #[inline(always)]
7022 pub fn res_frm_type_error(
7023 self,
7024 ) -> crate::common::RegisterFieldBool<2, 1, 0, FtdfRxMeta16Reg_SPEC, crate::common::R> {
7025 crate::common::RegisterFieldBool::<2,1,0,FtdfRxMeta16Reg_SPEC,crate::common::R>::from_register(self,0)
7026 }
7027
7028 #[doc = "CRC error, applicable for transparent mode only"]
7029 #[inline(always)]
7030 pub fn crc16_error(
7031 self,
7032 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfRxMeta16Reg_SPEC, crate::common::R> {
7033 crate::common::RegisterFieldBool::<0,1,0,FtdfRxMeta16Reg_SPEC,crate::common::R>::from_register(self,0)
7034 }
7035}
7036impl ::core::default::Default for FtdfRxMeta16Reg {
7037 #[inline(always)]
7038 fn default() -> FtdfRxMeta16Reg {
7039 <crate::RegValueT<FtdfRxMeta16Reg_SPEC> as RegisterValue<_>>::new(0)
7040 }
7041}
7042
7043#[doc(hidden)]
7044#[derive(Copy, Clone, Eq, PartialEq)]
7045pub struct FtdfRxMeta17Reg_SPEC;
7046impl crate::sealed::RegSpec for FtdfRxMeta17Reg_SPEC {
7047 type DataType = u32;
7048}
7049
7050#[doc = "Receive metadata register 7"]
7051pub type FtdfRxMeta17Reg = crate::RegValueT<FtdfRxMeta17Reg_SPEC>;
7052
7053impl FtdfRxMeta17Reg {
7054 #[doc = "Link Quality Indication\n\n# $software_scratch@retention_ram\n# TX ram not used by hardware, can be used by software as scratch ram with retention."]
7055 #[inline(always)]
7056 pub fn quality_indicator(
7057 self,
7058 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, FtdfRxMeta17Reg_SPEC, crate::common::R>
7059 {
7060 crate::common::RegisterField::<8,0xff,1,0,u8,u8,FtdfRxMeta17Reg_SPEC,crate::common::R>::from_register(self,0)
7061 }
7062
7063 #[doc = "Received frame not for PAN coordinator, applicable when frame is not discarded"]
7064 #[inline(always)]
7065 pub fn ispanid_coord_error(
7066 self,
7067 ) -> crate::common::RegisterFieldBool<7, 1, 0, FtdfRxMeta17Reg_SPEC, crate::common::R> {
7068 crate::common::RegisterFieldBool::<7,1,0,FtdfRxMeta17Reg_SPEC,crate::common::R>::from_register(self,0)
7069 }
7070
7071 #[doc = "PAN ID error, applicable when frame is not discarded"]
7072 #[inline(always)]
7073 pub fn spanid_error(
7074 self,
7075 ) -> crate::common::RegisterFieldBool<6, 1, 0, FtdfRxMeta17Reg_SPEC, crate::common::R> {
7076 crate::common::RegisterFieldBool::<6,1,0,FtdfRxMeta17Reg_SPEC,crate::common::R>::from_register(self,0)
7077 }
7078
7079 #[doc = "D Address error, applicable when frame is not discarded"]
7080 #[inline(always)]
7081 pub fn daddr_error(
7082 self,
7083 ) -> crate::common::RegisterFieldBool<5, 1, 0, FtdfRxMeta17Reg_SPEC, crate::common::R> {
7084 crate::common::RegisterFieldBool::<5,1,0,FtdfRxMeta17Reg_SPEC,crate::common::R>::from_register(self,0)
7085 }
7086
7087 #[doc = "D PAN ID error, applicable when frame is not discarded"]
7088 #[inline(always)]
7089 pub fn dpanid_error(
7090 self,
7091 ) -> crate::common::RegisterFieldBool<4, 1, 0, FtdfRxMeta17Reg_SPEC, crate::common::R> {
7092 crate::common::RegisterFieldBool::<4,1,0,FtdfRxMeta17Reg_SPEC,crate::common::R>::from_register(self,0)
7093 }
7094
7095 #[doc = "Not supported frame version error, applicable when frame is not discarded."]
7096 #[inline(always)]
7097 pub fn res_frm_version_error(
7098 self,
7099 ) -> crate::common::RegisterFieldBool<3, 1, 0, FtdfRxMeta17Reg_SPEC, crate::common::R> {
7100 crate::common::RegisterFieldBool::<3,1,0,FtdfRxMeta17Reg_SPEC,crate::common::R>::from_register(self,0)
7101 }
7102
7103 #[doc = "Not supported frame type error, applicable when frame is not discarded"]
7104 #[inline(always)]
7105 pub fn res_frm_type_error(
7106 self,
7107 ) -> crate::common::RegisterFieldBool<2, 1, 0, FtdfRxMeta17Reg_SPEC, crate::common::R> {
7108 crate::common::RegisterFieldBool::<2,1,0,FtdfRxMeta17Reg_SPEC,crate::common::R>::from_register(self,0)
7109 }
7110
7111 #[doc = "CRC error, applicable for transparent mode only"]
7112 #[inline(always)]
7113 pub fn crc16_error(
7114 self,
7115 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfRxMeta17Reg_SPEC, crate::common::R> {
7116 crate::common::RegisterFieldBool::<0,1,0,FtdfRxMeta17Reg_SPEC,crate::common::R>::from_register(self,0)
7117 }
7118}
7119impl ::core::default::Default for FtdfRxMeta17Reg {
7120 #[inline(always)]
7121 fn default() -> FtdfRxMeta17Reg {
7122 <crate::RegValueT<FtdfRxMeta17Reg_SPEC> as RegisterValue<_>>::new(0)
7123 }
7124}
7125
7126#[doc(hidden)]
7127#[derive(Copy, Clone, Eq, PartialEq)]
7128pub struct FtdfRxStatusDeltaReg_SPEC;
7129impl crate::sealed::RegSpec for FtdfRxStatusDeltaReg_SPEC {
7130 type DataType = u32;
7131}
7132
7133#[doc = "Receive status delta register"]
7134pub type FtdfRxStatusDeltaReg = crate::RegValueT<FtdfRxStatusDeltaReg_SPEC>;
7135
7136impl FtdfRxStatusDeltaReg {
7137 #[doc = "Delta bit of status "rx_buff_is_full""]
7138 #[inline(always)]
7139 pub fn rx_buff_is_full_d(
7140 self,
7141 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfRxStatusDeltaReg_SPEC, crate::common::RW>
7142 {
7143 crate::common::RegisterFieldBool::<0,1,0,FtdfRxStatusDeltaReg_SPEC,crate::common::RW>::from_register(self,0)
7144 }
7145}
7146impl ::core::default::Default for FtdfRxStatusDeltaReg {
7147 #[inline(always)]
7148 fn default() -> FtdfRxStatusDeltaReg {
7149 <crate::RegValueT<FtdfRxStatusDeltaReg_SPEC> as RegisterValue<_>>::new(0)
7150 }
7151}
7152
7153#[doc(hidden)]
7154#[derive(Copy, Clone, Eq, PartialEq)]
7155pub struct FtdfRxStatusMaskReg_SPEC;
7156impl crate::sealed::RegSpec for FtdfRxStatusMaskReg_SPEC {
7157 type DataType = u32;
7158}
7159
7160#[doc = "Receive status delta mask register"]
7161pub type FtdfRxStatusMaskReg = crate::RegValueT<FtdfRxStatusMaskReg_SPEC>;
7162
7163impl FtdfRxStatusMaskReg {
7164 #[doc = "Mask bit of status "rx_buff_is_full""]
7165 #[inline(always)]
7166 pub fn rx_buff_is_full_m(
7167 self,
7168 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfRxStatusMaskReg_SPEC, crate::common::RW>
7169 {
7170 crate::common::RegisterFieldBool::<0,1,0,FtdfRxStatusMaskReg_SPEC,crate::common::RW>::from_register(self,0)
7171 }
7172}
7173impl ::core::default::Default for FtdfRxStatusMaskReg {
7174 #[inline(always)]
7175 fn default() -> FtdfRxStatusMaskReg {
7176 <crate::RegValueT<FtdfRxStatusMaskReg_SPEC> as RegisterValue<_>>::new(0)
7177 }
7178}
7179
7180#[doc(hidden)]
7181#[derive(Copy, Clone, Eq, PartialEq)]
7182pub struct FtdfRxStatusReg_SPEC;
7183impl crate::sealed::RegSpec for FtdfRxStatusReg_SPEC {
7184 type DataType = u32;
7185}
7186
7187#[doc = "Receive status register"]
7188pub type FtdfRxStatusReg = crate::RegValueT<FtdfRxStatusReg_SPEC>;
7189
7190impl FtdfRxStatusReg {
7191 #[doc = "Indication where new data will be written.\nAll four bits shall be used when using these pointer values (0d - 15d).\nHowever, the Receive Packet buffer has a size of 8 entries.\nSo reading the Receive Packet buffer entries shall use the mod8 of the pointer values."]
7192 #[inline(always)]
7193 pub fn rx_write_buf_ptr(
7194 self,
7195 ) -> crate::common::RegisterField<1, 0xf, 1, 0, u8, u8, FtdfRxStatusReg_SPEC, crate::common::R>
7196 {
7197 crate::common::RegisterField::<1,0xf,1,0,u8,u8,FtdfRxStatusReg_SPEC,crate::common::R>::from_register(self,0)
7198 }
7199
7200 #[doc = "Indicates that the Rx packet buffer is full"]
7201 #[inline(always)]
7202 pub fn rx_buff_is_full(
7203 self,
7204 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfRxStatusReg_SPEC, crate::common::R> {
7205 crate::common::RegisterFieldBool::<0,1,0,FtdfRxStatusReg_SPEC,crate::common::R>::from_register(self,0)
7206 }
7207}
7208impl ::core::default::Default for FtdfRxStatusReg {
7209 #[inline(always)]
7210 fn default() -> FtdfRxStatusReg {
7211 <crate::RegValueT<FtdfRxStatusReg_SPEC> as RegisterValue<_>>::new(0)
7212 }
7213}
7214
7215#[doc(hidden)]
7216#[derive(Copy, Clone, Eq, PartialEq)]
7217pub struct FtdfSeckey0Reg_SPEC;
7218impl crate::sealed::RegSpec for FtdfSeckey0Reg_SPEC {
7219 type DataType = u32;
7220}
7221
7222#[doc = "Seckey register"]
7223pub type FtdfSeckey0Reg = crate::RegValueT<FtdfSeckey0Reg_SPEC>;
7224
7225impl FtdfSeckey0Reg {
7226 #[doc = "Registers secKey\\[0..3\\] contain the key to be used."]
7227 #[inline(always)]
7228 pub fn seckey_0(
7229 self,
7230 ) -> crate::common::RegisterField<
7231 0,
7232 0xffffffff,
7233 1,
7234 0,
7235 u32,
7236 u32,
7237 FtdfSeckey0Reg_SPEC,
7238 crate::common::RW,
7239 > {
7240 crate::common::RegisterField::<
7241 0,
7242 0xffffffff,
7243 1,
7244 0,
7245 u32,
7246 u32,
7247 FtdfSeckey0Reg_SPEC,
7248 crate::common::RW,
7249 >::from_register(self, 0)
7250 }
7251}
7252impl ::core::default::Default for FtdfSeckey0Reg {
7253 #[inline(always)]
7254 fn default() -> FtdfSeckey0Reg {
7255 <crate::RegValueT<FtdfSeckey0Reg_SPEC> as RegisterValue<_>>::new(0)
7256 }
7257}
7258
7259#[doc(hidden)]
7260#[derive(Copy, Clone, Eq, PartialEq)]
7261pub struct FtdfSeckey1Reg_SPEC;
7262impl crate::sealed::RegSpec for FtdfSeckey1Reg_SPEC {
7263 type DataType = u32;
7264}
7265
7266#[doc = "Seckey register"]
7267pub type FtdfSeckey1Reg = crate::RegValueT<FtdfSeckey1Reg_SPEC>;
7268
7269impl FtdfSeckey1Reg {
7270 #[doc = "See register "secKey_0""]
7271 #[inline(always)]
7272 pub fn seckey_1(
7273 self,
7274 ) -> crate::common::RegisterField<
7275 0,
7276 0xffffffff,
7277 1,
7278 0,
7279 u32,
7280 u32,
7281 FtdfSeckey1Reg_SPEC,
7282 crate::common::RW,
7283 > {
7284 crate::common::RegisterField::<
7285 0,
7286 0xffffffff,
7287 1,
7288 0,
7289 u32,
7290 u32,
7291 FtdfSeckey1Reg_SPEC,
7292 crate::common::RW,
7293 >::from_register(self, 0)
7294 }
7295}
7296impl ::core::default::Default for FtdfSeckey1Reg {
7297 #[inline(always)]
7298 fn default() -> FtdfSeckey1Reg {
7299 <crate::RegValueT<FtdfSeckey1Reg_SPEC> as RegisterValue<_>>::new(0)
7300 }
7301}
7302
7303#[doc(hidden)]
7304#[derive(Copy, Clone, Eq, PartialEq)]
7305pub struct FtdfSeckey2Reg_SPEC;
7306impl crate::sealed::RegSpec for FtdfSeckey2Reg_SPEC {
7307 type DataType = u32;
7308}
7309
7310#[doc = "SecKey register"]
7311pub type FtdfSeckey2Reg = crate::RegValueT<FtdfSeckey2Reg_SPEC>;
7312
7313impl FtdfSeckey2Reg {
7314 #[doc = "See register "secKey_0""]
7315 #[inline(always)]
7316 pub fn seckey_2(
7317 self,
7318 ) -> crate::common::RegisterField<
7319 0,
7320 0xffffffff,
7321 1,
7322 0,
7323 u32,
7324 u32,
7325 FtdfSeckey2Reg_SPEC,
7326 crate::common::RW,
7327 > {
7328 crate::common::RegisterField::<
7329 0,
7330 0xffffffff,
7331 1,
7332 0,
7333 u32,
7334 u32,
7335 FtdfSeckey2Reg_SPEC,
7336 crate::common::RW,
7337 >::from_register(self, 0)
7338 }
7339}
7340impl ::core::default::Default for FtdfSeckey2Reg {
7341 #[inline(always)]
7342 fn default() -> FtdfSeckey2Reg {
7343 <crate::RegValueT<FtdfSeckey2Reg_SPEC> as RegisterValue<_>>::new(0)
7344 }
7345}
7346
7347#[doc(hidden)]
7348#[derive(Copy, Clone, Eq, PartialEq)]
7349pub struct FtdfSeckey3Reg_SPEC;
7350impl crate::sealed::RegSpec for FtdfSeckey3Reg_SPEC {
7351 type DataType = u32;
7352}
7353
7354#[doc = "Seckey register"]
7355pub type FtdfSeckey3Reg = crate::RegValueT<FtdfSeckey3Reg_SPEC>;
7356
7357impl FtdfSeckey3Reg {
7358 #[doc = "See register "secKey_0""]
7359 #[inline(always)]
7360 pub fn seckey_3(
7361 self,
7362 ) -> crate::common::RegisterField<
7363 0,
7364 0xffffffff,
7365 1,
7366 0,
7367 u32,
7368 u32,
7369 FtdfSeckey3Reg_SPEC,
7370 crate::common::RW,
7371 > {
7372 crate::common::RegisterField::<
7373 0,
7374 0xffffffff,
7375 1,
7376 0,
7377 u32,
7378 u32,
7379 FtdfSeckey3Reg_SPEC,
7380 crate::common::RW,
7381 >::from_register(self, 0)
7382 }
7383}
7384impl ::core::default::Default for FtdfSeckey3Reg {
7385 #[inline(always)]
7386 fn default() -> FtdfSeckey3Reg {
7387 <crate::RegValueT<FtdfSeckey3Reg_SPEC> as RegisterValue<_>>::new(0)
7388 }
7389}
7390
7391#[doc(hidden)]
7392#[derive(Copy, Clone, Eq, PartialEq)]
7393pub struct FtdfSecnonce0Reg_SPEC;
7394impl crate::sealed::RegSpec for FtdfSecnonce0Reg_SPEC {
7395 type DataType = u32;
7396}
7397
7398#[doc = "Nonce register used for encryption/decryption"]
7399pub type FtdfSecnonce0Reg = crate::RegValueT<FtdfSecnonce0Reg_SPEC>;
7400
7401impl FtdfSecnonce0Reg {
7402 #[doc = "Register secNonce\\[0..3\\] contains the Nonce to be used for encryption/decryption."]
7403 #[inline(always)]
7404 pub fn secnonce_0(
7405 self,
7406 ) -> crate::common::RegisterField<
7407 0,
7408 0xffffffff,
7409 1,
7410 0,
7411 u32,
7412 u32,
7413 FtdfSecnonce0Reg_SPEC,
7414 crate::common::RW,
7415 > {
7416 crate::common::RegisterField::<
7417 0,
7418 0xffffffff,
7419 1,
7420 0,
7421 u32,
7422 u32,
7423 FtdfSecnonce0Reg_SPEC,
7424 crate::common::RW,
7425 >::from_register(self, 0)
7426 }
7427}
7428impl ::core::default::Default for FtdfSecnonce0Reg {
7429 #[inline(always)]
7430 fn default() -> FtdfSecnonce0Reg {
7431 <crate::RegValueT<FtdfSecnonce0Reg_SPEC> as RegisterValue<_>>::new(0)
7432 }
7433}
7434
7435#[doc(hidden)]
7436#[derive(Copy, Clone, Eq, PartialEq)]
7437pub struct FtdfSecnonce1Reg_SPEC;
7438impl crate::sealed::RegSpec for FtdfSecnonce1Reg_SPEC {
7439 type DataType = u32;
7440}
7441
7442#[doc = "Nonce register used for encryption/decryption"]
7443pub type FtdfSecnonce1Reg = crate::RegValueT<FtdfSecnonce1Reg_SPEC>;
7444
7445impl FtdfSecnonce1Reg {
7446 #[doc = "See register "Nonce_0""]
7447 #[inline(always)]
7448 pub fn secnonce_1(
7449 self,
7450 ) -> crate::common::RegisterField<
7451 0,
7452 0xffffffff,
7453 1,
7454 0,
7455 u32,
7456 u32,
7457 FtdfSecnonce1Reg_SPEC,
7458 crate::common::RW,
7459 > {
7460 crate::common::RegisterField::<
7461 0,
7462 0xffffffff,
7463 1,
7464 0,
7465 u32,
7466 u32,
7467 FtdfSecnonce1Reg_SPEC,
7468 crate::common::RW,
7469 >::from_register(self, 0)
7470 }
7471}
7472impl ::core::default::Default for FtdfSecnonce1Reg {
7473 #[inline(always)]
7474 fn default() -> FtdfSecnonce1Reg {
7475 <crate::RegValueT<FtdfSecnonce1Reg_SPEC> as RegisterValue<_>>::new(0)
7476 }
7477}
7478
7479#[doc(hidden)]
7480#[derive(Copy, Clone, Eq, PartialEq)]
7481pub struct FtdfSecnonce2Reg_SPEC;
7482impl crate::sealed::RegSpec for FtdfSecnonce2Reg_SPEC {
7483 type DataType = u32;
7484}
7485
7486#[doc = "Nonce register used for encryption/decryption"]
7487pub type FtdfSecnonce2Reg = crate::RegValueT<FtdfSecnonce2Reg_SPEC>;
7488
7489impl FtdfSecnonce2Reg {
7490 #[doc = "See register "Nonce_0""]
7491 #[inline(always)]
7492 pub fn secnonce_2(
7493 self,
7494 ) -> crate::common::RegisterField<
7495 0,
7496 0xffffffff,
7497 1,
7498 0,
7499 u32,
7500 u32,
7501 FtdfSecnonce2Reg_SPEC,
7502 crate::common::RW,
7503 > {
7504 crate::common::RegisterField::<
7505 0,
7506 0xffffffff,
7507 1,
7508 0,
7509 u32,
7510 u32,
7511 FtdfSecnonce2Reg_SPEC,
7512 crate::common::RW,
7513 >::from_register(self, 0)
7514 }
7515}
7516impl ::core::default::Default for FtdfSecnonce2Reg {
7517 #[inline(always)]
7518 fn default() -> FtdfSecnonce2Reg {
7519 <crate::RegValueT<FtdfSecnonce2Reg_SPEC> as RegisterValue<_>>::new(0)
7520 }
7521}
7522
7523#[doc(hidden)]
7524#[derive(Copy, Clone, Eq, PartialEq)]
7525pub struct FtdfSecnonce3Reg_SPEC;
7526impl crate::sealed::RegSpec for FtdfSecnonce3Reg_SPEC {
7527 type DataType = u32;
7528}
7529
7530#[doc = "Nonce register used for encryption/decryption"]
7531pub type FtdfSecnonce3Reg = crate::RegValueT<FtdfSecnonce3Reg_SPEC>;
7532
7533impl FtdfSecnonce3Reg {
7534 #[doc = "See register "Nonce_0""]
7535 #[inline(always)]
7536 pub fn secnonce_3(
7537 self,
7538 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, FtdfSecnonce3Reg_SPEC, crate::common::RW>
7539 {
7540 crate::common::RegisterField::<
7541 0,
7542 0xff,
7543 1,
7544 0,
7545 u8,
7546 u8,
7547 FtdfSecnonce3Reg_SPEC,
7548 crate::common::RW,
7549 >::from_register(self, 0)
7550 }
7551}
7552impl ::core::default::Default for FtdfSecnonce3Reg {
7553 #[inline(always)]
7554 fn default() -> FtdfSecnonce3Reg {
7555 <crate::RegValueT<FtdfSecnonce3Reg_SPEC> as RegisterValue<_>>::new(0)
7556 }
7557}
7558
7559#[doc(hidden)]
7560#[derive(Copy, Clone, Eq, PartialEq)]
7561pub struct FtdfSecurity0Reg_SPEC;
7562impl crate::sealed::RegSpec for FtdfSecurity0Reg_SPEC {
7563 type DataType = u32;
7564}
7565
7566#[doc = "Security register"]
7567pub type FtdfSecurity0Reg = crate::RegValueT<FtdfSecurity0Reg_SPEC>;
7568
7569impl FtdfSecurity0Reg {
7570 #[doc = "The control register secEncDecn indicates whether to encrypt (\'1\') or decrypt (\'0\') the data."]
7571 #[inline(always)]
7572 pub fn secencdecn(
7573 self,
7574 ) -> crate::common::RegisterFieldBool<31, 1, 0, FtdfSecurity0Reg_SPEC, crate::common::RW> {
7575 crate::common::RegisterFieldBool::<31,1,0,FtdfSecurity0Reg_SPEC,crate::common::RW>::from_register(self,0)
7576 }
7577
7578 #[doc = "The length of the m_data is indicated by control register secMlength."]
7579 #[inline(always)]
7580 pub fn secmlength(
7581 self,
7582 ) -> crate::common::RegisterField<
7583 24,
7584 0x7f,
7585 1,
7586 0,
7587 u8,
7588 u8,
7589 FtdfSecurity0Reg_SPEC,
7590 crate::common::RW,
7591 > {
7592 crate::common::RegisterField::<
7593 24,
7594 0x7f,
7595 1,
7596 0,
7597 u8,
7598 u8,
7599 FtdfSecurity0Reg_SPEC,
7600 crate::common::RW,
7601 >::from_register(self, 0)
7602 }
7603
7604 #[doc = "The length of the a_data is indicated by control register secAlength.\nThe end of the a_data is the start point of the m_data. (So secAlength must also be set if security level==4)"]
7605 #[inline(always)]
7606 pub fn secalength(
7607 self,
7608 ) -> crate::common::RegisterField<
7609 16,
7610 0x7f,
7611 1,
7612 0,
7613 u8,
7614 u8,
7615 FtdfSecurity0Reg_SPEC,
7616 crate::common::RW,
7617 > {
7618 crate::common::RegisterField::<
7619 16,
7620 0x7f,
7621 1,
7622 0,
7623 u8,
7624 u8,
7625 FtdfSecurity0Reg_SPEC,
7626 crate::common::RW,
7627 >::from_register(self, 0)
7628 }
7629
7630 #[doc = "The UMAC shall indicate by control registers secEntry and secTxRxn which entry to use and if it\'s from the Tx or Rx buffer (\'1\' resp. \'0\')."]
7631 #[inline(always)]
7632 pub fn secentry(
7633 self,
7634 ) -> crate::common::RegisterField<8, 0xf, 1, 0, u8, u8, FtdfSecurity0Reg_SPEC, crate::common::RW>
7635 {
7636 crate::common::RegisterField::<8,0xf,1,0,u8,u8,FtdfSecurity0Reg_SPEC,crate::common::RW>::from_register(self,0)
7637 }
7638
7639 #[doc = "See register "secEntry""]
7640 #[inline(always)]
7641 pub fn sectxrxn(
7642 self,
7643 ) -> crate::common::RegisterFieldBool<1, 1, 0, FtdfSecurity0Reg_SPEC, crate::common::RW> {
7644 crate::common::RegisterFieldBool::<1,1,0,FtdfSecurity0Reg_SPEC,crate::common::RW>::from_register(self,0)
7645 }
7646}
7647impl ::core::default::Default for FtdfSecurity0Reg {
7648 #[inline(always)]
7649 fn default() -> FtdfSecurity0Reg {
7650 <crate::RegValueT<FtdfSecurity0Reg_SPEC> as RegisterValue<_>>::new(0)
7651 }
7652}
7653
7654#[doc(hidden)]
7655#[derive(Copy, Clone, Eq, PartialEq)]
7656pub struct FtdfSecurity1Reg_SPEC;
7657impl crate::sealed::RegSpec for FtdfSecurity1Reg_SPEC {
7658 type DataType = u32;
7659}
7660
7661#[doc = "Security register"]
7662pub type FtdfSecurity1Reg = crate::RegValueT<FtdfSecurity1Reg_SPEC>;
7663
7664impl FtdfSecurity1Reg {
7665 #[doc = "Register secEncrFlags contain the encryption flags field.\nBits \\[2:0\\] are the 3-bit encoding flags of a_data, the other bits msut be set to \'0\'."]
7666 #[inline(always)]
7667 pub fn secencrflags(
7668 self,
7669 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, FtdfSecurity1Reg_SPEC, crate::common::RW>
7670 {
7671 crate::common::RegisterField::<
7672 8,
7673 0xff,
7674 1,
7675 0,
7676 u8,
7677 u8,
7678 FtdfSecurity1Reg_SPEC,
7679 crate::common::RW,
7680 >::from_register(self, 0)
7681 }
7682
7683 #[doc = "Register secAuthFlags contains the authentication flags fields.\nbit\\[7\\] is \'0\'\nbit\\[6\\] is "A_data present"\nbit\\[5:3\\]: 3-bit security level of m_data\nbit\\[2:0\\]: 3-bit security level of a_data."]
7684 #[inline(always)]
7685 pub fn secauthflags(
7686 self,
7687 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, FtdfSecurity1Reg_SPEC, crate::common::RW>
7688 {
7689 crate::common::RegisterField::<
7690 0,
7691 0xff,
7692 1,
7693 0,
7694 u8,
7695 u8,
7696 FtdfSecurity1Reg_SPEC,
7697 crate::common::RW,
7698 >::from_register(self, 0)
7699 }
7700}
7701impl ::core::default::Default for FtdfSecurity1Reg {
7702 #[inline(always)]
7703 fn default() -> FtdfSecurity1Reg {
7704 <crate::RegValueT<FtdfSecurity1Reg_SPEC> as RegisterValue<_>>::new(0)
7705 }
7706}
7707
7708#[doc(hidden)]
7709#[derive(Copy, Clone, Eq, PartialEq)]
7710pub struct FtdfSecurityEventmaskReg_SPEC;
7711impl crate::sealed::RegSpec for FtdfSecurityEventmaskReg_SPEC {
7712 type DataType = u32;
7713}
7714
7715#[doc = "security event mask register"]
7716pub type FtdfSecurityEventmaskReg = crate::RegValueT<FtdfSecurityEventmaskReg_SPEC>;
7717
7718impl FtdfSecurityEventmaskReg {
7719 #[doc = "Mask bit for event "secReady_e"."]
7720 #[inline(always)]
7721 pub fn secready_m(
7722 self,
7723 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfSecurityEventmaskReg_SPEC, crate::common::RW>
7724 {
7725 crate::common::RegisterFieldBool::<0,1,0,FtdfSecurityEventmaskReg_SPEC,crate::common::RW>::from_register(self,0)
7726 }
7727}
7728impl ::core::default::Default for FtdfSecurityEventmaskReg {
7729 #[inline(always)]
7730 fn default() -> FtdfSecurityEventmaskReg {
7731 <crate::RegValueT<FtdfSecurityEventmaskReg_SPEC> as RegisterValue<_>>::new(0)
7732 }
7733}
7734
7735#[doc(hidden)]
7736#[derive(Copy, Clone, Eq, PartialEq)]
7737pub struct FtdfSecurityEventReg_SPEC;
7738impl crate::sealed::RegSpec for FtdfSecurityEventReg_SPEC {
7739 type DataType = u32;
7740}
7741
7742#[doc = "security event register"]
7743pub type FtdfSecurityEventReg = crate::RegValueT<FtdfSecurityEventReg_SPEC>;
7744
7745impl FtdfSecurityEventReg {
7746 #[doc = "The Event bit secReady_e is set when the authentication process is ready (i.e. secBusy is cleared).\nThis Event shall contribute to the gen_irq."]
7747 #[inline(always)]
7748 pub fn secready_e(
7749 self,
7750 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfSecurityEventReg_SPEC, crate::common::RW>
7751 {
7752 crate::common::RegisterFieldBool::<0,1,0,FtdfSecurityEventReg_SPEC,crate::common::RW>::from_register(self,0)
7753 }
7754}
7755impl ::core::default::Default for FtdfSecurityEventReg {
7756 #[inline(always)]
7757 fn default() -> FtdfSecurityEventReg {
7758 <crate::RegValueT<FtdfSecurityEventReg_SPEC> as RegisterValue<_>>::new(0)
7759 }
7760}
7761
7762#[doc(hidden)]
7763#[derive(Copy, Clone, Eq, PartialEq)]
7764pub struct FtdfSecurityOsReg_SPEC;
7765impl crate::sealed::RegSpec for FtdfSecurityOsReg_SPEC {
7766 type DataType = u32;
7767}
7768
7769#[doc = "One shot register to start encryption/decryption"]
7770pub type FtdfSecurityOsReg = crate::RegValueT<FtdfSecurityOsReg_SPEC>;
7771
7772impl FtdfSecurityOsReg {
7773 #[doc = "One_shot register to start the encryption, decryption and authentication support task."]
7774 #[inline(always)]
7775 pub fn secstart(
7776 self,
7777 ) -> crate::common::RegisterFieldBool<1, 1, 0, FtdfSecurityOsReg_SPEC, crate::common::W> {
7778 crate::common::RegisterFieldBool::<1,1,0,FtdfSecurityOsReg_SPEC,crate::common::W>::from_register(self,0)
7779 }
7780
7781 #[doc = "See register "Nonce_0""]
7782 #[inline(always)]
7783 pub fn secabort(
7784 self,
7785 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfSecurityOsReg_SPEC, crate::common::W> {
7786 crate::common::RegisterFieldBool::<0,1,0,FtdfSecurityOsReg_SPEC,crate::common::W>::from_register(self,0)
7787 }
7788}
7789impl ::core::default::Default for FtdfSecurityOsReg {
7790 #[inline(always)]
7791 fn default() -> FtdfSecurityOsReg {
7792 <crate::RegValueT<FtdfSecurityOsReg_SPEC> as RegisterValue<_>>::new(0)
7793 }
7794}
7795
7796#[doc(hidden)]
7797#[derive(Copy, Clone, Eq, PartialEq)]
7798pub struct FtdfSecurityStatusReg_SPEC;
7799impl crate::sealed::RegSpec for FtdfSecurityStatusReg_SPEC {
7800 type DataType = u32;
7801}
7802
7803#[doc = "Security status register"]
7804pub type FtdfSecurityStatusReg = crate::RegValueT<FtdfSecurityStatusReg_SPEC>;
7805
7806impl FtdfSecurityStatusReg {
7807 #[doc = "In case of decryption, the status bit secAuthFail will be set when the authentication has failed."]
7808 #[inline(always)]
7809 pub fn secauthfail(
7810 self,
7811 ) -> crate::common::RegisterFieldBool<1, 1, 0, FtdfSecurityStatusReg_SPEC, crate::common::R>
7812 {
7813 crate::common::RegisterFieldBool::<1,1,0,FtdfSecurityStatusReg_SPEC,crate::common::R>::from_register(self,0)
7814 }
7815
7816 #[doc = "Register "secBusy" indicates if the encryption/decryption process is still running."]
7817 #[inline(always)]
7818 pub fn secbusy(
7819 self,
7820 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfSecurityStatusReg_SPEC, crate::common::R>
7821 {
7822 crate::common::RegisterFieldBool::<0,1,0,FtdfSecurityStatusReg_SPEC,crate::common::R>::from_register(self,0)
7823 }
7824}
7825impl ::core::default::Default for FtdfSecurityStatusReg {
7826 #[inline(always)]
7827 fn default() -> FtdfSecurityStatusReg {
7828 <crate::RegValueT<FtdfSecurityStatusReg_SPEC> as RegisterValue<_>>::new(0)
7829 }
7830}
7831
7832#[doc(hidden)]
7833#[derive(Copy, Clone, Eq, PartialEq)]
7834pub struct FtdfSymboltime2ThrReg_SPEC;
7835impl crate::sealed::RegSpec for FtdfSymboltime2ThrReg_SPEC {
7836 type DataType = u32;
7837}
7838
7839#[doc = "Symboltime threshold register 2"]
7840pub type FtdfSymboltime2ThrReg = crate::RegValueT<FtdfSymboltime2ThrReg_SPEC>;
7841
7842impl FtdfSymboltime2ThrReg {
7843 #[doc = "Symboltime 2 Threshold to generate a general interrupt"]
7844 #[inline(always)]
7845 pub fn symboltime2thr(
7846 self,
7847 ) -> crate::common::RegisterField<
7848 0,
7849 0xffffffff,
7850 1,
7851 0,
7852 u32,
7853 u32,
7854 FtdfSymboltime2ThrReg_SPEC,
7855 crate::common::RW,
7856 > {
7857 crate::common::RegisterField::<
7858 0,
7859 0xffffffff,
7860 1,
7861 0,
7862 u32,
7863 u32,
7864 FtdfSymboltime2ThrReg_SPEC,
7865 crate::common::RW,
7866 >::from_register(self, 0)
7867 }
7868}
7869impl ::core::default::Default for FtdfSymboltime2ThrReg {
7870 #[inline(always)]
7871 fn default() -> FtdfSymboltime2ThrReg {
7872 <crate::RegValueT<FtdfSymboltime2ThrReg_SPEC> as RegisterValue<_>>::new(0)
7873 }
7874}
7875
7876#[doc(hidden)]
7877#[derive(Copy, Clone, Eq, PartialEq)]
7878pub struct FtdfSymboltimesnapshotvalReg_SPEC;
7879impl crate::sealed::RegSpec for FtdfSymboltimesnapshotvalReg_SPEC {
7880 type DataType = u32;
7881}
7882
7883#[doc = "Value timestamp generator"]
7884pub type FtdfSymboltimesnapshotvalReg = crate::RegValueT<FtdfSymboltimesnapshotvalReg_SPEC>;
7885
7886impl FtdfSymboltimesnapshotvalReg {
7887 #[doc = "The Status register SymbolTimeSnapshotVal indicates the actual value of the TimeStamp generator."]
7888 #[inline(always)]
7889 pub fn symboltimesnapshotval(
7890 self,
7891 ) -> crate::common::RegisterField<
7892 0,
7893 0xffffffff,
7894 1,
7895 0,
7896 u32,
7897 u32,
7898 FtdfSymboltimesnapshotvalReg_SPEC,
7899 crate::common::R,
7900 > {
7901 crate::common::RegisterField::<
7902 0,
7903 0xffffffff,
7904 1,
7905 0,
7906 u32,
7907 u32,
7908 FtdfSymboltimesnapshotvalReg_SPEC,
7909 crate::common::R,
7910 >::from_register(self, 0)
7911 }
7912}
7913impl ::core::default::Default for FtdfSymboltimesnapshotvalReg {
7914 #[inline(always)]
7915 fn default() -> FtdfSymboltimesnapshotvalReg {
7916 <crate::RegValueT<FtdfSymboltimesnapshotvalReg_SPEC> as RegisterValue<_>>::new(0)
7917 }
7918}
7919
7920#[doc(hidden)]
7921#[derive(Copy, Clone, Eq, PartialEq)]
7922pub struct FtdfSymboltimethrReg_SPEC;
7923impl crate::sealed::RegSpec for FtdfSymboltimethrReg_SPEC {
7924 type DataType = u32;
7925}
7926
7927#[doc = "Symboltime threshold register 1"]
7928pub type FtdfSymboltimethrReg = crate::RegValueT<FtdfSymboltimethrReg_SPEC>;
7929
7930impl FtdfSymboltimethrReg {
7931 #[doc = "Symboltime Threshold to generate a general interrupt"]
7932 #[inline(always)]
7933 pub fn symboltimethr(
7934 self,
7935 ) -> crate::common::RegisterField<
7936 0,
7937 0xffffffff,
7938 1,
7939 0,
7940 u32,
7941 u32,
7942 FtdfSymboltimethrReg_SPEC,
7943 crate::common::RW,
7944 > {
7945 crate::common::RegisterField::<
7946 0,
7947 0xffffffff,
7948 1,
7949 0,
7950 u32,
7951 u32,
7952 FtdfSymboltimethrReg_SPEC,
7953 crate::common::RW,
7954 >::from_register(self, 0)
7955 }
7956}
7957impl ::core::default::Default for FtdfSymboltimethrReg {
7958 #[inline(always)]
7959 fn default() -> FtdfSymboltimethrReg {
7960 <crate::RegValueT<FtdfSymboltimethrReg_SPEC> as RegisterValue<_>>::new(0)
7961 }
7962}
7963
7964#[doc(hidden)]
7965#[derive(Copy, Clone, Eq, PartialEq)]
7966pub struct FtdfSynctimestampphasevalReg_SPEC;
7967impl crate::sealed::RegSpec for FtdfSynctimestampphasevalReg_SPEC {
7968 type DataType = u32;
7969}
7970
7971#[doc = "Timestamp phase value regsiter"]
7972pub type FtdfSynctimestampphasevalReg = crate::RegValueT<FtdfSynctimestampphasevalReg_SPEC>;
7973
7974impl FtdfSynctimestampphasevalReg {
7975 #[doc = "Value to sync TS gen phase within a symbol with.\nPlease note the +1 correction needed for most accurate result (+0.5 is than the average error, resulting is a just too fast clock)."]
7976 #[inline(always)]
7977 pub fn synctimestampphaseval(
7978 self,
7979 ) -> crate::common::RegisterField<
7980 0,
7981 0xff,
7982 1,
7983 0,
7984 u8,
7985 u8,
7986 FtdfSynctimestampphasevalReg_SPEC,
7987 crate::common::RW,
7988 > {
7989 crate::common::RegisterField::<
7990 0,
7991 0xff,
7992 1,
7993 0,
7994 u8,
7995 u8,
7996 FtdfSynctimestampphasevalReg_SPEC,
7997 crate::common::RW,
7998 >::from_register(self, 0)
7999 }
8000}
8001impl ::core::default::Default for FtdfSynctimestampphasevalReg {
8002 #[inline(always)]
8003 fn default() -> FtdfSynctimestampphasevalReg {
8004 <crate::RegValueT<FtdfSynctimestampphasevalReg_SPEC> as RegisterValue<_>>::new(0)
8005 }
8006}
8007
8008#[doc(hidden)]
8009#[derive(Copy, Clone, Eq, PartialEq)]
8010pub struct FtdfSynctimestampthrReg_SPEC;
8011impl crate::sealed::RegSpec for FtdfSynctimestampthrReg_SPEC {
8012 type DataType = u32;
8013}
8014
8015#[doc = "Threshold timestamp generator"]
8016pub type FtdfSynctimestampthrReg = crate::RegValueT<FtdfSynctimestampthrReg_SPEC>;
8017
8018impl FtdfSynctimestampthrReg {
8019 #[doc = "Threshold for synchronize TS gen.\nNote that due to implementation this register may only be written once per two LP_CLK periods."]
8020 #[inline(always)]
8021 pub fn synctimestampthr(
8022 self,
8023 ) -> crate::common::RegisterField<
8024 0,
8025 0xffffffff,
8026 1,
8027 0,
8028 u32,
8029 u32,
8030 FtdfSynctimestampthrReg_SPEC,
8031 crate::common::RW,
8032 > {
8033 crate::common::RegisterField::<
8034 0,
8035 0xffffffff,
8036 1,
8037 0,
8038 u32,
8039 u32,
8040 FtdfSynctimestampthrReg_SPEC,
8041 crate::common::RW,
8042 >::from_register(self, 0)
8043 }
8044}
8045impl ::core::default::Default for FtdfSynctimestampthrReg {
8046 #[inline(always)]
8047 fn default() -> FtdfSynctimestampthrReg {
8048 <crate::RegValueT<FtdfSynctimestampthrReg_SPEC> as RegisterValue<_>>::new(0)
8049 }
8050}
8051
8052#[doc(hidden)]
8053#[derive(Copy, Clone, Eq, PartialEq)]
8054pub struct FtdfSynctimestampvalReg_SPEC;
8055impl crate::sealed::RegSpec for FtdfSynctimestampvalReg_SPEC {
8056 type DataType = u32;
8057}
8058
8059#[doc = "Value timestamp generator"]
8060pub type FtdfSynctimestampvalReg = crate::RegValueT<FtdfSynctimestampvalReg_SPEC>;
8061
8062impl FtdfSynctimestampvalReg {
8063 #[doc = "Value to sync TS gen with."]
8064 #[inline(always)]
8065 pub fn synctimestampval(
8066 self,
8067 ) -> crate::common::RegisterField<
8068 0,
8069 0xffffffff,
8070 1,
8071 0,
8072 u32,
8073 u32,
8074 FtdfSynctimestampvalReg_SPEC,
8075 crate::common::RW,
8076 > {
8077 crate::common::RegisterField::<
8078 0,
8079 0xffffffff,
8080 1,
8081 0,
8082 u32,
8083 u32,
8084 FtdfSynctimestampvalReg_SPEC,
8085 crate::common::RW,
8086 >::from_register(self, 0)
8087 }
8088}
8089impl ::core::default::Default for FtdfSynctimestampvalReg {
8090 #[inline(always)]
8091 fn default() -> FtdfSynctimestampvalReg {
8092 <crate::RegValueT<FtdfSynctimestampvalReg_SPEC> as RegisterValue<_>>::new(0)
8093 }
8094}
8095
8096#[doc(hidden)]
8097#[derive(Copy, Clone, Eq, PartialEq)]
8098pub struct FtdfTimerControl1Reg_SPEC;
8099impl crate::sealed::RegSpec for FtdfTimerControl1Reg_SPEC {
8100 type DataType = u32;
8101}
8102
8103#[doc = "Timer control register"]
8104pub type FtdfTimerControl1Reg = crate::RegValueT<FtdfTimerControl1Reg_SPEC>;
8105
8106impl FtdfTimerControl1Reg {
8107 #[doc = "If set, the TimeStampThr is enabled to generate a sync of the TS gen."]
8108 #[inline(always)]
8109 pub fn synctimestampena(
8110 self,
8111 ) -> crate::common::RegisterFieldBool<1, 1, 0, FtdfTimerControl1Reg_SPEC, crate::common::RW>
8112 {
8113 crate::common::RegisterFieldBool::<1,1,0,FtdfTimerControl1Reg_SPEC,crate::common::RW>::from_register(self,0)
8114 }
8115}
8116impl ::core::default::Default for FtdfTimerControl1Reg {
8117 #[inline(always)]
8118 fn default() -> FtdfTimerControl1Reg {
8119 <crate::RegValueT<FtdfTimerControl1Reg_SPEC> as RegisterValue<_>>::new(0)
8120 }
8121}
8122
8123#[doc(hidden)]
8124#[derive(Copy, Clone, Eq, PartialEq)]
8125pub struct FtdfTimestampcurrphasevalReg_SPEC;
8126impl crate::sealed::RegSpec for FtdfTimestampcurrphasevalReg_SPEC {
8127 type DataType = u32;
8128}
8129
8130#[doc = "Value of timestamp generator phase within a symbol"]
8131pub type FtdfTimestampcurrphasevalReg = crate::RegValueT<FtdfTimestampcurrphasevalReg_SPEC>;
8132
8133impl FtdfTimestampcurrphasevalReg {
8134 #[doc = "Value of captured TS gen phase within a symbol"]
8135 #[inline(always)]
8136 pub fn timestampcurrphaseval(
8137 self,
8138 ) -> crate::common::RegisterField<
8139 0,
8140 0xff,
8141 1,
8142 0,
8143 u8,
8144 u8,
8145 FtdfTimestampcurrphasevalReg_SPEC,
8146 crate::common::R,
8147 > {
8148 crate::common::RegisterField::<
8149 0,
8150 0xff,
8151 1,
8152 0,
8153 u8,
8154 u8,
8155 FtdfTimestampcurrphasevalReg_SPEC,
8156 crate::common::R,
8157 >::from_register(self, 0)
8158 }
8159}
8160impl ::core::default::Default for FtdfTimestampcurrphasevalReg {
8161 #[inline(always)]
8162 fn default() -> FtdfTimestampcurrphasevalReg {
8163 <crate::RegValueT<FtdfTimestampcurrphasevalReg_SPEC> as RegisterValue<_>>::new(0)
8164 }
8165}
8166
8167#[doc(hidden)]
8168#[derive(Copy, Clone, Eq, PartialEq)]
8169pub struct FtdfTimestampcurrvalReg_SPEC;
8170impl crate::sealed::RegSpec for FtdfTimestampcurrvalReg_SPEC {
8171 type DataType = u32;
8172}
8173
8174#[doc = "Value of timestamp generator"]
8175pub type FtdfTimestampcurrvalReg = crate::RegValueT<FtdfTimestampcurrvalReg_SPEC>;
8176
8177impl FtdfTimestampcurrvalReg {
8178 #[doc = "Value of captured TS gen"]
8179 #[inline(always)]
8180 pub fn timestampcurrval(
8181 self,
8182 ) -> crate::common::RegisterField<
8183 0,
8184 0xffffffff,
8185 1,
8186 0,
8187 u32,
8188 u32,
8189 FtdfTimestampcurrvalReg_SPEC,
8190 crate::common::R,
8191 > {
8192 crate::common::RegisterField::<
8193 0,
8194 0xffffffff,
8195 1,
8196 0,
8197 u32,
8198 u32,
8199 FtdfTimestampcurrvalReg_SPEC,
8200 crate::common::R,
8201 >::from_register(self, 0)
8202 }
8203}
8204impl ::core::default::Default for FtdfTimestampcurrvalReg {
8205 #[inline(always)]
8206 fn default() -> FtdfTimestampcurrvalReg {
8207 <crate::RegValueT<FtdfTimestampcurrvalReg_SPEC> as RegisterValue<_>>::new(0)
8208 }
8209}
8210
8211#[doc(hidden)]
8212#[derive(Copy, Clone, Eq, PartialEq)]
8213pub struct FtdfTschControl0Reg_SPEC;
8214impl crate::sealed::RegSpec for FtdfTschControl0Reg_SPEC {
8215 type DataType = u32;
8216}
8217
8218#[doc = "Lmac tsch control register"]
8219pub type FtdfTschControl0Reg = crate::RegValueT<FtdfTschControl0Reg_SPEC>;
8220
8221impl FtdfTschControl0Reg {
8222 #[doc = "The times to wait for start of frame"]
8223 #[inline(always)]
8224 pub fn mactsrxwait(
8225 self,
8226 ) -> crate::common::RegisterField<
8227 16,
8228 0xffff,
8229 1,
8230 0,
8231 u16,
8232 u16,
8233 FtdfTschControl0Reg_SPEC,
8234 crate::common::RW,
8235 > {
8236 crate::common::RegisterField::<
8237 16,
8238 0xffff,
8239 1,
8240 0,
8241 u16,
8242 u16,
8243 FtdfTschControl0Reg_SPEC,
8244 crate::common::RW,
8245 >::from_register(self, 0)
8246 }
8247
8248 #[doc = "End of Rx frame to start of Ack"]
8249 #[inline(always)]
8250 pub fn mactstxackdelay(
8251 self,
8252 ) -> crate::common::RegisterField<
8253 0,
8254 0xffff,
8255 1,
8256 0,
8257 u16,
8258 u16,
8259 FtdfTschControl0Reg_SPEC,
8260 crate::common::RW,
8261 > {
8262 crate::common::RegisterField::<
8263 0,
8264 0xffff,
8265 1,
8266 0,
8267 u16,
8268 u16,
8269 FtdfTschControl0Reg_SPEC,
8270 crate::common::RW,
8271 >::from_register(self, 0)
8272 }
8273}
8274impl ::core::default::Default for FtdfTschControl0Reg {
8275 #[inline(always)]
8276 fn default() -> FtdfTschControl0Reg {
8277 <crate::RegValueT<FtdfTschControl0Reg_SPEC> as RegisterValue<_>>::new(144180200)
8278 }
8279}
8280
8281#[doc(hidden)]
8282#[derive(Copy, Clone, Eq, PartialEq)]
8283pub struct FtdfTschControl1Reg_SPEC;
8284impl crate::sealed::RegSpec for FtdfTschControl1Reg_SPEC {
8285 type DataType = u32;
8286}
8287
8288#[doc = "Lmac tsch control register"]
8289pub type FtdfTschControl1Reg = crate::RegValueT<FtdfTschControl1Reg_SPEC>;
8290
8291impl FtdfTschControl1Reg {
8292 #[doc = "The time between the CCA and the TX of a frame"]
8293 #[inline(always)]
8294 pub fn mactsrxtx(
8295 self,
8296 ) -> crate::common::RegisterField<
8297 0,
8298 0xffff,
8299 1,
8300 0,
8301 u16,
8302 u16,
8303 FtdfTschControl1Reg_SPEC,
8304 crate::common::RW,
8305 > {
8306 crate::common::RegisterField::<
8307 0,
8308 0xffff,
8309 1,
8310 0,
8311 u16,
8312 u16,
8313 FtdfTschControl1Reg_SPEC,
8314 crate::common::RW,
8315 >::from_register(self, 0)
8316 }
8317}
8318impl ::core::default::Default for FtdfTschControl1Reg {
8319 #[inline(always)]
8320 fn default() -> FtdfTschControl1Reg {
8321 <crate::RegValueT<FtdfTschControl1Reg_SPEC> as RegisterValue<_>>::new(192)
8322 }
8323}
8324
8325#[doc(hidden)]
8326#[derive(Copy, Clone, Eq, PartialEq)]
8327pub struct FtdfTschControl2Reg_SPEC;
8328impl crate::sealed::RegSpec for FtdfTschControl2Reg_SPEC {
8329 type DataType = u32;
8330}
8331
8332#[doc = "Lmac tsch control register"]
8333pub type FtdfTschControl2Reg = crate::RegValueT<FtdfTschControl2Reg_SPEC>;
8334
8335impl FtdfTschControl2Reg {
8336 #[doc = "The minimum time to wait for start of an Acknowledgement"]
8337 #[inline(always)]
8338 pub fn mactsackwait(
8339 self,
8340 ) -> crate::common::RegisterField<
8341 16,
8342 0xffff,
8343 1,
8344 0,
8345 u16,
8346 u16,
8347 FtdfTschControl2Reg_SPEC,
8348 crate::common::RW,
8349 > {
8350 crate::common::RegisterField::<
8351 16,
8352 0xffff,
8353 1,
8354 0,
8355 u16,
8356 u16,
8357 FtdfTschControl2Reg_SPEC,
8358 crate::common::RW,
8359 >::from_register(self, 0)
8360 }
8361
8362 #[doc = "End of frame to when the transmitter shall listen for Acknowledgement"]
8363 #[inline(always)]
8364 pub fn mactsrxackdelay(
8365 self,
8366 ) -> crate::common::RegisterField<
8367 0,
8368 0xffff,
8369 1,
8370 0,
8371 u16,
8372 u16,
8373 FtdfTschControl2Reg_SPEC,
8374 crate::common::RW,
8375 > {
8376 crate::common::RegisterField::<
8377 0,
8378 0xffff,
8379 1,
8380 0,
8381 u16,
8382 u16,
8383 FtdfTschControl2Reg_SPEC,
8384 crate::common::RW,
8385 >::from_register(self, 0)
8386 }
8387}
8388impl ::core::default::Default for FtdfTschControl2Reg {
8389 #[inline(always)]
8390 fn default() -> FtdfTschControl2Reg {
8391 <crate::RegValueT<FtdfTschControl2Reg_SPEC> as RegisterValue<_>>::new(26215200)
8392 }
8393}
8394
8395#[doc(hidden)]
8396#[derive(Copy, Clone, Eq, PartialEq)]
8397pub struct FtdfTxbyteEReg_SPEC;
8398impl crate::sealed::RegSpec for FtdfTxbyteEReg_SPEC {
8399 type DataType = u32;
8400}
8401
8402#[doc = "Transmit first byte register"]
8403pub type FtdfTxbyteEReg = crate::RegValueT<FtdfTxbyteEReg_SPEC>;
8404
8405impl FtdfTxbyteEReg {
8406 #[doc = "Indicates the last symbol of a frame is transmitted"]
8407 #[inline(always)]
8408 pub fn tx_last_symbol_e(
8409 self,
8410 ) -> crate::common::RegisterFieldBool<1, 1, 0, FtdfTxbyteEReg_SPEC, crate::common::RW> {
8411 crate::common::RegisterFieldBool::<1,1,0,FtdfTxbyteEReg_SPEC,crate::common::RW>::from_register(self,0)
8412 }
8413
8414 #[doc = "Indicates the first byte of a frame is transmitted"]
8415 #[inline(always)]
8416 pub fn txbyte_e(
8417 self,
8418 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfTxbyteEReg_SPEC, crate::common::RW> {
8419 crate::common::RegisterFieldBool::<0,1,0,FtdfTxbyteEReg_SPEC,crate::common::RW>::from_register(self,0)
8420 }
8421}
8422impl ::core::default::Default for FtdfTxbyteEReg {
8423 #[inline(always)]
8424 fn default() -> FtdfTxbyteEReg {
8425 <crate::RegValueT<FtdfTxbyteEReg_SPEC> as RegisterValue<_>>::new(0)
8426 }
8427}
8428
8429#[doc(hidden)]
8430#[derive(Copy, Clone, Eq, PartialEq)]
8431pub struct FtdfTxbyteMReg_SPEC;
8432impl crate::sealed::RegSpec for FtdfTxbyteMReg_SPEC {
8433 type DataType = u32;
8434}
8435
8436#[doc = "Transmit first byte mask register"]
8437pub type FtdfTxbyteMReg = crate::RegValueT<FtdfTxbyteMReg_SPEC>;
8438
8439impl FtdfTxbyteMReg {
8440 #[doc = "Mask bit for event "tx_last_symbol_e"."]
8441 #[inline(always)]
8442 pub fn tx_last_symbol_m(
8443 self,
8444 ) -> crate::common::RegisterFieldBool<1, 1, 0, FtdfTxbyteMReg_SPEC, crate::common::RW> {
8445 crate::common::RegisterFieldBool::<1,1,0,FtdfTxbyteMReg_SPEC,crate::common::RW>::from_register(self,0)
8446 }
8447
8448 #[doc = "Mask bit for event "txbyte_e"."]
8449 #[inline(always)]
8450 pub fn txbyte_m(
8451 self,
8452 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfTxbyteMReg_SPEC, crate::common::RW> {
8453 crate::common::RegisterFieldBool::<0,1,0,FtdfTxbyteMReg_SPEC,crate::common::RW>::from_register(self,0)
8454 }
8455}
8456impl ::core::default::Default for FtdfTxbyteMReg {
8457 #[inline(always)]
8458 fn default() -> FtdfTxbyteMReg {
8459 <crate::RegValueT<FtdfTxbyteMReg_SPEC> as RegisterValue<_>>::new(0)
8460 }
8461}
8462
8463#[doc(hidden)]
8464#[derive(Copy, Clone, Eq, PartialEq)]
8465pub struct FtdfTxpipepropdelayReg_SPEC;
8466impl crate::sealed::RegSpec for FtdfTxpipepropdelayReg_SPEC {
8467 type DataType = u32;
8468}
8469
8470#[doc = "Prop delay transmit register"]
8471pub type FtdfTxpipepropdelayReg = crate::RegValueT<FtdfTxpipepropdelayReg_SPEC>;
8472
8473impl FtdfTxpipepropdelayReg {
8474 #[doc = "Prop delay of tx pipe, start to DPHY"]
8475 #[inline(always)]
8476 pub fn txpipepropdelay(
8477 self,
8478 ) -> crate::common::RegisterField<
8479 0,
8480 0xff,
8481 1,
8482 0,
8483 u8,
8484 u8,
8485 FtdfTxpipepropdelayReg_SPEC,
8486 crate::common::RW,
8487 > {
8488 crate::common::RegisterField::<
8489 0,
8490 0xff,
8491 1,
8492 0,
8493 u8,
8494 u8,
8495 FtdfTxpipepropdelayReg_SPEC,
8496 crate::common::RW,
8497 >::from_register(self, 0)
8498 }
8499}
8500impl ::core::default::Default for FtdfTxpipepropdelayReg {
8501 #[inline(always)]
8502 fn default() -> FtdfTxpipepropdelayReg {
8503 <crate::RegValueT<FtdfTxpipepropdelayReg_SPEC> as RegisterValue<_>>::new(0)
8504 }
8505}
8506
8507#[doc(hidden)]
8508#[derive(Copy, Clone, Eq, PartialEq)]
8509pub struct FtdfTxClearOsReg_SPEC;
8510impl crate::sealed::RegSpec for FtdfTxClearOsReg_SPEC {
8511 type DataType = u32;
8512}
8513
8514#[doc = "One shot register to clear flag"]
8515pub type FtdfTxClearOsReg = crate::RegValueT<FtdfTxClearOsReg_SPEC>;
8516
8517impl FtdfTxClearOsReg {
8518 #[doc = "To clear tx_flag_stat"]
8519 #[inline(always)]
8520 pub fn tx_flag_clear(
8521 self,
8522 ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, FtdfTxClearOsReg_SPEC, crate::common::W>
8523 {
8524 crate::common::RegisterField::<0,0xf,1,0,u8,u8,FtdfTxClearOsReg_SPEC,crate::common::W>::from_register(self,0)
8525 }
8526}
8527impl ::core::default::Default for FtdfTxClearOsReg {
8528 #[inline(always)]
8529 fn default() -> FtdfTxClearOsReg {
8530 <crate::RegValueT<FtdfTxClearOsReg_SPEC> as RegisterValue<_>>::new(0)
8531 }
8532}
8533
8534#[doc(hidden)]
8535#[derive(Copy, Clone, Eq, PartialEq)]
8536pub struct FtdfTxControl0Reg_SPEC;
8537impl crate::sealed::RegSpec for FtdfTxControl0Reg_SPEC {
8538 type DataType = u32;
8539}
8540
8541#[doc = "Transmit control register"]
8542pub type FtdfTxControl0Reg = crate::RegValueT<FtdfTxControl0Reg_SPEC>;
8543
8544impl FtdfTxControl0Reg {
8545 #[doc = "Maximum number of CSMA-CA backoffs\n(range 0-5)"]
8546 #[inline(always)]
8547 pub fn macmaxcsmabackoffs(
8548 self,
8549 ) -> crate::common::RegisterField<
8550 12,
8551 0x7,
8552 1,
8553 0,
8554 u8,
8555 u8,
8556 FtdfTxControl0Reg_SPEC,
8557 crate::common::RW,
8558 > {
8559 crate::common::RegisterField::<
8560 12,
8561 0x7,
8562 1,
8563 0,
8564 u8,
8565 u8,
8566 FtdfTxControl0Reg_SPEC,
8567 crate::common::RW,
8568 >::from_register(self, 0)
8569 }
8570
8571 #[doc = "Minimum Backoff Exponent (range 0-macMaxBE)"]
8572 #[inline(always)]
8573 pub fn macminbe(
8574 self,
8575 ) -> crate::common::RegisterField<8, 0xf, 1, 0, u8, u8, FtdfTxControl0Reg_SPEC, crate::common::RW>
8576 {
8577 crate::common::RegisterField::<
8578 8,
8579 0xf,
8580 1,
8581 0,
8582 u8,
8583 u8,
8584 FtdfTxControl0Reg_SPEC,
8585 crate::common::RW,
8586 >::from_register(self, 0)
8587 }
8588
8589 #[doc = "Maximum Backoff Exponent (range 3-8)"]
8590 #[inline(always)]
8591 pub fn macmaxbe(
8592 self,
8593 ) -> crate::common::RegisterField<4, 0xf, 1, 0, u8, u8, FtdfTxControl0Reg_SPEC, crate::common::RW>
8594 {
8595 crate::common::RegisterField::<
8596 4,
8597 0xf,
8598 1,
8599 0,
8600 u8,
8601 u8,
8602 FtdfTxControl0Reg_SPEC,
8603 crate::common::RW,
8604 >::from_register(self, 0)
8605 }
8606
8607 #[doc = "If 1, the MPDU octets pass transparently through the MAC in the transmit direction (for debug purpose)."]
8608 #[inline(always)]
8609 pub fn dbgtxtransparentmode(
8610 self,
8611 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfTxControl0Reg_SPEC, crate::common::RW> {
8612 crate::common::RegisterFieldBool::<0,1,0,FtdfTxControl0Reg_SPEC,crate::common::RW>::from_register(self,0)
8613 }
8614}
8615impl ::core::default::Default for FtdfTxControl0Reg {
8616 #[inline(always)]
8617 fn default() -> FtdfTxControl0Reg {
8618 <crate::RegValueT<FtdfTxControl0Reg_SPEC> as RegisterValue<_>>::new(17232)
8619 }
8620}
8621
8622#[doc(hidden)]
8623#[derive(Copy, Clone, Eq, PartialEq)]
8624pub struct FtdfTxFifo00Reg_SPEC;
8625impl crate::sealed::RegSpec for FtdfTxFifo00Reg_SPEC {
8626 type DataType = u32;
8627}
8628
8629#[doc = "Address transmit fifo 0"]
8630pub type FtdfTxFifo00Reg = crate::RegValueT<FtdfTxFifo00Reg_SPEC>;
8631
8632impl FtdfTxFifo00Reg {
8633 #[doc = "Transmit fifo buffer, contains 32 addresses per entry (32b x 32a = 128B). There are 4 entries supported."]
8634 #[inline(always)]
8635 pub fn tx_fifo(
8636 self,
8637 ) -> crate::common::RegisterField<
8638 0,
8639 0xffffffff,
8640 1,
8641 0,
8642 u32,
8643 u32,
8644 FtdfTxFifo00Reg_SPEC,
8645 crate::common::RW,
8646 > {
8647 crate::common::RegisterField::<
8648 0,
8649 0xffffffff,
8650 1,
8651 0,
8652 u32,
8653 u32,
8654 FtdfTxFifo00Reg_SPEC,
8655 crate::common::RW,
8656 >::from_register(self, 0)
8657 }
8658}
8659impl ::core::default::Default for FtdfTxFifo00Reg {
8660 #[inline(always)]
8661 fn default() -> FtdfTxFifo00Reg {
8662 <crate::RegValueT<FtdfTxFifo00Reg_SPEC> as RegisterValue<_>>::new(0)
8663 }
8664}
8665
8666#[doc(hidden)]
8667#[derive(Copy, Clone, Eq, PartialEq)]
8668pub struct FtdfTxFifo10Reg_SPEC;
8669impl crate::sealed::RegSpec for FtdfTxFifo10Reg_SPEC {
8670 type DataType = u32;
8671}
8672
8673#[doc = "Address transmit fifo 1"]
8674pub type FtdfTxFifo10Reg = crate::RegValueT<FtdfTxFifo10Reg_SPEC>;
8675
8676impl FtdfTxFifo10Reg {
8677 #[doc = "Transmit fifo buffer, contains 32 addresses per entry (32b x 32a = 128B). There are 4 entries supported."]
8678 #[inline(always)]
8679 pub fn tx_fifo(
8680 self,
8681 ) -> crate::common::RegisterField<
8682 0,
8683 0xffffffff,
8684 1,
8685 0,
8686 u32,
8687 u32,
8688 FtdfTxFifo10Reg_SPEC,
8689 crate::common::RW,
8690 > {
8691 crate::common::RegisterField::<
8692 0,
8693 0xffffffff,
8694 1,
8695 0,
8696 u32,
8697 u32,
8698 FtdfTxFifo10Reg_SPEC,
8699 crate::common::RW,
8700 >::from_register(self, 0)
8701 }
8702}
8703impl ::core::default::Default for FtdfTxFifo10Reg {
8704 #[inline(always)]
8705 fn default() -> FtdfTxFifo10Reg {
8706 <crate::RegValueT<FtdfTxFifo10Reg_SPEC> as RegisterValue<_>>::new(0)
8707 }
8708}
8709
8710#[doc(hidden)]
8711#[derive(Copy, Clone, Eq, PartialEq)]
8712pub struct FtdfTxFifo20Reg_SPEC;
8713impl crate::sealed::RegSpec for FtdfTxFifo20Reg_SPEC {
8714 type DataType = u32;
8715}
8716
8717#[doc = "Address transmit fifo 2"]
8718pub type FtdfTxFifo20Reg = crate::RegValueT<FtdfTxFifo20Reg_SPEC>;
8719
8720impl FtdfTxFifo20Reg {
8721 #[doc = "Transmit fifo buffer, contains 32 addresses per entry (32b x 32a = 128B). There are 4 entries supported."]
8722 #[inline(always)]
8723 pub fn tx_fifo(
8724 self,
8725 ) -> crate::common::RegisterField<
8726 0,
8727 0xffffffff,
8728 1,
8729 0,
8730 u32,
8731 u32,
8732 FtdfTxFifo20Reg_SPEC,
8733 crate::common::RW,
8734 > {
8735 crate::common::RegisterField::<
8736 0,
8737 0xffffffff,
8738 1,
8739 0,
8740 u32,
8741 u32,
8742 FtdfTxFifo20Reg_SPEC,
8743 crate::common::RW,
8744 >::from_register(self, 0)
8745 }
8746}
8747impl ::core::default::Default for FtdfTxFifo20Reg {
8748 #[inline(always)]
8749 fn default() -> FtdfTxFifo20Reg {
8750 <crate::RegValueT<FtdfTxFifo20Reg_SPEC> as RegisterValue<_>>::new(0)
8751 }
8752}
8753
8754#[doc(hidden)]
8755#[derive(Copy, Clone, Eq, PartialEq)]
8756pub struct FtdfTxFifo30Reg_SPEC;
8757impl crate::sealed::RegSpec for FtdfTxFifo30Reg_SPEC {
8758 type DataType = u32;
8759}
8760
8761#[doc = "Address transmit fifo 3"]
8762pub type FtdfTxFifo30Reg = crate::RegValueT<FtdfTxFifo30Reg_SPEC>;
8763
8764impl FtdfTxFifo30Reg {
8765 #[doc = "Transmit fifo buffer, contains 32 addresses per entry (32b x 32a = 128B). There are 4 entries supported."]
8766 #[inline(always)]
8767 pub fn tx_fifo(
8768 self,
8769 ) -> crate::common::RegisterField<
8770 0,
8771 0xffffffff,
8772 1,
8773 0,
8774 u32,
8775 u32,
8776 FtdfTxFifo30Reg_SPEC,
8777 crate::common::RW,
8778 > {
8779 crate::common::RegisterField::<
8780 0,
8781 0xffffffff,
8782 1,
8783 0,
8784 u32,
8785 u32,
8786 FtdfTxFifo30Reg_SPEC,
8787 crate::common::RW,
8788 >::from_register(self, 0)
8789 }
8790}
8791impl ::core::default::Default for FtdfTxFifo30Reg {
8792 #[inline(always)]
8793 fn default() -> FtdfTxFifo30Reg {
8794 <crate::RegValueT<FtdfTxFifo30Reg_SPEC> as RegisterValue<_>>::new(0)
8795 }
8796}
8797
8798#[doc(hidden)]
8799#[derive(Copy, Clone, Eq, PartialEq)]
8800pub struct FtdfTxFlagClearE0Reg_SPEC;
8801impl crate::sealed::RegSpec for FtdfTxFlagClearE0Reg_SPEC {
8802 type DataType = u32;
8803}
8804
8805#[doc = "Clear flag register 0"]
8806pub type FtdfTxFlagClearE0Reg = crate::RegValueT<FtdfTxFlagClearE0Reg_SPEC>;
8807
8808impl FtdfTxFlagClearE0Reg {
8809 #[doc = "When the LMAC clears the tx_flag_stat status event bit tx_flag_clear_e is set."]
8810 #[inline(always)]
8811 pub fn tx_flag_clear_e(
8812 self,
8813 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfTxFlagClearE0Reg_SPEC, crate::common::RW>
8814 {
8815 crate::common::RegisterFieldBool::<0,1,0,FtdfTxFlagClearE0Reg_SPEC,crate::common::RW>::from_register(self,0)
8816 }
8817}
8818impl ::core::default::Default for FtdfTxFlagClearE0Reg {
8819 #[inline(always)]
8820 fn default() -> FtdfTxFlagClearE0Reg {
8821 <crate::RegValueT<FtdfTxFlagClearE0Reg_SPEC> as RegisterValue<_>>::new(0)
8822 }
8823}
8824
8825#[doc(hidden)]
8826#[derive(Copy, Clone, Eq, PartialEq)]
8827pub struct FtdfTxFlagClearE1Reg_SPEC;
8828impl crate::sealed::RegSpec for FtdfTxFlagClearE1Reg_SPEC {
8829 type DataType = u32;
8830}
8831
8832#[doc = "Clear flag register 1"]
8833pub type FtdfTxFlagClearE1Reg = crate::RegValueT<FtdfTxFlagClearE1Reg_SPEC>;
8834
8835impl FtdfTxFlagClearE1Reg {
8836 #[doc = "When the LMAC clears the tx_flag_stat status event bit tx_flag_clear_e is set."]
8837 #[inline(always)]
8838 pub fn tx_flag_clear_e(
8839 self,
8840 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfTxFlagClearE1Reg_SPEC, crate::common::RW>
8841 {
8842 crate::common::RegisterFieldBool::<0,1,0,FtdfTxFlagClearE1Reg_SPEC,crate::common::RW>::from_register(self,0)
8843 }
8844}
8845impl ::core::default::Default for FtdfTxFlagClearE1Reg {
8846 #[inline(always)]
8847 fn default() -> FtdfTxFlagClearE1Reg {
8848 <crate::RegValueT<FtdfTxFlagClearE1Reg_SPEC> as RegisterValue<_>>::new(0)
8849 }
8850}
8851
8852#[doc(hidden)]
8853#[derive(Copy, Clone, Eq, PartialEq)]
8854pub struct FtdfTxFlagClearE2Reg_SPEC;
8855impl crate::sealed::RegSpec for FtdfTxFlagClearE2Reg_SPEC {
8856 type DataType = u32;
8857}
8858
8859#[doc = "Clear flag register 2"]
8860pub type FtdfTxFlagClearE2Reg = crate::RegValueT<FtdfTxFlagClearE2Reg_SPEC>;
8861
8862impl FtdfTxFlagClearE2Reg {
8863 #[doc = "When the LMAC clears the tx_flag_stat status event bit tx_flag_clear_e is set."]
8864 #[inline(always)]
8865 pub fn tx_flag_clear_e(
8866 self,
8867 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfTxFlagClearE2Reg_SPEC, crate::common::RW>
8868 {
8869 crate::common::RegisterFieldBool::<0,1,0,FtdfTxFlagClearE2Reg_SPEC,crate::common::RW>::from_register(self,0)
8870 }
8871}
8872impl ::core::default::Default for FtdfTxFlagClearE2Reg {
8873 #[inline(always)]
8874 fn default() -> FtdfTxFlagClearE2Reg {
8875 <crate::RegValueT<FtdfTxFlagClearE2Reg_SPEC> as RegisterValue<_>>::new(0)
8876 }
8877}
8878
8879#[doc(hidden)]
8880#[derive(Copy, Clone, Eq, PartialEq)]
8881pub struct FtdfTxFlagClearE3Reg_SPEC;
8882impl crate::sealed::RegSpec for FtdfTxFlagClearE3Reg_SPEC {
8883 type DataType = u32;
8884}
8885
8886#[doc = "Clear flag register 3"]
8887pub type FtdfTxFlagClearE3Reg = crate::RegValueT<FtdfTxFlagClearE3Reg_SPEC>;
8888
8889impl FtdfTxFlagClearE3Reg {
8890 #[doc = "When the LMAC clears the tx_flag_stat status event bit tx_flag_clear_e is set."]
8891 #[inline(always)]
8892 pub fn tx_flag_clear_e(
8893 self,
8894 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfTxFlagClearE3Reg_SPEC, crate::common::RW>
8895 {
8896 crate::common::RegisterFieldBool::<0,1,0,FtdfTxFlagClearE3Reg_SPEC,crate::common::RW>::from_register(self,0)
8897 }
8898}
8899impl ::core::default::Default for FtdfTxFlagClearE3Reg {
8900 #[inline(always)]
8901 fn default() -> FtdfTxFlagClearE3Reg {
8902 <crate::RegValueT<FtdfTxFlagClearE3Reg_SPEC> as RegisterValue<_>>::new(0)
8903 }
8904}
8905
8906#[doc(hidden)]
8907#[derive(Copy, Clone, Eq, PartialEq)]
8908pub struct FtdfTxFlagClearM0Reg_SPEC;
8909impl crate::sealed::RegSpec for FtdfTxFlagClearM0Reg_SPEC {
8910 type DataType = u32;
8911}
8912
8913#[doc = "Mask flag register 0"]
8914pub type FtdfTxFlagClearM0Reg = crate::RegValueT<FtdfTxFlagClearM0Reg_SPEC>;
8915
8916impl FtdfTxFlagClearM0Reg {
8917 #[doc = "Mask bit for event "tx_flag_clear_e"."]
8918 #[inline(always)]
8919 pub fn tx_flag_clear_m(
8920 self,
8921 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfTxFlagClearM0Reg_SPEC, crate::common::RW>
8922 {
8923 crate::common::RegisterFieldBool::<0,1,0,FtdfTxFlagClearM0Reg_SPEC,crate::common::RW>::from_register(self,0)
8924 }
8925}
8926impl ::core::default::Default for FtdfTxFlagClearM0Reg {
8927 #[inline(always)]
8928 fn default() -> FtdfTxFlagClearM0Reg {
8929 <crate::RegValueT<FtdfTxFlagClearM0Reg_SPEC> as RegisterValue<_>>::new(0)
8930 }
8931}
8932
8933#[doc(hidden)]
8934#[derive(Copy, Clone, Eq, PartialEq)]
8935pub struct FtdfTxFlagClearM1Reg_SPEC;
8936impl crate::sealed::RegSpec for FtdfTxFlagClearM1Reg_SPEC {
8937 type DataType = u32;
8938}
8939
8940#[doc = "Mask flag register 1"]
8941pub type FtdfTxFlagClearM1Reg = crate::RegValueT<FtdfTxFlagClearM1Reg_SPEC>;
8942
8943impl FtdfTxFlagClearM1Reg {
8944 #[doc = "Mask bit for event "tx_flag_clear_e"."]
8945 #[inline(always)]
8946 pub fn tx_flag_clear_m(
8947 self,
8948 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfTxFlagClearM1Reg_SPEC, crate::common::RW>
8949 {
8950 crate::common::RegisterFieldBool::<0,1,0,FtdfTxFlagClearM1Reg_SPEC,crate::common::RW>::from_register(self,0)
8951 }
8952}
8953impl ::core::default::Default for FtdfTxFlagClearM1Reg {
8954 #[inline(always)]
8955 fn default() -> FtdfTxFlagClearM1Reg {
8956 <crate::RegValueT<FtdfTxFlagClearM1Reg_SPEC> as RegisterValue<_>>::new(0)
8957 }
8958}
8959
8960#[doc(hidden)]
8961#[derive(Copy, Clone, Eq, PartialEq)]
8962pub struct FtdfTxFlagClearM2Reg_SPEC;
8963impl crate::sealed::RegSpec for FtdfTxFlagClearM2Reg_SPEC {
8964 type DataType = u32;
8965}
8966
8967#[doc = "Clear flag register 2"]
8968pub type FtdfTxFlagClearM2Reg = crate::RegValueT<FtdfTxFlagClearM2Reg_SPEC>;
8969
8970impl FtdfTxFlagClearM2Reg {
8971 #[doc = "Mask bit for event "tx_flag_clear_e"."]
8972 #[inline(always)]
8973 pub fn tx_flag_clear_m(
8974 self,
8975 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfTxFlagClearM2Reg_SPEC, crate::common::RW>
8976 {
8977 crate::common::RegisterFieldBool::<0,1,0,FtdfTxFlagClearM2Reg_SPEC,crate::common::RW>::from_register(self,0)
8978 }
8979}
8980impl ::core::default::Default for FtdfTxFlagClearM2Reg {
8981 #[inline(always)]
8982 fn default() -> FtdfTxFlagClearM2Reg {
8983 <crate::RegValueT<FtdfTxFlagClearM2Reg_SPEC> as RegisterValue<_>>::new(0)
8984 }
8985}
8986
8987#[doc(hidden)]
8988#[derive(Copy, Clone, Eq, PartialEq)]
8989pub struct FtdfTxFlagClearM3Reg_SPEC;
8990impl crate::sealed::RegSpec for FtdfTxFlagClearM3Reg_SPEC {
8991 type DataType = u32;
8992}
8993
8994#[doc = "Clear flag register 3"]
8995pub type FtdfTxFlagClearM3Reg = crate::RegValueT<FtdfTxFlagClearM3Reg_SPEC>;
8996
8997impl FtdfTxFlagClearM3Reg {
8998 #[doc = "Mask bit for event "tx_flag_clear_e"."]
8999 #[inline(always)]
9000 pub fn tx_flag_clear_m(
9001 self,
9002 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfTxFlagClearM3Reg_SPEC, crate::common::RW>
9003 {
9004 crate::common::RegisterFieldBool::<0,1,0,FtdfTxFlagClearM3Reg_SPEC,crate::common::RW>::from_register(self,0)
9005 }
9006}
9007impl ::core::default::Default for FtdfTxFlagClearM3Reg {
9008 #[inline(always)]
9009 fn default() -> FtdfTxFlagClearM3Reg {
9010 <crate::RegValueT<FtdfTxFlagClearM3Reg_SPEC> as RegisterValue<_>>::new(0)
9011 }
9012}
9013
9014#[doc(hidden)]
9015#[derive(Copy, Clone, Eq, PartialEq)]
9016pub struct FtdfTxFlagS0Reg_SPEC;
9017impl crate::sealed::RegSpec for FtdfTxFlagS0Reg_SPEC {
9018 type DataType = u32;
9019}
9020
9021#[doc = "Transmit packet ready for transmission register 0"]
9022pub type FtdfTxFlagS0Reg = crate::RegValueT<FtdfTxFlagS0Reg_SPEC>;
9023
9024impl FtdfTxFlagS0Reg {
9025 #[doc = "Packet is ready for transmission"]
9026 #[inline(always)]
9027 pub fn tx_flag_stat(
9028 self,
9029 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfTxFlagS0Reg_SPEC, crate::common::R> {
9030 crate::common::RegisterFieldBool::<0,1,0,FtdfTxFlagS0Reg_SPEC,crate::common::R>::from_register(self,0)
9031 }
9032}
9033impl ::core::default::Default for FtdfTxFlagS0Reg {
9034 #[inline(always)]
9035 fn default() -> FtdfTxFlagS0Reg {
9036 <crate::RegValueT<FtdfTxFlagS0Reg_SPEC> as RegisterValue<_>>::new(0)
9037 }
9038}
9039
9040#[doc(hidden)]
9041#[derive(Copy, Clone, Eq, PartialEq)]
9042pub struct FtdfTxFlagS1Reg_SPEC;
9043impl crate::sealed::RegSpec for FtdfTxFlagS1Reg_SPEC {
9044 type DataType = u32;
9045}
9046
9047#[doc = "Transmit packet ready for transmission register 1"]
9048pub type FtdfTxFlagS1Reg = crate::RegValueT<FtdfTxFlagS1Reg_SPEC>;
9049
9050impl FtdfTxFlagS1Reg {
9051 #[doc = "Packet is ready for transmission"]
9052 #[inline(always)]
9053 pub fn tx_flag_stat(
9054 self,
9055 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfTxFlagS1Reg_SPEC, crate::common::R> {
9056 crate::common::RegisterFieldBool::<0,1,0,FtdfTxFlagS1Reg_SPEC,crate::common::R>::from_register(self,0)
9057 }
9058}
9059impl ::core::default::Default for FtdfTxFlagS1Reg {
9060 #[inline(always)]
9061 fn default() -> FtdfTxFlagS1Reg {
9062 <crate::RegValueT<FtdfTxFlagS1Reg_SPEC> as RegisterValue<_>>::new(0)
9063 }
9064}
9065
9066#[doc(hidden)]
9067#[derive(Copy, Clone, Eq, PartialEq)]
9068pub struct FtdfTxFlagS2Reg_SPEC;
9069impl crate::sealed::RegSpec for FtdfTxFlagS2Reg_SPEC {
9070 type DataType = u32;
9071}
9072
9073#[doc = "Transmit packet ready for transmission register 2"]
9074pub type FtdfTxFlagS2Reg = crate::RegValueT<FtdfTxFlagS2Reg_SPEC>;
9075
9076impl FtdfTxFlagS2Reg {
9077 #[doc = "Packet is ready for transmission"]
9078 #[inline(always)]
9079 pub fn tx_flag_stat(
9080 self,
9081 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfTxFlagS2Reg_SPEC, crate::common::R> {
9082 crate::common::RegisterFieldBool::<0,1,0,FtdfTxFlagS2Reg_SPEC,crate::common::R>::from_register(self,0)
9083 }
9084}
9085impl ::core::default::Default for FtdfTxFlagS2Reg {
9086 #[inline(always)]
9087 fn default() -> FtdfTxFlagS2Reg {
9088 <crate::RegValueT<FtdfTxFlagS2Reg_SPEC> as RegisterValue<_>>::new(0)
9089 }
9090}
9091
9092#[doc(hidden)]
9093#[derive(Copy, Clone, Eq, PartialEq)]
9094pub struct FtdfTxFlagS3Reg_SPEC;
9095impl crate::sealed::RegSpec for FtdfTxFlagS3Reg_SPEC {
9096 type DataType = u32;
9097}
9098
9099#[doc = "Transmit packet ready for transmission register 3"]
9100pub type FtdfTxFlagS3Reg = crate::RegValueT<FtdfTxFlagS3Reg_SPEC>;
9101
9102impl FtdfTxFlagS3Reg {
9103 #[doc = "Packet is ready for transmission"]
9104 #[inline(always)]
9105 pub fn tx_flag_stat(
9106 self,
9107 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfTxFlagS3Reg_SPEC, crate::common::R> {
9108 crate::common::RegisterFieldBool::<0,1,0,FtdfTxFlagS3Reg_SPEC,crate::common::R>::from_register(self,0)
9109 }
9110}
9111impl ::core::default::Default for FtdfTxFlagS3Reg {
9112 #[inline(always)]
9113 fn default() -> FtdfTxFlagS3Reg {
9114 <crate::RegValueT<FtdfTxFlagS3Reg_SPEC> as RegisterValue<_>>::new(0)
9115 }
9116}
9117
9118#[doc(hidden)]
9119#[derive(Copy, Clone, Eq, PartialEq)]
9120pub struct FtdfTxMetaData00Reg_SPEC;
9121impl crate::sealed::RegSpec for FtdfTxMetaData00Reg_SPEC {
9122 type DataType = u32;
9123}
9124
9125#[doc = "Transmit metadata register 0"]
9126pub type FtdfTxMetaData00Reg = crate::RegValueT<FtdfTxMetaData00Reg_SPEC>;
9127
9128impl FtdfTxMetaData00Reg {
9129 #[doc = "Indicates whether CRC16 insertion must be enabled or not.\n0 : No hardware inserted CRC16\n1 : Hardware inserts CRC16"]
9130 #[inline(always)]
9131 pub fn crc16_ena(
9132 self,
9133 ) -> crate::common::RegisterFieldBool<30, 1, 0, FtdfTxMetaData00Reg_SPEC, crate::common::RW>
9134 {
9135 crate::common::RegisterFieldBool::<30,1,0,FtdfTxMetaData00Reg_SPEC,crate::common::RW>::from_register(self,0)
9136 }
9137
9138 #[doc = "Indicates whether an acknowledge is expected from the recipient of this packet."]
9139 #[inline(always)]
9140 pub fn ackrequest(
9141 self,
9142 ) -> crate::common::RegisterFieldBool<28, 1, 0, FtdfTxMetaData00Reg_SPEC, crate::common::RW>
9143 {
9144 crate::common::RegisterFieldBool::<28,1,0,FtdfTxMetaData00Reg_SPEC,crate::common::RW>::from_register(self,0)
9145 }
9146
9147 #[doc = "Indicates whether a CSMA-CA is required for the transmission of this packet."]
9148 #[inline(always)]
9149 pub fn csmaca_ena(
9150 self,
9151 ) -> crate::common::RegisterFieldBool<26, 1, 0, FtdfTxMetaData00Reg_SPEC, crate::common::RW>
9152 {
9153 crate::common::RegisterFieldBool::<26,1,0,FtdfTxMetaData00Reg_SPEC,crate::common::RW>::from_register(self,0)
9154 }
9155
9156 #[doc = "Data/Cmd/Ack etc. Also indicate wakeup frame"]
9157 #[inline(always)]
9158 pub fn frametype(
9159 self,
9160 ) -> crate::common::RegisterField<
9161 23,
9162 0x7,
9163 1,
9164 0,
9165 u8,
9166 u8,
9167 FtdfTxMetaData00Reg_SPEC,
9168 crate::common::RW,
9169 > {
9170 crate::common::RegisterField::<
9171 23,
9172 0x7,
9173 1,
9174 0,
9175 u8,
9176 u8,
9177 FtdfTxMetaData00Reg_SPEC,
9178 crate::common::RW,
9179 >::from_register(self, 0)
9180 }
9181
9182 #[doc = "HighSide injection."]
9183 #[inline(always)]
9184 pub fn phyattr_hsi(
9185 self,
9186 ) -> crate::common::RegisterFieldBool<22, 1, 0, FtdfTxMetaData00Reg_SPEC, crate::common::RW>
9187 {
9188 crate::common::RegisterFieldBool::<22,1,0,FtdfTxMetaData00Reg_SPEC,crate::common::RW>::from_register(self,0)
9189 }
9190
9191 #[doc = "Slot-basis signals mapped on GPIO via PPA."]
9192 #[inline(always)]
9193 pub fn phyattr_rf_gpio_pins(
9194 self,
9195 ) -> crate::common::RegisterField<
9196 19,
9197 0x7,
9198 1,
9199 0,
9200 u8,
9201 u8,
9202 FtdfTxMetaData00Reg_SPEC,
9203 crate::common::RW,
9204 > {
9205 crate::common::RegisterField::<
9206 19,
9207 0x7,
9208 1,
9209 0,
9210 u8,
9211 u8,
9212 FtdfTxMetaData00Reg_SPEC,
9213 crate::common::RW,
9214 >::from_register(self, 0)
9215 }
9216
9217 #[doc = "CalCap value."]
9218 #[inline(always)]
9219 pub fn phyattr_calcap(
9220 self,
9221 ) -> crate::common::RegisterField<
9222 15,
9223 0xf,
9224 1,
9225 0,
9226 u8,
9227 u8,
9228 FtdfTxMetaData00Reg_SPEC,
9229 crate::common::RW,
9230 > {
9231 crate::common::RegisterField::<
9232 15,
9233 0xf,
9234 1,
9235 0,
9236 u8,
9237 u8,
9238 FtdfTxMetaData00Reg_SPEC,
9239 crate::common::RW,
9240 >::from_register(self, 0)
9241 }
9242
9243 #[doc = "Channel Number."]
9244 #[inline(always)]
9245 pub fn phyattr_cn(
9246 self,
9247 ) -> crate::common::RegisterField<
9248 11,
9249 0xf,
9250 1,
9251 0,
9252 u8,
9253 u8,
9254 FtdfTxMetaData00Reg_SPEC,
9255 crate::common::RW,
9256 > {
9257 crate::common::RegisterField::<
9258 11,
9259 0xf,
9260 1,
9261 0,
9262 u8,
9263 u8,
9264 FtdfTxMetaData00Reg_SPEC,
9265 crate::common::RW,
9266 >::from_register(self, 0)
9267 }
9268
9269 #[doc = "DEM packet information."]
9270 #[inline(always)]
9271 pub fn phyattr_dem_pti(
9272 self,
9273 ) -> crate::common::RegisterField<
9274 7,
9275 0xf,
9276 1,
9277 0,
9278 u8,
9279 u8,
9280 FtdfTxMetaData00Reg_SPEC,
9281 crate::common::RW,
9282 > {
9283 crate::common::RegisterField::<
9284 7,
9285 0xf,
9286 1,
9287 0,
9288 u8,
9289 u8,
9290 FtdfTxMetaData00Reg_SPEC,
9291 crate::common::RW,
9292 >::from_register(self, 0)
9293 }
9294
9295 #[doc = "Frame length"]
9296 #[inline(always)]
9297 pub fn frame_length(
9298 self,
9299 ) -> crate::common::RegisterField<
9300 0,
9301 0x7f,
9302 1,
9303 0,
9304 u8,
9305 u8,
9306 FtdfTxMetaData00Reg_SPEC,
9307 crate::common::RW,
9308 > {
9309 crate::common::RegisterField::<
9310 0,
9311 0x7f,
9312 1,
9313 0,
9314 u8,
9315 u8,
9316 FtdfTxMetaData00Reg_SPEC,
9317 crate::common::RW,
9318 >::from_register(self, 0)
9319 }
9320}
9321impl ::core::default::Default for FtdfTxMetaData00Reg {
9322 #[inline(always)]
9323 fn default() -> FtdfTxMetaData00Reg {
9324 <crate::RegValueT<FtdfTxMetaData00Reg_SPEC> as RegisterValue<_>>::new(0)
9325 }
9326}
9327
9328#[doc(hidden)]
9329#[derive(Copy, Clone, Eq, PartialEq)]
9330pub struct FtdfTxMetaData01Reg_SPEC;
9331impl crate::sealed::RegSpec for FtdfTxMetaData01Reg_SPEC {
9332 type DataType = u32;
9333}
9334
9335#[doc = "Transmit metadata register 1"]
9336pub type FtdfTxMetaData01Reg = crate::RegValueT<FtdfTxMetaData01Reg_SPEC>;
9337
9338impl FtdfTxMetaData01Reg {
9339 #[doc = "Indicates whether CRC16 insertion must be enabled or not.\n0 : No hardware inserted CRC16\n1 : Hardware inserts CRC16"]
9340 #[inline(always)]
9341 pub fn crc16_ena(
9342 self,
9343 ) -> crate::common::RegisterFieldBool<30, 1, 0, FtdfTxMetaData01Reg_SPEC, crate::common::RW>
9344 {
9345 crate::common::RegisterFieldBool::<30,1,0,FtdfTxMetaData01Reg_SPEC,crate::common::RW>::from_register(self,0)
9346 }
9347
9348 #[doc = "Indicates whether an acknowledge is expected from the recipient of this packet."]
9349 #[inline(always)]
9350 pub fn ackrequest(
9351 self,
9352 ) -> crate::common::RegisterFieldBool<28, 1, 0, FtdfTxMetaData01Reg_SPEC, crate::common::RW>
9353 {
9354 crate::common::RegisterFieldBool::<28,1,0,FtdfTxMetaData01Reg_SPEC,crate::common::RW>::from_register(self,0)
9355 }
9356
9357 #[doc = "Indicates whether a CSMA-CA is required for the transmission of this packet."]
9358 #[inline(always)]
9359 pub fn csmaca_ena(
9360 self,
9361 ) -> crate::common::RegisterFieldBool<26, 1, 0, FtdfTxMetaData01Reg_SPEC, crate::common::RW>
9362 {
9363 crate::common::RegisterFieldBool::<26,1,0,FtdfTxMetaData01Reg_SPEC,crate::common::RW>::from_register(self,0)
9364 }
9365
9366 #[doc = "Data/Cmd/Ack etc. Also indicate wakeup frame"]
9367 #[inline(always)]
9368 pub fn frametype(
9369 self,
9370 ) -> crate::common::RegisterField<
9371 23,
9372 0x7,
9373 1,
9374 0,
9375 u8,
9376 u8,
9377 FtdfTxMetaData01Reg_SPEC,
9378 crate::common::RW,
9379 > {
9380 crate::common::RegisterField::<
9381 23,
9382 0x7,
9383 1,
9384 0,
9385 u8,
9386 u8,
9387 FtdfTxMetaData01Reg_SPEC,
9388 crate::common::RW,
9389 >::from_register(self, 0)
9390 }
9391
9392 #[doc = "HighSide injection."]
9393 #[inline(always)]
9394 pub fn phyattr_hsi(
9395 self,
9396 ) -> crate::common::RegisterFieldBool<22, 1, 0, FtdfTxMetaData01Reg_SPEC, crate::common::RW>
9397 {
9398 crate::common::RegisterFieldBool::<22,1,0,FtdfTxMetaData01Reg_SPEC,crate::common::RW>::from_register(self,0)
9399 }
9400
9401 #[doc = "Slot-basis signals mapped on GPIO via PPA."]
9402 #[inline(always)]
9403 pub fn phyattr_rf_gpio_pins(
9404 self,
9405 ) -> crate::common::RegisterField<
9406 19,
9407 0x7,
9408 1,
9409 0,
9410 u8,
9411 u8,
9412 FtdfTxMetaData01Reg_SPEC,
9413 crate::common::RW,
9414 > {
9415 crate::common::RegisterField::<
9416 19,
9417 0x7,
9418 1,
9419 0,
9420 u8,
9421 u8,
9422 FtdfTxMetaData01Reg_SPEC,
9423 crate::common::RW,
9424 >::from_register(self, 0)
9425 }
9426
9427 #[doc = "CalCap value."]
9428 #[inline(always)]
9429 pub fn phyattr_calcap(
9430 self,
9431 ) -> crate::common::RegisterField<
9432 15,
9433 0xf,
9434 1,
9435 0,
9436 u8,
9437 u8,
9438 FtdfTxMetaData01Reg_SPEC,
9439 crate::common::RW,
9440 > {
9441 crate::common::RegisterField::<
9442 15,
9443 0xf,
9444 1,
9445 0,
9446 u8,
9447 u8,
9448 FtdfTxMetaData01Reg_SPEC,
9449 crate::common::RW,
9450 >::from_register(self, 0)
9451 }
9452
9453 #[doc = "Channel Number."]
9454 #[inline(always)]
9455 pub fn phyattr_cn(
9456 self,
9457 ) -> crate::common::RegisterField<
9458 11,
9459 0xf,
9460 1,
9461 0,
9462 u8,
9463 u8,
9464 FtdfTxMetaData01Reg_SPEC,
9465 crate::common::RW,
9466 > {
9467 crate::common::RegisterField::<
9468 11,
9469 0xf,
9470 1,
9471 0,
9472 u8,
9473 u8,
9474 FtdfTxMetaData01Reg_SPEC,
9475 crate::common::RW,
9476 >::from_register(self, 0)
9477 }
9478
9479 #[doc = "DEM packet information."]
9480 #[inline(always)]
9481 pub fn phyattr_dem_pti(
9482 self,
9483 ) -> crate::common::RegisterField<
9484 7,
9485 0xf,
9486 1,
9487 0,
9488 u8,
9489 u8,
9490 FtdfTxMetaData01Reg_SPEC,
9491 crate::common::RW,
9492 > {
9493 crate::common::RegisterField::<
9494 7,
9495 0xf,
9496 1,
9497 0,
9498 u8,
9499 u8,
9500 FtdfTxMetaData01Reg_SPEC,
9501 crate::common::RW,
9502 >::from_register(self, 0)
9503 }
9504
9505 #[doc = "Frame length"]
9506 #[inline(always)]
9507 pub fn frame_length(
9508 self,
9509 ) -> crate::common::RegisterField<
9510 0,
9511 0x7f,
9512 1,
9513 0,
9514 u8,
9515 u8,
9516 FtdfTxMetaData01Reg_SPEC,
9517 crate::common::RW,
9518 > {
9519 crate::common::RegisterField::<
9520 0,
9521 0x7f,
9522 1,
9523 0,
9524 u8,
9525 u8,
9526 FtdfTxMetaData01Reg_SPEC,
9527 crate::common::RW,
9528 >::from_register(self, 0)
9529 }
9530}
9531impl ::core::default::Default for FtdfTxMetaData01Reg {
9532 #[inline(always)]
9533 fn default() -> FtdfTxMetaData01Reg {
9534 <crate::RegValueT<FtdfTxMetaData01Reg_SPEC> as RegisterValue<_>>::new(0)
9535 }
9536}
9537
9538#[doc(hidden)]
9539#[derive(Copy, Clone, Eq, PartialEq)]
9540pub struct FtdfTxMetaData02Reg_SPEC;
9541impl crate::sealed::RegSpec for FtdfTxMetaData02Reg_SPEC {
9542 type DataType = u32;
9543}
9544
9545#[doc = "Transmit metadata register 2"]
9546pub type FtdfTxMetaData02Reg = crate::RegValueT<FtdfTxMetaData02Reg_SPEC>;
9547
9548impl FtdfTxMetaData02Reg {
9549 #[doc = "Indicates whether CRC16 insertion must be enabled or not.\n0 : No hardware inserted CRC16\n1 : Hardware inserts CRC16"]
9550 #[inline(always)]
9551 pub fn crc16_ena(
9552 self,
9553 ) -> crate::common::RegisterFieldBool<30, 1, 0, FtdfTxMetaData02Reg_SPEC, crate::common::RW>
9554 {
9555 crate::common::RegisterFieldBool::<30,1,0,FtdfTxMetaData02Reg_SPEC,crate::common::RW>::from_register(self,0)
9556 }
9557
9558 #[doc = "Indicates whether an acknowledge is expected from the recipient of this packet."]
9559 #[inline(always)]
9560 pub fn ackrequest(
9561 self,
9562 ) -> crate::common::RegisterFieldBool<28, 1, 0, FtdfTxMetaData02Reg_SPEC, crate::common::RW>
9563 {
9564 crate::common::RegisterFieldBool::<28,1,0,FtdfTxMetaData02Reg_SPEC,crate::common::RW>::from_register(self,0)
9565 }
9566
9567 #[doc = "Indicates whether a CSMA-CA is required for the transmission of this packet."]
9568 #[inline(always)]
9569 pub fn csmaca_ena(
9570 self,
9571 ) -> crate::common::RegisterFieldBool<26, 1, 0, FtdfTxMetaData02Reg_SPEC, crate::common::RW>
9572 {
9573 crate::common::RegisterFieldBool::<26,1,0,FtdfTxMetaData02Reg_SPEC,crate::common::RW>::from_register(self,0)
9574 }
9575
9576 #[doc = "Data/Cmd/Ack etc. Also indicate wakeup frame"]
9577 #[inline(always)]
9578 pub fn frametype(
9579 self,
9580 ) -> crate::common::RegisterField<
9581 23,
9582 0x7,
9583 1,
9584 0,
9585 u8,
9586 u8,
9587 FtdfTxMetaData02Reg_SPEC,
9588 crate::common::RW,
9589 > {
9590 crate::common::RegisterField::<
9591 23,
9592 0x7,
9593 1,
9594 0,
9595 u8,
9596 u8,
9597 FtdfTxMetaData02Reg_SPEC,
9598 crate::common::RW,
9599 >::from_register(self, 0)
9600 }
9601
9602 #[doc = "HighSide injection."]
9603 #[inline(always)]
9604 pub fn phyattr_hsi(
9605 self,
9606 ) -> crate::common::RegisterFieldBool<22, 1, 0, FtdfTxMetaData02Reg_SPEC, crate::common::RW>
9607 {
9608 crate::common::RegisterFieldBool::<22,1,0,FtdfTxMetaData02Reg_SPEC,crate::common::RW>::from_register(self,0)
9609 }
9610
9611 #[doc = "Slot-basis signals mapped on GPIO via PPA."]
9612 #[inline(always)]
9613 pub fn phyattr_rf_gpio_pins(
9614 self,
9615 ) -> crate::common::RegisterField<
9616 19,
9617 0x7,
9618 1,
9619 0,
9620 u8,
9621 u8,
9622 FtdfTxMetaData02Reg_SPEC,
9623 crate::common::RW,
9624 > {
9625 crate::common::RegisterField::<
9626 19,
9627 0x7,
9628 1,
9629 0,
9630 u8,
9631 u8,
9632 FtdfTxMetaData02Reg_SPEC,
9633 crate::common::RW,
9634 >::from_register(self, 0)
9635 }
9636
9637 #[doc = "CalCap value."]
9638 #[inline(always)]
9639 pub fn phyattr_calcap(
9640 self,
9641 ) -> crate::common::RegisterField<
9642 15,
9643 0xf,
9644 1,
9645 0,
9646 u8,
9647 u8,
9648 FtdfTxMetaData02Reg_SPEC,
9649 crate::common::RW,
9650 > {
9651 crate::common::RegisterField::<
9652 15,
9653 0xf,
9654 1,
9655 0,
9656 u8,
9657 u8,
9658 FtdfTxMetaData02Reg_SPEC,
9659 crate::common::RW,
9660 >::from_register(self, 0)
9661 }
9662
9663 #[doc = "Channel Number."]
9664 #[inline(always)]
9665 pub fn phyattr_cn(
9666 self,
9667 ) -> crate::common::RegisterField<
9668 11,
9669 0xf,
9670 1,
9671 0,
9672 u8,
9673 u8,
9674 FtdfTxMetaData02Reg_SPEC,
9675 crate::common::RW,
9676 > {
9677 crate::common::RegisterField::<
9678 11,
9679 0xf,
9680 1,
9681 0,
9682 u8,
9683 u8,
9684 FtdfTxMetaData02Reg_SPEC,
9685 crate::common::RW,
9686 >::from_register(self, 0)
9687 }
9688
9689 #[doc = "DEM packet information."]
9690 #[inline(always)]
9691 pub fn phyattr_dem_pti(
9692 self,
9693 ) -> crate::common::RegisterField<
9694 7,
9695 0xf,
9696 1,
9697 0,
9698 u8,
9699 u8,
9700 FtdfTxMetaData02Reg_SPEC,
9701 crate::common::RW,
9702 > {
9703 crate::common::RegisterField::<
9704 7,
9705 0xf,
9706 1,
9707 0,
9708 u8,
9709 u8,
9710 FtdfTxMetaData02Reg_SPEC,
9711 crate::common::RW,
9712 >::from_register(self, 0)
9713 }
9714
9715 #[doc = "Frame length"]
9716 #[inline(always)]
9717 pub fn frame_length(
9718 self,
9719 ) -> crate::common::RegisterField<
9720 0,
9721 0x7f,
9722 1,
9723 0,
9724 u8,
9725 u8,
9726 FtdfTxMetaData02Reg_SPEC,
9727 crate::common::RW,
9728 > {
9729 crate::common::RegisterField::<
9730 0,
9731 0x7f,
9732 1,
9733 0,
9734 u8,
9735 u8,
9736 FtdfTxMetaData02Reg_SPEC,
9737 crate::common::RW,
9738 >::from_register(self, 0)
9739 }
9740}
9741impl ::core::default::Default for FtdfTxMetaData02Reg {
9742 #[inline(always)]
9743 fn default() -> FtdfTxMetaData02Reg {
9744 <crate::RegValueT<FtdfTxMetaData02Reg_SPEC> as RegisterValue<_>>::new(0)
9745 }
9746}
9747
9748#[doc(hidden)]
9749#[derive(Copy, Clone, Eq, PartialEq)]
9750pub struct FtdfTxMetaData03Reg_SPEC;
9751impl crate::sealed::RegSpec for FtdfTxMetaData03Reg_SPEC {
9752 type DataType = u32;
9753}
9754
9755#[doc = "Transmit metadata register 3"]
9756pub type FtdfTxMetaData03Reg = crate::RegValueT<FtdfTxMetaData03Reg_SPEC>;
9757
9758impl FtdfTxMetaData03Reg {
9759 #[doc = "Indicates whether CRC16 insertion must be enabled or not.\n0 : No hardware inserted CRC16\n1 : Hardware inserts CRC16"]
9760 #[inline(always)]
9761 pub fn crc16_ena(
9762 self,
9763 ) -> crate::common::RegisterFieldBool<30, 1, 0, FtdfTxMetaData03Reg_SPEC, crate::common::RW>
9764 {
9765 crate::common::RegisterFieldBool::<30,1,0,FtdfTxMetaData03Reg_SPEC,crate::common::RW>::from_register(self,0)
9766 }
9767
9768 #[doc = "Indicates whether an acknowledge is expected from the recipient of this packet."]
9769 #[inline(always)]
9770 pub fn ackrequest(
9771 self,
9772 ) -> crate::common::RegisterFieldBool<28, 1, 0, FtdfTxMetaData03Reg_SPEC, crate::common::RW>
9773 {
9774 crate::common::RegisterFieldBool::<28,1,0,FtdfTxMetaData03Reg_SPEC,crate::common::RW>::from_register(self,0)
9775 }
9776
9777 #[doc = "Indicates whether a CSMA-CA is required for the transmission of this packet."]
9778 #[inline(always)]
9779 pub fn csmaca_ena(
9780 self,
9781 ) -> crate::common::RegisterFieldBool<26, 1, 0, FtdfTxMetaData03Reg_SPEC, crate::common::RW>
9782 {
9783 crate::common::RegisterFieldBool::<26,1,0,FtdfTxMetaData03Reg_SPEC,crate::common::RW>::from_register(self,0)
9784 }
9785
9786 #[doc = "Data/Cmd/Ack etc. Also indicate wakeup frame"]
9787 #[inline(always)]
9788 pub fn frametype(
9789 self,
9790 ) -> crate::common::RegisterField<
9791 23,
9792 0x7,
9793 1,
9794 0,
9795 u8,
9796 u8,
9797 FtdfTxMetaData03Reg_SPEC,
9798 crate::common::RW,
9799 > {
9800 crate::common::RegisterField::<
9801 23,
9802 0x7,
9803 1,
9804 0,
9805 u8,
9806 u8,
9807 FtdfTxMetaData03Reg_SPEC,
9808 crate::common::RW,
9809 >::from_register(self, 0)
9810 }
9811
9812 #[doc = "HighSide injection."]
9813 #[inline(always)]
9814 pub fn phyattr_hsi(
9815 self,
9816 ) -> crate::common::RegisterFieldBool<22, 1, 0, FtdfTxMetaData03Reg_SPEC, crate::common::RW>
9817 {
9818 crate::common::RegisterFieldBool::<22,1,0,FtdfTxMetaData03Reg_SPEC,crate::common::RW>::from_register(self,0)
9819 }
9820
9821 #[doc = "Slot-basis signals mapped on GPIO via PPA."]
9822 #[inline(always)]
9823 pub fn phyattr_rf_gpio_pins(
9824 self,
9825 ) -> crate::common::RegisterField<
9826 19,
9827 0x7,
9828 1,
9829 0,
9830 u8,
9831 u8,
9832 FtdfTxMetaData03Reg_SPEC,
9833 crate::common::RW,
9834 > {
9835 crate::common::RegisterField::<
9836 19,
9837 0x7,
9838 1,
9839 0,
9840 u8,
9841 u8,
9842 FtdfTxMetaData03Reg_SPEC,
9843 crate::common::RW,
9844 >::from_register(self, 0)
9845 }
9846
9847 #[doc = "CalCap value."]
9848 #[inline(always)]
9849 pub fn phyattr_calcap(
9850 self,
9851 ) -> crate::common::RegisterField<
9852 15,
9853 0xf,
9854 1,
9855 0,
9856 u8,
9857 u8,
9858 FtdfTxMetaData03Reg_SPEC,
9859 crate::common::RW,
9860 > {
9861 crate::common::RegisterField::<
9862 15,
9863 0xf,
9864 1,
9865 0,
9866 u8,
9867 u8,
9868 FtdfTxMetaData03Reg_SPEC,
9869 crate::common::RW,
9870 >::from_register(self, 0)
9871 }
9872
9873 #[doc = "Channel Number."]
9874 #[inline(always)]
9875 pub fn phyattr_cn(
9876 self,
9877 ) -> crate::common::RegisterField<
9878 11,
9879 0xf,
9880 1,
9881 0,
9882 u8,
9883 u8,
9884 FtdfTxMetaData03Reg_SPEC,
9885 crate::common::RW,
9886 > {
9887 crate::common::RegisterField::<
9888 11,
9889 0xf,
9890 1,
9891 0,
9892 u8,
9893 u8,
9894 FtdfTxMetaData03Reg_SPEC,
9895 crate::common::RW,
9896 >::from_register(self, 0)
9897 }
9898
9899 #[doc = "DEM packet information."]
9900 #[inline(always)]
9901 pub fn phyattr_dem_pti(
9902 self,
9903 ) -> crate::common::RegisterField<
9904 7,
9905 0xf,
9906 1,
9907 0,
9908 u8,
9909 u8,
9910 FtdfTxMetaData03Reg_SPEC,
9911 crate::common::RW,
9912 > {
9913 crate::common::RegisterField::<
9914 7,
9915 0xf,
9916 1,
9917 0,
9918 u8,
9919 u8,
9920 FtdfTxMetaData03Reg_SPEC,
9921 crate::common::RW,
9922 >::from_register(self, 0)
9923 }
9924
9925 #[doc = "Frame length"]
9926 #[inline(always)]
9927 pub fn frame_length(
9928 self,
9929 ) -> crate::common::RegisterField<
9930 0,
9931 0x7f,
9932 1,
9933 0,
9934 u8,
9935 u8,
9936 FtdfTxMetaData03Reg_SPEC,
9937 crate::common::RW,
9938 > {
9939 crate::common::RegisterField::<
9940 0,
9941 0x7f,
9942 1,
9943 0,
9944 u8,
9945 u8,
9946 FtdfTxMetaData03Reg_SPEC,
9947 crate::common::RW,
9948 >::from_register(self, 0)
9949 }
9950}
9951impl ::core::default::Default for FtdfTxMetaData03Reg {
9952 #[inline(always)]
9953 fn default() -> FtdfTxMetaData03Reg {
9954 <crate::RegValueT<FtdfTxMetaData03Reg_SPEC> as RegisterValue<_>>::new(0)
9955 }
9956}
9957
9958#[doc(hidden)]
9959#[derive(Copy, Clone, Eq, PartialEq)]
9960pub struct FtdfTxMetaData10Reg_SPEC;
9961impl crate::sealed::RegSpec for FtdfTxMetaData10Reg_SPEC {
9962 type DataType = u32;
9963}
9964
9965#[doc = "Transmit metadata register 0"]
9966pub type FtdfTxMetaData10Reg = crate::RegValueT<FtdfTxMetaData10Reg_SPEC>;
9967
9968impl FtdfTxMetaData10Reg {
9969 #[doc = "Sequence Number of this packet."]
9970 #[inline(always)]
9971 pub fn macsn(
9972 self,
9973 ) -> crate::common::RegisterField<
9974 0,
9975 0xff,
9976 1,
9977 0,
9978 u8,
9979 u8,
9980 FtdfTxMetaData10Reg_SPEC,
9981 crate::common::RW,
9982 > {
9983 crate::common::RegisterField::<
9984 0,
9985 0xff,
9986 1,
9987 0,
9988 u8,
9989 u8,
9990 FtdfTxMetaData10Reg_SPEC,
9991 crate::common::RW,
9992 >::from_register(self, 0)
9993 }
9994}
9995impl ::core::default::Default for FtdfTxMetaData10Reg {
9996 #[inline(always)]
9997 fn default() -> FtdfTxMetaData10Reg {
9998 <crate::RegValueT<FtdfTxMetaData10Reg_SPEC> as RegisterValue<_>>::new(0)
9999 }
10000}
10001
10002#[doc(hidden)]
10003#[derive(Copy, Clone, Eq, PartialEq)]
10004pub struct FtdfTxMetaData11Reg_SPEC;
10005impl crate::sealed::RegSpec for FtdfTxMetaData11Reg_SPEC {
10006 type DataType = u32;
10007}
10008
10009#[doc = "Transmit metadata register 1"]
10010pub type FtdfTxMetaData11Reg = crate::RegValueT<FtdfTxMetaData11Reg_SPEC>;
10011
10012impl FtdfTxMetaData11Reg {
10013 #[doc = "Sequence Number of this packet."]
10014 #[inline(always)]
10015 pub fn macsn(
10016 self,
10017 ) -> crate::common::RegisterField<
10018 0,
10019 0xff,
10020 1,
10021 0,
10022 u8,
10023 u8,
10024 FtdfTxMetaData11Reg_SPEC,
10025 crate::common::RW,
10026 > {
10027 crate::common::RegisterField::<
10028 0,
10029 0xff,
10030 1,
10031 0,
10032 u8,
10033 u8,
10034 FtdfTxMetaData11Reg_SPEC,
10035 crate::common::RW,
10036 >::from_register(self, 0)
10037 }
10038}
10039impl ::core::default::Default for FtdfTxMetaData11Reg {
10040 #[inline(always)]
10041 fn default() -> FtdfTxMetaData11Reg {
10042 <crate::RegValueT<FtdfTxMetaData11Reg_SPEC> as RegisterValue<_>>::new(0)
10043 }
10044}
10045
10046#[doc(hidden)]
10047#[derive(Copy, Clone, Eq, PartialEq)]
10048pub struct FtdfTxMetaData12Reg_SPEC;
10049impl crate::sealed::RegSpec for FtdfTxMetaData12Reg_SPEC {
10050 type DataType = u32;
10051}
10052
10053#[doc = "Transmit metadata register 2"]
10054pub type FtdfTxMetaData12Reg = crate::RegValueT<FtdfTxMetaData12Reg_SPEC>;
10055
10056impl FtdfTxMetaData12Reg {
10057 #[doc = "Sequence Number of this packet."]
10058 #[inline(always)]
10059 pub fn macsn(
10060 self,
10061 ) -> crate::common::RegisterField<
10062 0,
10063 0xff,
10064 1,
10065 0,
10066 u8,
10067 u8,
10068 FtdfTxMetaData12Reg_SPEC,
10069 crate::common::RW,
10070 > {
10071 crate::common::RegisterField::<
10072 0,
10073 0xff,
10074 1,
10075 0,
10076 u8,
10077 u8,
10078 FtdfTxMetaData12Reg_SPEC,
10079 crate::common::RW,
10080 >::from_register(self, 0)
10081 }
10082}
10083impl ::core::default::Default for FtdfTxMetaData12Reg {
10084 #[inline(always)]
10085 fn default() -> FtdfTxMetaData12Reg {
10086 <crate::RegValueT<FtdfTxMetaData12Reg_SPEC> as RegisterValue<_>>::new(0)
10087 }
10088}
10089
10090#[doc(hidden)]
10091#[derive(Copy, Clone, Eq, PartialEq)]
10092pub struct FtdfTxMetaData13Reg_SPEC;
10093impl crate::sealed::RegSpec for FtdfTxMetaData13Reg_SPEC {
10094 type DataType = u32;
10095}
10096
10097#[doc = "Transmit metadata register 3"]
10098pub type FtdfTxMetaData13Reg = crate::RegValueT<FtdfTxMetaData13Reg_SPEC>;
10099
10100impl FtdfTxMetaData13Reg {
10101 #[doc = "Sequence Number of this packet."]
10102 #[inline(always)]
10103 pub fn macsn(
10104 self,
10105 ) -> crate::common::RegisterField<
10106 0,
10107 0xff,
10108 1,
10109 0,
10110 u8,
10111 u8,
10112 FtdfTxMetaData13Reg_SPEC,
10113 crate::common::RW,
10114 > {
10115 crate::common::RegisterField::<
10116 0,
10117 0xff,
10118 1,
10119 0,
10120 u8,
10121 u8,
10122 FtdfTxMetaData13Reg_SPEC,
10123 crate::common::RW,
10124 >::from_register(self, 0)
10125 }
10126}
10127impl ::core::default::Default for FtdfTxMetaData13Reg {
10128 #[inline(always)]
10129 fn default() -> FtdfTxMetaData13Reg {
10130 <crate::RegValueT<FtdfTxMetaData13Reg_SPEC> as RegisterValue<_>>::new(0)
10131 }
10132}
10133
10134#[doc(hidden)]
10135#[derive(Copy, Clone, Eq, PartialEq)]
10136pub struct FtdfTxPriority0Reg_SPEC;
10137impl crate::sealed::RegSpec for FtdfTxPriority0Reg_SPEC {
10138 type DataType = u32;
10139}
10140
10141#[doc = "Transmit priority register 0"]
10142pub type FtdfTxPriority0Reg = crate::RegValueT<FtdfTxPriority0Reg_SPEC>;
10143
10144impl FtdfTxPriority0Reg {
10145 #[doc = "A basic wake-up frame can be generated by the UMAC in the Tx buffer.\nThe meta data control bit IsWakeUp must be set to indicate that this is a Wake-up frame."]
10146 #[inline(always)]
10147 pub fn iswakeup(
10148 self,
10149 ) -> crate::common::RegisterFieldBool<4, 1, 0, FtdfTxPriority0Reg_SPEC, crate::common::RW> {
10150 crate::common::RegisterFieldBool::<4,1,0,FtdfTxPriority0Reg_SPEC,crate::common::RW>::from_register(self,0)
10151 }
10152
10153 #[doc = "Priority of packet"]
10154 #[inline(always)]
10155 pub fn tx_priority(
10156 self,
10157 ) -> crate::common::RegisterField<
10158 0,
10159 0xf,
10160 1,
10161 0,
10162 u8,
10163 u8,
10164 FtdfTxPriority0Reg_SPEC,
10165 crate::common::RW,
10166 > {
10167 crate::common::RegisterField::<
10168 0,
10169 0xf,
10170 1,
10171 0,
10172 u8,
10173 u8,
10174 FtdfTxPriority0Reg_SPEC,
10175 crate::common::RW,
10176 >::from_register(self, 0)
10177 }
10178}
10179impl ::core::default::Default for FtdfTxPriority0Reg {
10180 #[inline(always)]
10181 fn default() -> FtdfTxPriority0Reg {
10182 <crate::RegValueT<FtdfTxPriority0Reg_SPEC> as RegisterValue<_>>::new(0)
10183 }
10184}
10185
10186#[doc(hidden)]
10187#[derive(Copy, Clone, Eq, PartialEq)]
10188pub struct FtdfTxPriority1Reg_SPEC;
10189impl crate::sealed::RegSpec for FtdfTxPriority1Reg_SPEC {
10190 type DataType = u32;
10191}
10192
10193#[doc = "Transmit priority register 1"]
10194pub type FtdfTxPriority1Reg = crate::RegValueT<FtdfTxPriority1Reg_SPEC>;
10195
10196impl FtdfTxPriority1Reg {
10197 #[doc = "A basic wake-up frame can be generated by the UMAC in the Tx buffer.\nThe meta data control bit IsWakeUp must be set to indicate that this is a Wake-up frame."]
10198 #[inline(always)]
10199 pub fn iswakeup(
10200 self,
10201 ) -> crate::common::RegisterFieldBool<4, 1, 0, FtdfTxPriority1Reg_SPEC, crate::common::RW> {
10202 crate::common::RegisterFieldBool::<4,1,0,FtdfTxPriority1Reg_SPEC,crate::common::RW>::from_register(self,0)
10203 }
10204
10205 #[doc = "Priority of packet"]
10206 #[inline(always)]
10207 pub fn tx_priority(
10208 self,
10209 ) -> crate::common::RegisterField<
10210 0,
10211 0xf,
10212 1,
10213 0,
10214 u8,
10215 u8,
10216 FtdfTxPriority1Reg_SPEC,
10217 crate::common::RW,
10218 > {
10219 crate::common::RegisterField::<
10220 0,
10221 0xf,
10222 1,
10223 0,
10224 u8,
10225 u8,
10226 FtdfTxPriority1Reg_SPEC,
10227 crate::common::RW,
10228 >::from_register(self, 0)
10229 }
10230}
10231impl ::core::default::Default for FtdfTxPriority1Reg {
10232 #[inline(always)]
10233 fn default() -> FtdfTxPriority1Reg {
10234 <crate::RegValueT<FtdfTxPriority1Reg_SPEC> as RegisterValue<_>>::new(0)
10235 }
10236}
10237
10238#[doc(hidden)]
10239#[derive(Copy, Clone, Eq, PartialEq)]
10240pub struct FtdfTxPriority2Reg_SPEC;
10241impl crate::sealed::RegSpec for FtdfTxPriority2Reg_SPEC {
10242 type DataType = u32;
10243}
10244
10245#[doc = "Transmit priority register 2"]
10246pub type FtdfTxPriority2Reg = crate::RegValueT<FtdfTxPriority2Reg_SPEC>;
10247
10248impl FtdfTxPriority2Reg {
10249 #[doc = "A basic wake-up frame can be generated by the UMAC in the Tx buffer.\nThe meta data control bit IsWakeUp must be set to indicate that this is a Wake-up frame."]
10250 #[inline(always)]
10251 pub fn iswakeup(
10252 self,
10253 ) -> crate::common::RegisterFieldBool<4, 1, 0, FtdfTxPriority2Reg_SPEC, crate::common::RW> {
10254 crate::common::RegisterFieldBool::<4,1,0,FtdfTxPriority2Reg_SPEC,crate::common::RW>::from_register(self,0)
10255 }
10256
10257 #[doc = "Priority of packet"]
10258 #[inline(always)]
10259 pub fn tx_priority(
10260 self,
10261 ) -> crate::common::RegisterField<
10262 0,
10263 0xf,
10264 1,
10265 0,
10266 u8,
10267 u8,
10268 FtdfTxPriority2Reg_SPEC,
10269 crate::common::RW,
10270 > {
10271 crate::common::RegisterField::<
10272 0,
10273 0xf,
10274 1,
10275 0,
10276 u8,
10277 u8,
10278 FtdfTxPriority2Reg_SPEC,
10279 crate::common::RW,
10280 >::from_register(self, 0)
10281 }
10282}
10283impl ::core::default::Default for FtdfTxPriority2Reg {
10284 #[inline(always)]
10285 fn default() -> FtdfTxPriority2Reg {
10286 <crate::RegValueT<FtdfTxPriority2Reg_SPEC> as RegisterValue<_>>::new(0)
10287 }
10288}
10289
10290#[doc(hidden)]
10291#[derive(Copy, Clone, Eq, PartialEq)]
10292pub struct FtdfTxPriority3Reg_SPEC;
10293impl crate::sealed::RegSpec for FtdfTxPriority3Reg_SPEC {
10294 type DataType = u32;
10295}
10296
10297#[doc = "Transmit priority register 3"]
10298pub type FtdfTxPriority3Reg = crate::RegValueT<FtdfTxPriority3Reg_SPEC>;
10299
10300impl FtdfTxPriority3Reg {
10301 #[doc = "A basic wake-up frame can be generated by the UMAC in the Tx buffer.\nThe meta data control bit IsWakeUp must be set to indicate that this is a Wake-up frame."]
10302 #[inline(always)]
10303 pub fn iswakeup(
10304 self,
10305 ) -> crate::common::RegisterFieldBool<4, 1, 0, FtdfTxPriority3Reg_SPEC, crate::common::RW> {
10306 crate::common::RegisterFieldBool::<4,1,0,FtdfTxPriority3Reg_SPEC,crate::common::RW>::from_register(self,0)
10307 }
10308
10309 #[doc = "Priority of packet"]
10310 #[inline(always)]
10311 pub fn tx_priority(
10312 self,
10313 ) -> crate::common::RegisterField<
10314 0,
10315 0xf,
10316 1,
10317 0,
10318 u8,
10319 u8,
10320 FtdfTxPriority3Reg_SPEC,
10321 crate::common::RW,
10322 > {
10323 crate::common::RegisterField::<
10324 0,
10325 0xf,
10326 1,
10327 0,
10328 u8,
10329 u8,
10330 FtdfTxPriority3Reg_SPEC,
10331 crate::common::RW,
10332 >::from_register(self, 0)
10333 }
10334}
10335impl ::core::default::Default for FtdfTxPriority3Reg {
10336 #[inline(always)]
10337 fn default() -> FtdfTxPriority3Reg {
10338 <crate::RegValueT<FtdfTxPriority3Reg_SPEC> as RegisterValue<_>>::new(0)
10339 }
10340}
10341
10342#[doc(hidden)]
10343#[derive(Copy, Clone, Eq, PartialEq)]
10344pub struct FtdfTxReturnStatus00Reg_SPEC;
10345impl crate::sealed::RegSpec for FtdfTxReturnStatus00Reg_SPEC {
10346 type DataType = u32;
10347}
10348
10349#[doc = "Transmit status register 0"]
10350pub type FtdfTxReturnStatus00Reg = crate::RegValueT<FtdfTxReturnStatus00Reg_SPEC>;
10351
10352impl FtdfTxReturnStatus00Reg {
10353 #[doc = "Transmit Timestamp\nThe TimeStamp of the transmitted packet."]
10354 #[inline(always)]
10355 pub fn txtimestamp(
10356 self,
10357 ) -> crate::common::RegisterField<
10358 0,
10359 0xffffffff,
10360 1,
10361 0,
10362 u32,
10363 u32,
10364 FtdfTxReturnStatus00Reg_SPEC,
10365 crate::common::R,
10366 > {
10367 crate::common::RegisterField::<
10368 0,
10369 0xffffffff,
10370 1,
10371 0,
10372 u32,
10373 u32,
10374 FtdfTxReturnStatus00Reg_SPEC,
10375 crate::common::R,
10376 >::from_register(self, 0)
10377 }
10378}
10379impl ::core::default::Default for FtdfTxReturnStatus00Reg {
10380 #[inline(always)]
10381 fn default() -> FtdfTxReturnStatus00Reg {
10382 <crate::RegValueT<FtdfTxReturnStatus00Reg_SPEC> as RegisterValue<_>>::new(0)
10383 }
10384}
10385
10386#[doc(hidden)]
10387#[derive(Copy, Clone, Eq, PartialEq)]
10388pub struct FtdfTxReturnStatus01Reg_SPEC;
10389impl crate::sealed::RegSpec for FtdfTxReturnStatus01Reg_SPEC {
10390 type DataType = u32;
10391}
10392
10393#[doc = "Transmit status register 1"]
10394pub type FtdfTxReturnStatus01Reg = crate::RegValueT<FtdfTxReturnStatus01Reg_SPEC>;
10395
10396impl FtdfTxReturnStatus01Reg {
10397 #[doc = "Transmit Timestamp\nThe TimeStamp of the transmitted packet."]
10398 #[inline(always)]
10399 pub fn txtimestamp(
10400 self,
10401 ) -> crate::common::RegisterField<
10402 0,
10403 0xffffffff,
10404 1,
10405 0,
10406 u32,
10407 u32,
10408 FtdfTxReturnStatus01Reg_SPEC,
10409 crate::common::R,
10410 > {
10411 crate::common::RegisterField::<
10412 0,
10413 0xffffffff,
10414 1,
10415 0,
10416 u32,
10417 u32,
10418 FtdfTxReturnStatus01Reg_SPEC,
10419 crate::common::R,
10420 >::from_register(self, 0)
10421 }
10422}
10423impl ::core::default::Default for FtdfTxReturnStatus01Reg {
10424 #[inline(always)]
10425 fn default() -> FtdfTxReturnStatus01Reg {
10426 <crate::RegValueT<FtdfTxReturnStatus01Reg_SPEC> as RegisterValue<_>>::new(0)
10427 }
10428}
10429
10430#[doc(hidden)]
10431#[derive(Copy, Clone, Eq, PartialEq)]
10432pub struct FtdfTxReturnStatus02Reg_SPEC;
10433impl crate::sealed::RegSpec for FtdfTxReturnStatus02Reg_SPEC {
10434 type DataType = u32;
10435}
10436
10437#[doc = "Transmit status register 2"]
10438pub type FtdfTxReturnStatus02Reg = crate::RegValueT<FtdfTxReturnStatus02Reg_SPEC>;
10439
10440impl FtdfTxReturnStatus02Reg {
10441 #[doc = "Transmit Timestamp\nThe TimeStamp of the transmitted packet."]
10442 #[inline(always)]
10443 pub fn txtimestamp(
10444 self,
10445 ) -> crate::common::RegisterField<
10446 0,
10447 0xffffffff,
10448 1,
10449 0,
10450 u32,
10451 u32,
10452 FtdfTxReturnStatus02Reg_SPEC,
10453 crate::common::R,
10454 > {
10455 crate::common::RegisterField::<
10456 0,
10457 0xffffffff,
10458 1,
10459 0,
10460 u32,
10461 u32,
10462 FtdfTxReturnStatus02Reg_SPEC,
10463 crate::common::R,
10464 >::from_register(self, 0)
10465 }
10466}
10467impl ::core::default::Default for FtdfTxReturnStatus02Reg {
10468 #[inline(always)]
10469 fn default() -> FtdfTxReturnStatus02Reg {
10470 <crate::RegValueT<FtdfTxReturnStatus02Reg_SPEC> as RegisterValue<_>>::new(0)
10471 }
10472}
10473
10474#[doc(hidden)]
10475#[derive(Copy, Clone, Eq, PartialEq)]
10476pub struct FtdfTxReturnStatus03Reg_SPEC;
10477impl crate::sealed::RegSpec for FtdfTxReturnStatus03Reg_SPEC {
10478 type DataType = u32;
10479}
10480
10481#[doc = "Transmit status register 3"]
10482pub type FtdfTxReturnStatus03Reg = crate::RegValueT<FtdfTxReturnStatus03Reg_SPEC>;
10483
10484impl FtdfTxReturnStatus03Reg {
10485 #[doc = "Transmit Timestamp\nThe TimeStamp of the transmitted packet."]
10486 #[inline(always)]
10487 pub fn txtimestamp(
10488 self,
10489 ) -> crate::common::RegisterField<
10490 0,
10491 0xffffffff,
10492 1,
10493 0,
10494 u32,
10495 u32,
10496 FtdfTxReturnStatus03Reg_SPEC,
10497 crate::common::R,
10498 > {
10499 crate::common::RegisterField::<
10500 0,
10501 0xffffffff,
10502 1,
10503 0,
10504 u32,
10505 u32,
10506 FtdfTxReturnStatus03Reg_SPEC,
10507 crate::common::R,
10508 >::from_register(self, 0)
10509 }
10510}
10511impl ::core::default::Default for FtdfTxReturnStatus03Reg {
10512 #[inline(always)]
10513 fn default() -> FtdfTxReturnStatus03Reg {
10514 <crate::RegValueT<FtdfTxReturnStatus03Reg_SPEC> as RegisterValue<_>>::new(0)
10515 }
10516}
10517
10518#[doc(hidden)]
10519#[derive(Copy, Clone, Eq, PartialEq)]
10520pub struct FtdfTxReturnStatus10Reg_SPEC;
10521impl crate::sealed::RegSpec for FtdfTxReturnStatus10Reg_SPEC {
10522 type DataType = u32;
10523}
10524
10525#[doc = "Transmit status register 0"]
10526pub type FtdfTxReturnStatus10Reg = crate::RegValueT<FtdfTxReturnStatus10Reg_SPEC>;
10527
10528impl FtdfTxReturnStatus10Reg {
10529 #[doc = "Number of CSMA-CA retries"]
10530 #[inline(always)]
10531 pub fn csmacanrretries(
10532 self,
10533 ) -> crate::common::RegisterField<
10534 2,
10535 0x7,
10536 1,
10537 0,
10538 u8,
10539 u8,
10540 FtdfTxReturnStatus10Reg_SPEC,
10541 crate::common::R,
10542 > {
10543 crate::common::RegisterField::<
10544 2,
10545 0x7,
10546 1,
10547 0,
10548 u8,
10549 u8,
10550 FtdfTxReturnStatus10Reg_SPEC,
10551 crate::common::R,
10552 >::from_register(self, 0)
10553 }
10554
10555 #[doc = "CSMA-CA status\n0 : SUCCESS\n1 : FAIL"]
10556 #[inline(always)]
10557 pub fn csmacafail(
10558 self,
10559 ) -> crate::common::RegisterFieldBool<1, 1, 0, FtdfTxReturnStatus10Reg_SPEC, crate::common::R>
10560 {
10561 crate::common::RegisterFieldBool::<1,1,0,FtdfTxReturnStatus10Reg_SPEC,crate::common::R>::from_register(self,0)
10562 }
10563
10564 #[doc = "Acknowledgement status\n0 : SUCCESS\n1 : FAIL"]
10565 #[inline(always)]
10566 pub fn ackfail(
10567 self,
10568 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfTxReturnStatus10Reg_SPEC, crate::common::R>
10569 {
10570 crate::common::RegisterFieldBool::<0,1,0,FtdfTxReturnStatus10Reg_SPEC,crate::common::R>::from_register(self,0)
10571 }
10572}
10573impl ::core::default::Default for FtdfTxReturnStatus10Reg {
10574 #[inline(always)]
10575 fn default() -> FtdfTxReturnStatus10Reg {
10576 <crate::RegValueT<FtdfTxReturnStatus10Reg_SPEC> as RegisterValue<_>>::new(0)
10577 }
10578}
10579
10580#[doc(hidden)]
10581#[derive(Copy, Clone, Eq, PartialEq)]
10582pub struct FtdfTxReturnStatus11Reg_SPEC;
10583impl crate::sealed::RegSpec for FtdfTxReturnStatus11Reg_SPEC {
10584 type DataType = u32;
10585}
10586
10587#[doc = "Transmit status register 1"]
10588pub type FtdfTxReturnStatus11Reg = crate::RegValueT<FtdfTxReturnStatus11Reg_SPEC>;
10589
10590impl FtdfTxReturnStatus11Reg {
10591 #[doc = "Number of CSMA-CA retries"]
10592 #[inline(always)]
10593 pub fn csmacanrretries(
10594 self,
10595 ) -> crate::common::RegisterField<
10596 2,
10597 0x7,
10598 1,
10599 0,
10600 u8,
10601 u8,
10602 FtdfTxReturnStatus11Reg_SPEC,
10603 crate::common::R,
10604 > {
10605 crate::common::RegisterField::<
10606 2,
10607 0x7,
10608 1,
10609 0,
10610 u8,
10611 u8,
10612 FtdfTxReturnStatus11Reg_SPEC,
10613 crate::common::R,
10614 >::from_register(self, 0)
10615 }
10616
10617 #[doc = "CSMA-CA status\n0 : SUCCESS\n1 : FAIL"]
10618 #[inline(always)]
10619 pub fn csmacafail(
10620 self,
10621 ) -> crate::common::RegisterFieldBool<1, 1, 0, FtdfTxReturnStatus11Reg_SPEC, crate::common::R>
10622 {
10623 crate::common::RegisterFieldBool::<1,1,0,FtdfTxReturnStatus11Reg_SPEC,crate::common::R>::from_register(self,0)
10624 }
10625
10626 #[doc = "Acknowledgement status\n0 : SUCCESS\n1 : FAIL"]
10627 #[inline(always)]
10628 pub fn ackfail(
10629 self,
10630 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfTxReturnStatus11Reg_SPEC, crate::common::R>
10631 {
10632 crate::common::RegisterFieldBool::<0,1,0,FtdfTxReturnStatus11Reg_SPEC,crate::common::R>::from_register(self,0)
10633 }
10634}
10635impl ::core::default::Default for FtdfTxReturnStatus11Reg {
10636 #[inline(always)]
10637 fn default() -> FtdfTxReturnStatus11Reg {
10638 <crate::RegValueT<FtdfTxReturnStatus11Reg_SPEC> as RegisterValue<_>>::new(0)
10639 }
10640}
10641
10642#[doc(hidden)]
10643#[derive(Copy, Clone, Eq, PartialEq)]
10644pub struct FtdfTxReturnStatus12Reg_SPEC;
10645impl crate::sealed::RegSpec for FtdfTxReturnStatus12Reg_SPEC {
10646 type DataType = u32;
10647}
10648
10649#[doc = "Transmit status register 2"]
10650pub type FtdfTxReturnStatus12Reg = crate::RegValueT<FtdfTxReturnStatus12Reg_SPEC>;
10651
10652impl FtdfTxReturnStatus12Reg {
10653 #[doc = "Number of CSMA-CA retries"]
10654 #[inline(always)]
10655 pub fn csmacanrretries(
10656 self,
10657 ) -> crate::common::RegisterField<
10658 2,
10659 0x7,
10660 1,
10661 0,
10662 u8,
10663 u8,
10664 FtdfTxReturnStatus12Reg_SPEC,
10665 crate::common::R,
10666 > {
10667 crate::common::RegisterField::<
10668 2,
10669 0x7,
10670 1,
10671 0,
10672 u8,
10673 u8,
10674 FtdfTxReturnStatus12Reg_SPEC,
10675 crate::common::R,
10676 >::from_register(self, 0)
10677 }
10678
10679 #[doc = "CSMA-CA status\n0 : SUCCESS\n1 : FAIL"]
10680 #[inline(always)]
10681 pub fn csmacafail(
10682 self,
10683 ) -> crate::common::RegisterFieldBool<1, 1, 0, FtdfTxReturnStatus12Reg_SPEC, crate::common::R>
10684 {
10685 crate::common::RegisterFieldBool::<1,1,0,FtdfTxReturnStatus12Reg_SPEC,crate::common::R>::from_register(self,0)
10686 }
10687
10688 #[doc = "Acknowledgement status\n0 : SUCCESS\n1 : FAIL"]
10689 #[inline(always)]
10690 pub fn ackfail(
10691 self,
10692 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfTxReturnStatus12Reg_SPEC, crate::common::R>
10693 {
10694 crate::common::RegisterFieldBool::<0,1,0,FtdfTxReturnStatus12Reg_SPEC,crate::common::R>::from_register(self,0)
10695 }
10696}
10697impl ::core::default::Default for FtdfTxReturnStatus12Reg {
10698 #[inline(always)]
10699 fn default() -> FtdfTxReturnStatus12Reg {
10700 <crate::RegValueT<FtdfTxReturnStatus12Reg_SPEC> as RegisterValue<_>>::new(0)
10701 }
10702}
10703
10704#[doc(hidden)]
10705#[derive(Copy, Clone, Eq, PartialEq)]
10706pub struct FtdfTxReturnStatus13Reg_SPEC;
10707impl crate::sealed::RegSpec for FtdfTxReturnStatus13Reg_SPEC {
10708 type DataType = u32;
10709}
10710
10711#[doc = "Transmit status register 3"]
10712pub type FtdfTxReturnStatus13Reg = crate::RegValueT<FtdfTxReturnStatus13Reg_SPEC>;
10713
10714impl FtdfTxReturnStatus13Reg {
10715 #[doc = "Number of CSMA-CA retries"]
10716 #[inline(always)]
10717 pub fn csmacanrretries(
10718 self,
10719 ) -> crate::common::RegisterField<
10720 2,
10721 0x7,
10722 1,
10723 0,
10724 u8,
10725 u8,
10726 FtdfTxReturnStatus13Reg_SPEC,
10727 crate::common::R,
10728 > {
10729 crate::common::RegisterField::<
10730 2,
10731 0x7,
10732 1,
10733 0,
10734 u8,
10735 u8,
10736 FtdfTxReturnStatus13Reg_SPEC,
10737 crate::common::R,
10738 >::from_register(self, 0)
10739 }
10740
10741 #[doc = "CSMA-CA status\n0 : SUCCESS\n1 : FAIL"]
10742 #[inline(always)]
10743 pub fn csmacafail(
10744 self,
10745 ) -> crate::common::RegisterFieldBool<1, 1, 0, FtdfTxReturnStatus13Reg_SPEC, crate::common::R>
10746 {
10747 crate::common::RegisterFieldBool::<1,1,0,FtdfTxReturnStatus13Reg_SPEC,crate::common::R>::from_register(self,0)
10748 }
10749
10750 #[doc = "Acknowledgement status\n0 : SUCCESS\n1 : FAIL"]
10751 #[inline(always)]
10752 pub fn ackfail(
10753 self,
10754 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfTxReturnStatus13Reg_SPEC, crate::common::R>
10755 {
10756 crate::common::RegisterFieldBool::<0,1,0,FtdfTxReturnStatus13Reg_SPEC,crate::common::R>::from_register(self,0)
10757 }
10758}
10759impl ::core::default::Default for FtdfTxReturnStatus13Reg {
10760 #[inline(always)]
10761 fn default() -> FtdfTxReturnStatus13Reg {
10762 <crate::RegValueT<FtdfTxReturnStatus13Reg_SPEC> as RegisterValue<_>>::new(0)
10763 }
10764}
10765
10766#[doc(hidden)]
10767#[derive(Copy, Clone, Eq, PartialEq)]
10768pub struct FtdfTxSetOsReg_SPEC;
10769impl crate::sealed::RegSpec for FtdfTxSetOsReg_SPEC {
10770 type DataType = u32;
10771}
10772
10773#[doc = "One shot register to set flag"]
10774pub type FtdfTxSetOsReg = crate::RegValueT<FtdfTxSetOsReg_SPEC>;
10775
10776impl FtdfTxSetOsReg {
10777 #[doc = "To set tx_flag_stat"]
10778 #[inline(always)]
10779 pub fn tx_flag_set(
10780 self,
10781 ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, FtdfTxSetOsReg_SPEC, crate::common::W>
10782 {
10783 crate::common::RegisterField::<0,0xf,1,0,u8,u8,FtdfTxSetOsReg_SPEC,crate::common::W>::from_register(self,0)
10784 }
10785}
10786impl ::core::default::Default for FtdfTxSetOsReg {
10787 #[inline(always)]
10788 fn default() -> FtdfTxSetOsReg {
10789 <crate::RegValueT<FtdfTxSetOsReg_SPEC> as RegisterValue<_>>::new(0)
10790 }
10791}
10792
10793#[doc(hidden)]
10794#[derive(Copy, Clone, Eq, PartialEq)]
10795pub struct FtdfWakeupintthrReg_SPEC;
10796impl crate::sealed::RegSpec for FtdfWakeupintthrReg_SPEC {
10797 type DataType = u32;
10798}
10799
10800#[doc = "Treshold value Wakeup timer"]
10801pub type FtdfWakeupintthrReg = crate::RegValueT<FtdfWakeupintthrReg_SPEC>;
10802
10803impl FtdfWakeupintthrReg {
10804 #[doc = "Threshold for wake-up interrupt."]
10805 #[inline(always)]
10806 pub fn wakeupintthr(
10807 self,
10808 ) -> crate::common::RegisterField<
10809 0,
10810 0xffffffff,
10811 1,
10812 0,
10813 u32,
10814 u32,
10815 FtdfWakeupintthrReg_SPEC,
10816 crate::common::RW,
10817 > {
10818 crate::common::RegisterField::<
10819 0,
10820 0xffffffff,
10821 1,
10822 0,
10823 u32,
10824 u32,
10825 FtdfWakeupintthrReg_SPEC,
10826 crate::common::RW,
10827 >::from_register(self, 0)
10828 }
10829}
10830impl ::core::default::Default for FtdfWakeupintthrReg {
10831 #[inline(always)]
10832 fn default() -> FtdfWakeupintthrReg {
10833 <crate::RegValueT<FtdfWakeupintthrReg_SPEC> as RegisterValue<_>>::new(0)
10834 }
10835}
10836
10837#[doc(hidden)]
10838#[derive(Copy, Clone, Eq, PartialEq)]
10839pub struct FtdfWakeupControlReg_SPEC;
10840impl crate::sealed::RegSpec for FtdfWakeupControlReg_SPEC {
10841 type DataType = u32;
10842}
10843
10844#[doc = "Wakeup timer vcontrol register"]
10845pub type FtdfWakeupControlReg = crate::RegValueT<FtdfWakeupControlReg_SPEC>;
10846
10847impl FtdfWakeupControlReg {
10848 #[doc = "If set, the WakeUpIntThr is enabled to generate an interrupt."]
10849 #[inline(always)]
10850 pub fn wakeupenable(
10851 self,
10852 ) -> crate::common::RegisterFieldBool<1, 1, 0, FtdfWakeupControlReg_SPEC, crate::common::RW>
10853 {
10854 crate::common::RegisterFieldBool::<1,1,0,FtdfWakeupControlReg_SPEC,crate::common::RW>::from_register(self,0)
10855 }
10856
10857 #[doc = "A \'1\' Enables the wakeup timer.\nNote that in on_off_regmap, the register WakeupTimerEnableStatus shows the status of this register after being clocked by LP_CLK.\nChecking this register can be used as indication for software that this bit is effective in the desing."]
10858 #[inline(always)]
10859 pub fn wakeuptimerenable(
10860 self,
10861 ) -> crate::common::RegisterFieldBool<0, 1, 0, FtdfWakeupControlReg_SPEC, crate::common::RW>
10862 {
10863 crate::common::RegisterFieldBool::<0,1,0,FtdfWakeupControlReg_SPEC,crate::common::RW>::from_register(self,0)
10864 }
10865}
10866impl ::core::default::Default for FtdfWakeupControlReg {
10867 #[inline(always)]
10868 fn default() -> FtdfWakeupControlReg {
10869 <crate::RegValueT<FtdfWakeupControlReg_SPEC> as RegisterValue<_>>::new(0)
10870 }
10871}