da14583_pac/
lib.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.2, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:44:35 +0000
19#![cfg_attr(not(feature = "tracing"), no_std)]
20#![allow(non_camel_case_types)]
21#![doc = "Ultra-Low power Bleutooth 4.2 SoC with Flash memory codec from Dialog Semiconductor"]
22pub mod common;
23pub use common::*;
24
25#[cfg(feature = "tracing")]
26pub mod reg_name;
27#[cfg(feature = "tracing")]
28pub mod tracing;
29
30#[cfg(feature = "adc580_bif_nl01")]
31pub mod adc580_bif_nl01;
32#[cfg(feature = "anamisc580_nl01")]
33pub mod anamisc580_nl01;
34#[cfg(feature = "ble580_gr01")]
35pub mod ble580_gr01;
36#[cfg(feature = "chip_version")]
37pub mod chip_version;
38#[cfg(feature = "crg580_dcdc_nl01")]
39pub mod crg580_dcdc_nl01;
40#[cfg(feature = "crg580_nl01")]
41pub mod crg580_nl01;
42#[cfg(feature = "gpio580_ports_nl01")]
43pub mod gpio580_ports_nl01;
44#[cfg(feature = "i2c580_nl00")]
45pub mod i2c580_nl00;
46#[cfg(feature = "kbrd580_nl01")]
47pub mod kbrd580_nl01;
48#[cfg(feature = "nvic")]
49pub mod nvic;
50#[cfg(feature = "otpc580_gr01")]
51pub mod otpc580_gr01;
52#[cfg(feature = "quadec580_gr01")]
53pub mod quadec580_gr01;
54#[cfg(feature = "riscutil580_gpreg_nl01")]
55pub mod riscutil580_gpreg_nl01;
56#[cfg(feature = "riscutil580_wdog_nl00")]
57pub mod riscutil580_wdog_nl00;
58#[cfg(feature = "scb")]
59pub mod scb;
60#[cfg(feature = "spi443_nl00")]
61pub mod spi443_nl00;
62#[cfg(feature = "systick")]
63pub mod systick;
64#[cfg(feature = "tmr580_nl01")]
65pub mod tmr580_nl01;
66#[cfg(feature = "uart1")]
67pub mod uart1;
68#[cfg(feature = "uart2")]
69pub mod uart2;
70#[cfg(feature = "wkup580_nl01")]
71pub mod wkup580_nl01;
72
73#[cfg(feature = "nvic")]
74#[derive(Copy, Clone, Eq, PartialEq)]
75pub struct Nvic {
76    ptr: *mut u8,
77}
78#[cfg(feature = "nvic")]
79pub const NVIC: self::Nvic = self::Nvic {
80    ptr: 0xe000e100u32 as _,
81};
82#[cfg(feature = "scb")]
83#[derive(Copy, Clone, Eq, PartialEq)]
84pub struct Scb {
85    ptr: *mut u8,
86}
87#[cfg(feature = "scb")]
88pub const SCB: self::Scb = self::Scb {
89    ptr: 0xe000ed00u32 as _,
90};
91#[cfg(feature = "systick")]
92#[derive(Copy, Clone, Eq, PartialEq)]
93pub struct SysTick {
94    ptr: *mut u8,
95}
96#[cfg(feature = "systick")]
97pub const SYSTICK: self::SysTick = self::SysTick {
98    ptr: 0xe000e010u32 as _,
99};
100#[cfg(feature = "adc580_bif_nl01")]
101#[derive(Copy, Clone, Eq, PartialEq)]
102pub struct Adc580BifNl01 {
103    ptr: *mut u8,
104}
105#[cfg(feature = "adc580_bif_nl01")]
106pub const ADC580_BIF_NL01: self::Adc580BifNl01 = self::Adc580BifNl01 {
107    ptr: 0x50001500u32 as _,
108};
109#[cfg(feature = "anamisc580_nl01")]
110#[derive(Copy, Clone, Eq, PartialEq)]
111pub struct Anamisc580Nl01 {
112    ptr: *mut u8,
113}
114#[cfg(feature = "anamisc580_nl01")]
115pub const ANAMISC580_NL01: self::Anamisc580Nl01 = self::Anamisc580Nl01 {
116    ptr: 0x50001600u32 as _,
117};
118#[cfg(feature = "ble580_gr01")]
119#[derive(Copy, Clone, Eq, PartialEq)]
120pub struct Ble580Gr01 {
121    ptr: *mut u8,
122}
123#[cfg(feature = "ble580_gr01")]
124pub const BLE580_GR01: self::Ble580Gr01 = self::Ble580Gr01 {
125    ptr: 0x40000000u32 as _,
126};
127#[cfg(feature = "chip_version")]
128#[derive(Copy, Clone, Eq, PartialEq)]
129pub struct ChipVersion {
130    ptr: *mut u8,
131}
132#[cfg(feature = "chip_version")]
133pub const CHIP_VERSION: self::ChipVersion = self::ChipVersion {
134    ptr: 0x50003200u32 as _,
135};
136#[cfg(feature = "crg580_dcdc_nl01")]
137#[derive(Copy, Clone, Eq, PartialEq)]
138pub struct Crg580DcdcNl01 {
139    ptr: *mut u8,
140}
141#[cfg(feature = "crg580_dcdc_nl01")]
142pub const CRG580_DCDC_NL01: self::Crg580DcdcNl01 = self::Crg580DcdcNl01 {
143    ptr: 0x50000080u32 as _,
144};
145#[cfg(feature = "crg580_nl01")]
146#[derive(Copy, Clone, Eq, PartialEq)]
147pub struct Crg580Nl01 {
148    ptr: *mut u8,
149}
150#[cfg(feature = "crg580_nl01")]
151pub const CRG580_NL01: self::Crg580Nl01 = self::Crg580Nl01 {
152    ptr: 0x50000000u32 as _,
153};
154#[cfg(feature = "gpio580_ports_nl01")]
155#[derive(Copy, Clone, Eq, PartialEq)]
156pub struct Gpio580PortsNl01 {
157    ptr: *mut u8,
158}
159#[cfg(feature = "gpio580_ports_nl01")]
160pub const GPIO580_PORTS_NL01: self::Gpio580PortsNl01 = self::Gpio580PortsNl01 {
161    ptr: 0x50003000u32 as _,
162};
163#[cfg(feature = "i2c580_nl00")]
164#[derive(Copy, Clone, Eq, PartialEq)]
165pub struct I2C580Nl00 {
166    ptr: *mut u8,
167}
168#[cfg(feature = "i2c580_nl00")]
169pub const I2C580_NL00: self::I2C580Nl00 = self::I2C580Nl00 {
170    ptr: 0x50001300u32 as _,
171};
172#[cfg(feature = "kbrd580_nl01")]
173#[derive(Copy, Clone, Eq, PartialEq)]
174pub struct Kbrd580Nl01 {
175    ptr: *mut u8,
176}
177#[cfg(feature = "kbrd580_nl01")]
178pub const KBRD580_NL01: self::Kbrd580Nl01 = self::Kbrd580Nl01 {
179    ptr: 0x50001400u32 as _,
180};
181#[cfg(feature = "otpc580_gr01")]
182#[derive(Copy, Clone, Eq, PartialEq)]
183pub struct Otpc580Gr01 {
184    ptr: *mut u8,
185}
186#[cfg(feature = "otpc580_gr01")]
187pub const OTPC580_GR01: self::Otpc580Gr01 = self::Otpc580Gr01 {
188    ptr: 0x40008000u32 as _,
189};
190#[cfg(feature = "quadec580_gr01")]
191#[derive(Copy, Clone, Eq, PartialEq)]
192pub struct Quadec580Gr01 {
193    ptr: *mut u8,
194}
195#[cfg(feature = "quadec580_gr01")]
196pub const QUADEC580_GR01: self::Quadec580Gr01 = self::Quadec580Gr01 {
197    ptr: 0x50000200u32 as _,
198};
199#[cfg(feature = "riscutil580_gpreg_nl01")]
200#[derive(Copy, Clone, Eq, PartialEq)]
201pub struct Riscutil580GpregNl01 {
202    ptr: *mut u8,
203}
204#[cfg(feature = "riscutil580_gpreg_nl01")]
205pub const RISCUTIL580_GPREG_NL01: self::Riscutil580GpregNl01 = self::Riscutil580GpregNl01 {
206    ptr: 0x50003300u32 as _,
207};
208#[cfg(feature = "riscutil580_wdog_nl00")]
209#[derive(Copy, Clone, Eq, PartialEq)]
210pub struct Riscutil580WdogNl00 {
211    ptr: *mut u8,
212}
213#[cfg(feature = "riscutil580_wdog_nl00")]
214pub const RISCUTIL580_WDOG_NL00: self::Riscutil580WdogNl00 = self::Riscutil580WdogNl00 {
215    ptr: 0x50003100u32 as _,
216};
217#[cfg(feature = "spi443_nl00")]
218#[derive(Copy, Clone, Eq, PartialEq)]
219pub struct Spi443Nl00 {
220    ptr: *mut u8,
221}
222#[cfg(feature = "spi443_nl00")]
223pub const SPI443_NL00: self::Spi443Nl00 = self::Spi443Nl00 {
224    ptr: 0x50001200u32 as _,
225};
226#[cfg(feature = "tmr580_nl01")]
227#[derive(Copy, Clone, Eq, PartialEq)]
228pub struct Tmr580Nl01 {
229    ptr: *mut u8,
230}
231#[cfg(feature = "tmr580_nl01")]
232pub const TMR580_NL01: self::Tmr580Nl01 = self::Tmr580Nl01 {
233    ptr: 0x50003400u32 as _,
234};
235#[cfg(feature = "uart1")]
236#[derive(Copy, Clone, Eq, PartialEq)]
237pub struct Uart1 {
238    ptr: *mut u8,
239}
240#[cfg(feature = "uart1")]
241pub const UART1: self::Uart1 = self::Uart1 {
242    ptr: 0x50001000u32 as _,
243};
244#[cfg(feature = "uart2")]
245#[derive(Copy, Clone, Eq, PartialEq)]
246pub struct Uart2 {
247    ptr: *mut u8,
248}
249#[cfg(feature = "uart2")]
250pub const UART2: self::Uart2 = self::Uart2 {
251    ptr: 0x50001100u32 as _,
252};
253#[cfg(feature = "wkup580_nl01")]
254#[derive(Copy, Clone, Eq, PartialEq)]
255pub struct Wkup580Nl01 {
256    ptr: *mut u8,
257}
258#[cfg(feature = "wkup580_nl01")]
259pub const WKUP580_NL01: self::Wkup580Nl01 = self::Wkup580Nl01 {
260    ptr: 0x50000100u32 as _,
261};
262
263pub use cortex_m::peripheral::Peripherals as CorePeripherals;
264pub use cortex_m::peripheral::{CBP, CPUID, DCB, DWT, FPB, FPU, ITM, MPU, NVIC, SCB, SYST, TPIU};
265#[doc = "Number available in the NVIC for configuring priority"]
266pub const NVIC_PRIO_BITS: u8 = 3;
267#[doc(hidden)]
268pub union Vector {
269    _handler: unsafe extern "C" fn(),
270    _reserved: u32,
271}
272#[cfg(feature = "rt")]
273pub use self::Interrupt as interrupt;
274#[cfg(feature = "rt")]
275pub use cortex_m_rt::interrupt;
276#[cfg(feature = "rt")]
277pub mod interrupt_handlers {
278    unsafe extern "C" {
279        pub fn BLE_WAKEUP_LP();
280        pub fn BLE_GEN();
281        pub fn UART();
282        pub fn UART2();
283        pub fn I2C();
284        pub fn SPI();
285        pub fn ADC();
286        pub fn KEYBRD();
287        pub fn BLE_RF_DIAG();
288        pub fn RF_CAL();
289        pub fn GPIO0();
290        pub fn GPIO1();
291        pub fn GPIO2();
292        pub fn GPIO3();
293        pub fn GPIO4();
294        pub fn SWTIM();
295        pub fn WKUP_QUADEC();
296        pub fn PCM();
297        pub fn SRC_IN();
298        pub fn SRC_OUT();
299        pub fn DMA();
300    }
301}
302#[cfg(feature = "rt")]
303#[doc(hidden)]
304#[unsafe(link_section = ".vector_table.interrupts")]
305#[unsafe(no_mangle)]
306pub static __INTERRUPTS: [Vector; 21] = [
307    Vector {
308        _handler: interrupt_handlers::BLE_WAKEUP_LP,
309    },
310    Vector {
311        _handler: interrupt_handlers::BLE_GEN,
312    },
313    Vector {
314        _handler: interrupt_handlers::UART,
315    },
316    Vector {
317        _handler: interrupt_handlers::UART2,
318    },
319    Vector {
320        _handler: interrupt_handlers::I2C,
321    },
322    Vector {
323        _handler: interrupt_handlers::SPI,
324    },
325    Vector {
326        _handler: interrupt_handlers::ADC,
327    },
328    Vector {
329        _handler: interrupt_handlers::KEYBRD,
330    },
331    Vector {
332        _handler: interrupt_handlers::BLE_RF_DIAG,
333    },
334    Vector {
335        _handler: interrupt_handlers::RF_CAL,
336    },
337    Vector {
338        _handler: interrupt_handlers::GPIO0,
339    },
340    Vector {
341        _handler: interrupt_handlers::GPIO1,
342    },
343    Vector {
344        _handler: interrupt_handlers::GPIO2,
345    },
346    Vector {
347        _handler: interrupt_handlers::GPIO3,
348    },
349    Vector {
350        _handler: interrupt_handlers::GPIO4,
351    },
352    Vector {
353        _handler: interrupt_handlers::SWTIM,
354    },
355    Vector {
356        _handler: interrupt_handlers::WKUP_QUADEC,
357    },
358    Vector {
359        _handler: interrupt_handlers::PCM,
360    },
361    Vector {
362        _handler: interrupt_handlers::SRC_IN,
363    },
364    Vector {
365        _handler: interrupt_handlers::SRC_OUT,
366    },
367    Vector {
368        _handler: interrupt_handlers::DMA,
369    },
370];
371#[doc = "Enumeration of all the interrupts."]
372#[derive(Copy, Clone, Debug, PartialEq, Eq)]
373#[repr(u16)]
374pub enum Interrupt {
375    #[doc = "Wake-up from Low Power (Extended Sleep) interrupt from BLE"]
376    BLE_WAKEUP_LP = 0,
377
378    #[doc = "BLE Interrupt from various BLE sources."]
379    BLE_GEN = 1,
380
381    #[doc = "UART interrupt"]
382    UART = 2,
383
384    #[doc = "UART2 interrupt"]
385    UART2 = 3,
386
387    #[doc = "I2C interrupt"]
388    I2C = 4,
389
390    #[doc = "SPI interrupt"]
391    SPI = 5,
392
393    #[doc = "Analog-Digital Converter interrupt."]
394    ADC = 6,
395
396    #[doc = "Keyboard interrupt."]
397    KEYBRD = 7,
398
399    #[doc = "Baseband or Radio Diagnostics Interrupt"]
400    BLE_RF_DIAG = 8,
401
402    #[doc = "RF Calibration Interrupt"]
403    RF_CAL = 9,
404
405    #[doc = "GPIO0 interrupt through debounce"]
406    GPIO0 = 10,
407
408    #[doc = "GPIO1 interrupt through debounce"]
409    GPIO1 = 11,
410
411    #[doc = "GPIO2 interrupt through debounce"]
412    GPIO2 = 12,
413
414    #[doc = "GPIO3 interrupt through debounce"]
415    GPIO3 = 13,
416
417    #[doc = "GPIO4 interrupt through debounce"]
418    GPIO4 = 14,
419
420    #[doc = "Software Timer interrupt"]
421    SWTIM = 15,
422
423    #[doc = "Combines the Wake up Capture Timer interrupt, the GPIO interrupt and the QuadDecoder interrupt"]
424    WKUP_QUADEC = 16,
425
426    #[doc = "PCM interrupt"]
427    PCM = 17,
428
429    #[doc = "Sample rate converter input interrupt"]
430    SRC_IN = 18,
431
432    #[doc = "Sample rate converter output interrupt"]
433    SRC_OUT = 19,
434
435    #[doc = "DMA interrupt"]
436    DMA = 20,
437}
438unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt {
439    #[inline(always)]
440    fn number(self) -> u16 {
441        self as u16
442    }
443}
444#[allow(non_snake_case)]
445/// Required for compatibility with RTIC and other frameworks
446pub struct Peripherals {
447    #[cfg(feature = "nvic")]
448    pub NVIC: self::Nvic,
449    #[cfg(feature = "scb")]
450    pub SCB: self::Scb,
451    #[cfg(feature = "systick")]
452    pub SYSTICK: self::SysTick,
453    #[cfg(feature = "adc580_bif_nl01")]
454    pub ADC580_BIF_NL01: self::Adc580BifNl01,
455    #[cfg(feature = "anamisc580_nl01")]
456    pub ANAMISC580_NL01: self::Anamisc580Nl01,
457    #[cfg(feature = "ble580_gr01")]
458    pub BLE580_GR01: self::Ble580Gr01,
459    #[cfg(feature = "chip_version")]
460    pub CHIP_VERSION: self::ChipVersion,
461    #[cfg(feature = "crg580_dcdc_nl01")]
462    pub CRG580_DCDC_NL01: self::Crg580DcdcNl01,
463    #[cfg(feature = "crg580_nl01")]
464    pub CRG580_NL01: self::Crg580Nl01,
465    #[cfg(feature = "gpio580_ports_nl01")]
466    pub GPIO580_PORTS_NL01: self::Gpio580PortsNl01,
467    #[cfg(feature = "i2c580_nl00")]
468    pub I2C580_NL00: self::I2C580Nl00,
469    #[cfg(feature = "kbrd580_nl01")]
470    pub KBRD580_NL01: self::Kbrd580Nl01,
471    #[cfg(feature = "otpc580_gr01")]
472    pub OTPC580_GR01: self::Otpc580Gr01,
473    #[cfg(feature = "quadec580_gr01")]
474    pub QUADEC580_GR01: self::Quadec580Gr01,
475    #[cfg(feature = "riscutil580_gpreg_nl01")]
476    pub RISCUTIL580_GPREG_NL01: self::Riscutil580GpregNl01,
477    #[cfg(feature = "riscutil580_wdog_nl00")]
478    pub RISCUTIL580_WDOG_NL00: self::Riscutil580WdogNl00,
479    #[cfg(feature = "spi443_nl00")]
480    pub SPI443_NL00: self::Spi443Nl00,
481    #[cfg(feature = "tmr580_nl01")]
482    pub TMR580_NL01: self::Tmr580Nl01,
483    #[cfg(feature = "uart1")]
484    pub UART1: self::Uart1,
485    #[cfg(feature = "uart2")]
486    pub UART2: self::Uart2,
487    #[cfg(feature = "wkup580_nl01")]
488    pub WKUP580_NL01: self::Wkup580Nl01,
489}
490
491impl Peripherals {
492    /// Returns Peripheral struct multiple times
493    /// Required for compatibility with RTIC and other frameworks
494    #[inline]
495    pub fn take() -> Option<Self> {
496        Some(Self::steal())
497    }
498
499    /// Returns Peripheral struct multiple times
500    /// Required for compatibility with RTIC and other frameworks
501    #[inline]
502    pub fn steal() -> Self {
503        Peripherals {
504            #[cfg(feature = "nvic")]
505            NVIC: crate::NVIC,
506            #[cfg(feature = "scb")]
507            SCB: crate::SCB,
508            #[cfg(feature = "systick")]
509            SYSTICK: crate::SYSTICK,
510            #[cfg(feature = "adc580_bif_nl01")]
511            ADC580_BIF_NL01: crate::ADC580_BIF_NL01,
512            #[cfg(feature = "anamisc580_nl01")]
513            ANAMISC580_NL01: crate::ANAMISC580_NL01,
514            #[cfg(feature = "ble580_gr01")]
515            BLE580_GR01: crate::BLE580_GR01,
516            #[cfg(feature = "chip_version")]
517            CHIP_VERSION: crate::CHIP_VERSION,
518            #[cfg(feature = "crg580_dcdc_nl01")]
519            CRG580_DCDC_NL01: crate::CRG580_DCDC_NL01,
520            #[cfg(feature = "crg580_nl01")]
521            CRG580_NL01: crate::CRG580_NL01,
522            #[cfg(feature = "gpio580_ports_nl01")]
523            GPIO580_PORTS_NL01: crate::GPIO580_PORTS_NL01,
524            #[cfg(feature = "i2c580_nl00")]
525            I2C580_NL00: crate::I2C580_NL00,
526            #[cfg(feature = "kbrd580_nl01")]
527            KBRD580_NL01: crate::KBRD580_NL01,
528            #[cfg(feature = "otpc580_gr01")]
529            OTPC580_GR01: crate::OTPC580_GR01,
530            #[cfg(feature = "quadec580_gr01")]
531            QUADEC580_GR01: crate::QUADEC580_GR01,
532            #[cfg(feature = "riscutil580_gpreg_nl01")]
533            RISCUTIL580_GPREG_NL01: crate::RISCUTIL580_GPREG_NL01,
534            #[cfg(feature = "riscutil580_wdog_nl00")]
535            RISCUTIL580_WDOG_NL00: crate::RISCUTIL580_WDOG_NL00,
536            #[cfg(feature = "spi443_nl00")]
537            SPI443_NL00: crate::SPI443_NL00,
538            #[cfg(feature = "tmr580_nl01")]
539            TMR580_NL01: crate::TMR580_NL01,
540            #[cfg(feature = "uart1")]
541            UART1: crate::UART1,
542            #[cfg(feature = "uart2")]
543            UART2: crate::UART2,
544            #[cfg(feature = "wkup580_nl01")]
545            WKUP580_NL01: crate::WKUP580_NL01,
546        }
547    }
548}
da14583_pac/lib.rs

da14583_pac/
lib.rs
