1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"GPIO registers"]
28unsafe impl ::core::marker::Send for super::Gpio {}
29unsafe impl ::core::marker::Sync for super::Gpio {}
30impl super::Gpio {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[inline(always)]
38 pub const fn bist_ctrl_reg(
39 &self,
40 ) -> &'static crate::common::Reg<self::BistCtrlReg_SPEC, crate::common::RW> {
41 unsafe {
42 crate::common::Reg::<self::BistCtrlReg_SPEC, crate::common::RW>::from_ptr(
43 self._svd2pac_as_ptr().add(60usize),
44 )
45 }
46 }
47
48 #[doc = "P00 Mode Register"]
49 #[inline(always)]
50 pub const fn p00_mode_reg(
51 &self,
52 ) -> &'static crate::common::Reg<self::P00ModeReg_SPEC, crate::common::RW> {
53 unsafe {
54 crate::common::Reg::<self::P00ModeReg_SPEC, crate::common::RW>::from_ptr(
55 self._svd2pac_as_ptr().add(6usize),
56 )
57 }
58 }
59
60 #[doc = "P010 Mode Register"]
61 #[inline(always)]
62 pub const fn p010_mode_reg(
63 &self,
64 ) -> &'static crate::common::Reg<self::P010ModeReg_SPEC, crate::common::RW> {
65 unsafe {
66 crate::common::Reg::<self::P010ModeReg_SPEC, crate::common::RW>::from_ptr(
67 self._svd2pac_as_ptr().add(26usize),
68 )
69 }
70 }
71
72 #[doc = "P011 Mode Register"]
73 #[inline(always)]
74 pub const fn p011_mode_reg(
75 &self,
76 ) -> &'static crate::common::Reg<self::P011ModeReg_SPEC, crate::common::RW> {
77 unsafe {
78 crate::common::Reg::<self::P011ModeReg_SPEC, crate::common::RW>::from_ptr(
79 self._svd2pac_as_ptr().add(28usize),
80 )
81 }
82 }
83
84 #[doc = "P01 Mode Register"]
85 #[inline(always)]
86 pub const fn p01_mode_reg(
87 &self,
88 ) -> &'static crate::common::Reg<self::P01ModeReg_SPEC, crate::common::RW> {
89 unsafe {
90 crate::common::Reg::<self::P01ModeReg_SPEC, crate::common::RW>::from_ptr(
91 self._svd2pac_as_ptr().add(8usize),
92 )
93 }
94 }
95
96 #[doc = "P02 Mode Register"]
97 #[inline(always)]
98 pub const fn p02_mode_reg(
99 &self,
100 ) -> &'static crate::common::Reg<self::P02ModeReg_SPEC, crate::common::RW> {
101 unsafe {
102 crate::common::Reg::<self::P02ModeReg_SPEC, crate::common::RW>::from_ptr(
103 self._svd2pac_as_ptr().add(10usize),
104 )
105 }
106 }
107
108 #[doc = "P03 Mode Register"]
109 #[inline(always)]
110 pub const fn p03_mode_reg(
111 &self,
112 ) -> &'static crate::common::Reg<self::P03ModeReg_SPEC, crate::common::RW> {
113 unsafe {
114 crate::common::Reg::<self::P03ModeReg_SPEC, crate::common::RW>::from_ptr(
115 self._svd2pac_as_ptr().add(12usize),
116 )
117 }
118 }
119
120 #[doc = "P04 Mode Register"]
121 #[inline(always)]
122 pub const fn p04_mode_reg(
123 &self,
124 ) -> &'static crate::common::Reg<self::P04ModeReg_SPEC, crate::common::RW> {
125 unsafe {
126 crate::common::Reg::<self::P04ModeReg_SPEC, crate::common::RW>::from_ptr(
127 self._svd2pac_as_ptr().add(14usize),
128 )
129 }
130 }
131
132 #[doc = "P05 Mode Register"]
133 #[inline(always)]
134 pub const fn p05_mode_reg(
135 &self,
136 ) -> &'static crate::common::Reg<self::P05ModeReg_SPEC, crate::common::RW> {
137 unsafe {
138 crate::common::Reg::<self::P05ModeReg_SPEC, crate::common::RW>::from_ptr(
139 self._svd2pac_as_ptr().add(16usize),
140 )
141 }
142 }
143
144 #[doc = "P06 Mode Register"]
145 #[inline(always)]
146 pub const fn p06_mode_reg(
147 &self,
148 ) -> &'static crate::common::Reg<self::P06ModeReg_SPEC, crate::common::RW> {
149 unsafe {
150 crate::common::Reg::<self::P06ModeReg_SPEC, crate::common::RW>::from_ptr(
151 self._svd2pac_as_ptr().add(18usize),
152 )
153 }
154 }
155
156 #[doc = "P07 Mode Register"]
157 #[inline(always)]
158 pub const fn p07_mode_reg(
159 &self,
160 ) -> &'static crate::common::Reg<self::P07ModeReg_SPEC, crate::common::RW> {
161 unsafe {
162 crate::common::Reg::<self::P07ModeReg_SPEC, crate::common::RW>::from_ptr(
163 self._svd2pac_as_ptr().add(20usize),
164 )
165 }
166 }
167
168 #[doc = "P08 Mode Register"]
169 #[inline(always)]
170 pub const fn p08_mode_reg(
171 &self,
172 ) -> &'static crate::common::Reg<self::P08ModeReg_SPEC, crate::common::RW> {
173 unsafe {
174 crate::common::Reg::<self::P08ModeReg_SPEC, crate::common::RW>::from_ptr(
175 self._svd2pac_as_ptr().add(22usize),
176 )
177 }
178 }
179
180 #[doc = "P09 Mode Register"]
181 #[inline(always)]
182 pub const fn p09_mode_reg(
183 &self,
184 ) -> &'static crate::common::Reg<self::P09ModeReg_SPEC, crate::common::RW> {
185 unsafe {
186 crate::common::Reg::<self::P09ModeReg_SPEC, crate::common::RW>::from_ptr(
187 self._svd2pac_as_ptr().add(24usize),
188 )
189 }
190 }
191
192 #[doc = "P0 Data input/output Register"]
193 #[inline(always)]
194 pub const fn p0_data_reg(
195 &self,
196 ) -> &'static crate::common::Reg<self::P0DataReg_SPEC, crate::common::RW> {
197 unsafe {
198 crate::common::Reg::<self::P0DataReg_SPEC, crate::common::RW>::from_ptr(
199 self._svd2pac_as_ptr().add(0usize),
200 )
201 }
202 }
203
204 #[doc = "P0 Reset port pins Register"]
205 #[inline(always)]
206 pub const fn p0_reset_data_reg(
207 &self,
208 ) -> &'static crate::common::Reg<self::P0ResetDataReg_SPEC, crate::common::RW> {
209 unsafe {
210 crate::common::Reg::<self::P0ResetDataReg_SPEC, crate::common::RW>::from_ptr(
211 self._svd2pac_as_ptr().add(4usize),
212 )
213 }
214 }
215
216 #[doc = "P0 Set port pins Register"]
217 #[inline(always)]
218 pub const fn p0_set_data_reg(
219 &self,
220 ) -> &'static crate::common::Reg<self::P0SetDataReg_SPEC, crate::common::RW> {
221 unsafe {
222 crate::common::Reg::<self::P0SetDataReg_SPEC, crate::common::RW>::from_ptr(
223 self._svd2pac_as_ptr().add(2usize),
224 )
225 }
226 }
227
228 #[doc = "Pad driving strength control Register"]
229 #[inline(always)]
230 pub const fn pad_weak_ctrl_reg(
231 &self,
232 ) -> &'static crate::common::Reg<self::PadWeakCtrlReg_SPEC, crate::common::RW> {
233 unsafe {
234 crate::common::Reg::<self::PadWeakCtrlReg_SPEC, crate::common::RW>::from_ptr(
235 self._svd2pac_as_ptr().add(30usize),
236 )
237 }
238 }
239
240 #[inline(always)]
241 pub const fn rombist_resulth_reg(
242 &self,
243 ) -> &'static crate::common::Reg<self::RombistResulthReg_SPEC, crate::common::RW> {
244 unsafe {
245 crate::common::Reg::<self::RombistResulthReg_SPEC, crate::common::RW>::from_ptr(
246 self._svd2pac_as_ptr().add(64usize),
247 )
248 }
249 }
250
251 #[inline(always)]
252 pub const fn rombist_resultl_reg(
253 &self,
254 ) -> &'static crate::common::Reg<self::RombistResultlReg_SPEC, crate::common::RW> {
255 unsafe {
256 crate::common::Reg::<self::RombistResultlReg_SPEC, crate::common::RW>::from_ptr(
257 self._svd2pac_as_ptr().add(62usize),
258 )
259 }
260 }
261
262 #[inline(always)]
263 pub const fn scan_observe_reg(
264 &self,
265 ) -> &'static crate::common::Reg<self::ScanObserveReg_SPEC, crate::common::RW> {
266 unsafe {
267 crate::common::Reg::<self::ScanObserveReg_SPEC, crate::common::RW>::from_ptr(
268 self._svd2pac_as_ptr().add(32usize),
269 )
270 }
271 }
272
273 #[inline(always)]
274 pub const fn test_ctrl2_reg(
275 &self,
276 ) -> &'static crate::common::Reg<self::TestCtrl2Reg_SPEC, crate::common::RW> {
277 unsafe {
278 crate::common::Reg::<self::TestCtrl2Reg_SPEC, crate::common::RW>::from_ptr(
279 self._svd2pac_as_ptr().add(50usize),
280 )
281 }
282 }
283
284 #[inline(always)]
285 pub const fn test_ctrl3_reg(
286 &self,
287 ) -> &'static crate::common::Reg<self::TestCtrl3Reg_SPEC, crate::common::RW> {
288 unsafe {
289 crate::common::Reg::<self::TestCtrl3Reg_SPEC, crate::common::RW>::from_ptr(
290 self._svd2pac_as_ptr().add(52usize),
291 )
292 }
293 }
294
295 #[inline(always)]
296 pub const fn test_ctrl4_reg(
297 &self,
298 ) -> &'static crate::common::Reg<self::TestCtrl4Reg_SPEC, crate::common::RW> {
299 unsafe {
300 crate::common::Reg::<self::TestCtrl4Reg_SPEC, crate::common::RW>::from_ptr(
301 self._svd2pac_as_ptr().add(54usize),
302 )
303 }
304 }
305
306 #[inline(always)]
307 pub const fn test_ctrl_reg(
308 &self,
309 ) -> &'static crate::common::Reg<self::TestCtrlReg_SPEC, crate::common::RW> {
310 unsafe {
311 crate::common::Reg::<self::TestCtrlReg_SPEC, crate::common::RW>::from_ptr(
312 self._svd2pac_as_ptr().add(48usize),
313 )
314 }
315 }
316
317 #[inline(always)]
318 pub const fn xtal32m_testctrl0_reg(
319 &self,
320 ) -> &'static crate::common::Reg<self::Xtal32MTestctrl0Reg_SPEC, crate::common::RW> {
321 unsafe {
322 crate::common::Reg::<self::Xtal32MTestctrl0Reg_SPEC, crate::common::RW>::from_ptr(
323 self._svd2pac_as_ptr().add(56usize),
324 )
325 }
326 }
327
328 #[inline(always)]
329 pub const fn xtal32m_testctrl1_reg(
330 &self,
331 ) -> &'static crate::common::Reg<self::Xtal32MTestctrl1Reg_SPEC, crate::common::RW> {
332 unsafe {
333 crate::common::Reg::<self::Xtal32MTestctrl1Reg_SPEC, crate::common::RW>::from_ptr(
334 self._svd2pac_as_ptr().add(58usize),
335 )
336 }
337 }
338}
339#[doc(hidden)]
340#[derive(Copy, Clone, Eq, PartialEq)]
341pub struct BistCtrlReg_SPEC;
342impl crate::sealed::RegSpec for BistCtrlReg_SPEC {
343 type DataType = u16;
344}
345
346pub type BistCtrlReg = crate::RegValueT<BistCtrlReg_SPEC>;
347
348impl BistCtrlReg {
349 #[inline(always)]
350 pub fn sysram3_bist_enable(
351 self,
352 ) -> crate::common::RegisterFieldBool<14, 1, 0, BistCtrlReg_SPEC, crate::common::RW> {
353 crate::common::RegisterFieldBool::<14,1,0,BistCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
354 }
355
356 #[inline(always)]
357 pub fn ram_bist_pattern(
358 self,
359 ) -> crate::common::RegisterField<12, 0x3, 1, 0, u8, u8, BistCtrlReg_SPEC, crate::common::RW>
360 {
361 crate::common::RegisterField::<12,0x3,1,0,u8,u8,BistCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
362 }
363
364 #[inline(always)]
365 pub fn sysram12_bist_busy(
366 self,
367 ) -> crate::common::RegisterFieldBool<11, 1, 0, BistCtrlReg_SPEC, crate::common::R> {
368 crate::common::RegisterFieldBool::<11,1,0,BistCtrlReg_SPEC,crate::common::R>::from_register(self,0)
369 }
370
371 #[inline(always)]
372 pub fn sysram12_bist_fail(
373 self,
374 ) -> crate::common::RegisterFieldBool<10, 1, 0, BistCtrlReg_SPEC, crate::common::R> {
375 crate::common::RegisterFieldBool::<10,1,0,BistCtrlReg_SPEC,crate::common::R>::from_register(self,0)
376 }
377
378 #[inline(always)]
379 pub fn sysram3_bist_busy(
380 self,
381 ) -> crate::common::RegisterFieldBool<8, 1, 0, BistCtrlReg_SPEC, crate::common::R> {
382 crate::common::RegisterFieldBool::<8,1,0,BistCtrlReg_SPEC,crate::common::R>::from_register(self,0)
383 }
384
385 #[inline(always)]
386 pub fn sysram3_bist_fail(
387 self,
388 ) -> crate::common::RegisterFieldBool<7, 1, 0, BistCtrlReg_SPEC, crate::common::R> {
389 crate::common::RegisterFieldBool::<7,1,0,BistCtrlReg_SPEC,crate::common::R>::from_register(self,0)
390 }
391
392 #[inline(always)]
393 pub fn rom_bist_busy(
394 self,
395 ) -> crate::common::RegisterFieldBool<5, 1, 0, BistCtrlReg_SPEC, crate::common::R> {
396 crate::common::RegisterFieldBool::<5,1,0,BistCtrlReg_SPEC,crate::common::R>::from_register(self,0)
397 }
398
399 #[inline(always)]
400 pub fn sysram12_bist_enable(
401 self,
402 ) -> crate::common::RegisterFieldBool<3, 1, 0, BistCtrlReg_SPEC, crate::common::RW> {
403 crate::common::RegisterFieldBool::<3,1,0,BistCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
404 }
405
406 #[inline(always)]
407 pub fn rombist_enable(
408 self,
409 ) -> crate::common::RegisterFieldBool<2, 1, 0, BistCtrlReg_SPEC, crate::common::RW> {
410 crate::common::RegisterFieldBool::<2,1,0,BistCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
411 }
412
413 #[inline(always)]
414 pub fn ram_bist_config(
415 self,
416 ) -> crate::common::RegisterField<0, 0x3, 1, 0, u8, u8, BistCtrlReg_SPEC, crate::common::RW>
417 {
418 crate::common::RegisterField::<0,0x3,1,0,u8,u8,BistCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
419 }
420}
421impl ::core::default::Default for BistCtrlReg {
422 #[inline(always)]
423 fn default() -> BistCtrlReg {
424 <crate::RegValueT<BistCtrlReg_SPEC> as RegisterValue<_>>::new(1152)
425 }
426}
427
428#[doc(hidden)]
429#[derive(Copy, Clone, Eq, PartialEq)]
430pub struct P00ModeReg_SPEC;
431impl crate::sealed::RegSpec for P00ModeReg_SPEC {
432 type DataType = u16;
433}
434
435#[doc = "P00 Mode Register"]
436pub type P00ModeReg = crate::RegValueT<P00ModeReg_SPEC>;
437
438impl P00ModeReg {
439 #[doc = "00 = Input, no resistors selected\n01 = Input, pull-up selected\n10 = Input, pull-down selected\n11 = Output, no resistors selected\nIn ADC mode, these bits are don\'t care"]
440 #[inline(always)]
441 pub fn pupd(
442 self,
443 ) -> crate::common::RegisterField<8, 0x3, 1, 0, u8, u8, P00ModeReg_SPEC, crate::common::RW>
444 {
445 crate::common::RegisterField::<8,0x3,1,0,u8,u8,P00ModeReg_SPEC,crate::common::RW>::from_register(self,0)
446 }
447
448 #[doc = "Function of port\n0 = GPIO (pin direction determined by \"PUPD\" field)\n1 = UART1_RX\n2 = UART1_TX\n3 = UART2_RX\n4 = UART2_TX\n5 = SYS_CLK\n6 = LP_CLK\n7 = Reserved\n8 = Reserved\n9 = I2C_SCL\n10 = I2C_SDA\n11 = PWM5\n12 = PWM6\n13 = PWM7\n14 = Reserved\n15 = ADC (only for P0_1, P0_2, P0_6 and P0_7)\n16 = PWM0\n17 = PWM1\n18 = BLE_DIAG (signals mapped to P0\\[3:0\\] are also mapped to P0\\[11:8\\])\n19 = UART1_CTSN\n20 = UART1_RTSN\n21 = Reserved\n22 = Reserved\n23 = PWM2\n24 = PWM3\n25 = PWM4\n26 = SPI_DI\n27 = SPI_DO\n28 = SPI_CLK\n29 = SPI_CSN0\n30 = SPI_CSN1\n31 = Reserved\nNote: When a certain input function (like SPI_DI) is selected on more than 1 pins, the pin of the lowest index has the highest priority."]
449 #[inline(always)]
450 pub fn pid(
451 self,
452 ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, P00ModeReg_SPEC, crate::common::RW>
453 {
454 crate::common::RegisterField::<0,0x1f,1,0,u8,u8,P00ModeReg_SPEC,crate::common::RW>::from_register(self,0)
455 }
456}
457impl ::core::default::Default for P00ModeReg {
458 #[inline(always)]
459 fn default() -> P00ModeReg {
460 <crate::RegValueT<P00ModeReg_SPEC> as RegisterValue<_>>::new(512)
461 }
462}
463
464#[doc(hidden)]
465#[derive(Copy, Clone, Eq, PartialEq)]
466pub struct P010ModeReg_SPEC;
467impl crate::sealed::RegSpec for P010ModeReg_SPEC {
468 type DataType = u16;
469}
470
471#[doc = "P010 Mode Register"]
472pub type P010ModeReg = crate::RegValueT<P010ModeReg_SPEC>;
473
474impl P010ModeReg {
475 #[doc = "00 = Input, no resistors selected\n01 = Input, pull-up selected\n10 = Input, pull-down selected\n11 = Output, no resistors selected"]
476 #[inline(always)]
477 pub fn pupd(
478 self,
479 ) -> crate::common::RegisterField<8, 0x3, 1, 0, u8, u8, P010ModeReg_SPEC, crate::common::RW>
480 {
481 crate::common::RegisterField::<8,0x3,1,0,u8,u8,P010ModeReg_SPEC,crate::common::RW>::from_register(self,0)
482 }
483
484 #[doc = "See P00_MODE_REG\\[PID\\]"]
485 #[inline(always)]
486 pub fn pid(
487 self,
488 ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, P010ModeReg_SPEC, crate::common::RW>
489 {
490 crate::common::RegisterField::<0,0x1f,1,0,u8,u8,P010ModeReg_SPEC,crate::common::RW>::from_register(self,0)
491 }
492}
493impl ::core::default::Default for P010ModeReg {
494 #[inline(always)]
495 fn default() -> P010ModeReg {
496 <crate::RegValueT<P010ModeReg_SPEC> as RegisterValue<_>>::new(512)
497 }
498}
499
500#[doc(hidden)]
501#[derive(Copy, Clone, Eq, PartialEq)]
502pub struct P011ModeReg_SPEC;
503impl crate::sealed::RegSpec for P011ModeReg_SPEC {
504 type DataType = u16;
505}
506
507#[doc = "P011 Mode Register"]
508pub type P011ModeReg = crate::RegValueT<P011ModeReg_SPEC>;
509
510impl P011ModeReg {
511 #[doc = "00 = Input, no resistors selected\n01 = Input, pull-up selected\n10 = Input, pull-down selected\n11 = Output, no resistors selected"]
512 #[inline(always)]
513 pub fn pupd(
514 self,
515 ) -> crate::common::RegisterField<8, 0x3, 1, 0, u8, u8, P011ModeReg_SPEC, crate::common::RW>
516 {
517 crate::common::RegisterField::<8,0x3,1,0,u8,u8,P011ModeReg_SPEC,crate::common::RW>::from_register(self,0)
518 }
519
520 #[doc = "See P00_MODE_REG\\[PID\\]"]
521 #[inline(always)]
522 pub fn pid(
523 self,
524 ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, P011ModeReg_SPEC, crate::common::RW>
525 {
526 crate::common::RegisterField::<0,0x1f,1,0,u8,u8,P011ModeReg_SPEC,crate::common::RW>::from_register(self,0)
527 }
528}
529impl ::core::default::Default for P011ModeReg {
530 #[inline(always)]
531 fn default() -> P011ModeReg {
532 <crate::RegValueT<P011ModeReg_SPEC> as RegisterValue<_>>::new(512)
533 }
534}
535
536#[doc(hidden)]
537#[derive(Copy, Clone, Eq, PartialEq)]
538pub struct P01ModeReg_SPEC;
539impl crate::sealed::RegSpec for P01ModeReg_SPEC {
540 type DataType = u16;
541}
542
543#[doc = "P01 Mode Register"]
544pub type P01ModeReg = crate::RegValueT<P01ModeReg_SPEC>;
545
546impl P01ModeReg {
547 #[doc = "00 = Input, no resistors selected\n01 = Input, pull-up selected\n10 = Input, pull-down selected\n11 = Output, no resistors selected\nIn ADC mode, these bits are don\'t care"]
548 #[inline(always)]
549 pub fn pupd(
550 self,
551 ) -> crate::common::RegisterField<8, 0x3, 1, 0, u8, u8, P01ModeReg_SPEC, crate::common::RW>
552 {
553 crate::common::RegisterField::<8,0x3,1,0,u8,u8,P01ModeReg_SPEC,crate::common::RW>::from_register(self,0)
554 }
555
556 #[doc = "See P00_MODE_REG\\[PID\\]"]
557 #[inline(always)]
558 pub fn pid(
559 self,
560 ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, P01ModeReg_SPEC, crate::common::RW>
561 {
562 crate::common::RegisterField::<0,0x1f,1,0,u8,u8,P01ModeReg_SPEC,crate::common::RW>::from_register(self,0)
563 }
564}
565impl ::core::default::Default for P01ModeReg {
566 #[inline(always)]
567 fn default() -> P01ModeReg {
568 <crate::RegValueT<P01ModeReg_SPEC> as RegisterValue<_>>::new(512)
569 }
570}
571
572#[doc(hidden)]
573#[derive(Copy, Clone, Eq, PartialEq)]
574pub struct P02ModeReg_SPEC;
575impl crate::sealed::RegSpec for P02ModeReg_SPEC {
576 type DataType = u16;
577}
578
579#[doc = "P02 Mode Register"]
580pub type P02ModeReg = crate::RegValueT<P02ModeReg_SPEC>;
581
582impl P02ModeReg {
583 #[doc = "00 = Input, no resistors selected\n01 = Input, pull-up selected\n10 = Input, pull-down selected\n11 = Output, no resistors selected\nIn ADC mode, these bits are don\'t care"]
584 #[inline(always)]
585 pub fn pupd(
586 self,
587 ) -> crate::common::RegisterField<8, 0x3, 1, 0, u8, u8, P02ModeReg_SPEC, crate::common::RW>
588 {
589 crate::common::RegisterField::<8,0x3,1,0,u8,u8,P02ModeReg_SPEC,crate::common::RW>::from_register(self,0)
590 }
591
592 #[doc = "See P00_MODE_REG\\[PID\\]"]
593 #[inline(always)]
594 pub fn pid(
595 self,
596 ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, P02ModeReg_SPEC, crate::common::RW>
597 {
598 crate::common::RegisterField::<0,0x1f,1,0,u8,u8,P02ModeReg_SPEC,crate::common::RW>::from_register(self,0)
599 }
600}
601impl ::core::default::Default for P02ModeReg {
602 #[inline(always)]
603 fn default() -> P02ModeReg {
604 <crate::RegValueT<P02ModeReg_SPEC> as RegisterValue<_>>::new(512)
605 }
606}
607
608#[doc(hidden)]
609#[derive(Copy, Clone, Eq, PartialEq)]
610pub struct P03ModeReg_SPEC;
611impl crate::sealed::RegSpec for P03ModeReg_SPEC {
612 type DataType = u16;
613}
614
615#[doc = "P03 Mode Register"]
616pub type P03ModeReg = crate::RegValueT<P03ModeReg_SPEC>;
617
618impl P03ModeReg {
619 #[doc = "00 = Input, no resistors selected\n01 = Input, pull-up selected\n10 = Input, pull-down selected\n11 = Output, no resistors selected\nIn ADC mode, these bits are don\'t care"]
620 #[inline(always)]
621 pub fn pupd(
622 self,
623 ) -> crate::common::RegisterField<8, 0x3, 1, 0, u8, u8, P03ModeReg_SPEC, crate::common::RW>
624 {
625 crate::common::RegisterField::<8,0x3,1,0,u8,u8,P03ModeReg_SPEC,crate::common::RW>::from_register(self,0)
626 }
627
628 #[doc = "See P00_MODE_REG\\[PID\\]"]
629 #[inline(always)]
630 pub fn pid(
631 self,
632 ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, P03ModeReg_SPEC, crate::common::RW>
633 {
634 crate::common::RegisterField::<0,0x1f,1,0,u8,u8,P03ModeReg_SPEC,crate::common::RW>::from_register(self,0)
635 }
636}
637impl ::core::default::Default for P03ModeReg {
638 #[inline(always)]
639 fn default() -> P03ModeReg {
640 <crate::RegValueT<P03ModeReg_SPEC> as RegisterValue<_>>::new(512)
641 }
642}
643
644#[doc(hidden)]
645#[derive(Copy, Clone, Eq, PartialEq)]
646pub struct P04ModeReg_SPEC;
647impl crate::sealed::RegSpec for P04ModeReg_SPEC {
648 type DataType = u16;
649}
650
651#[doc = "P04 Mode Register"]
652pub type P04ModeReg = crate::RegValueT<P04ModeReg_SPEC>;
653
654impl P04ModeReg {
655 #[doc = "00 = Input, no resistors selected\n01 = Input, pull-up selected\n10 = Input, pull-down selected\n11 = Output, no resistors selected"]
656 #[inline(always)]
657 pub fn pupd(
658 self,
659 ) -> crate::common::RegisterField<8, 0x3, 1, 0, u8, u8, P04ModeReg_SPEC, crate::common::RW>
660 {
661 crate::common::RegisterField::<8,0x3,1,0,u8,u8,P04ModeReg_SPEC,crate::common::RW>::from_register(self,0)
662 }
663
664 #[doc = "See P00_MODE_REG\\[PID\\]"]
665 #[inline(always)]
666 pub fn pid(
667 self,
668 ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, P04ModeReg_SPEC, crate::common::RW>
669 {
670 crate::common::RegisterField::<0,0x1f,1,0,u8,u8,P04ModeReg_SPEC,crate::common::RW>::from_register(self,0)
671 }
672}
673impl ::core::default::Default for P04ModeReg {
674 #[inline(always)]
675 fn default() -> P04ModeReg {
676 <crate::RegValueT<P04ModeReg_SPEC> as RegisterValue<_>>::new(512)
677 }
678}
679
680#[doc(hidden)]
681#[derive(Copy, Clone, Eq, PartialEq)]
682pub struct P05ModeReg_SPEC;
683impl crate::sealed::RegSpec for P05ModeReg_SPEC {
684 type DataType = u16;
685}
686
687#[doc = "P05 Mode Register"]
688pub type P05ModeReg = crate::RegValueT<P05ModeReg_SPEC>;
689
690impl P05ModeReg {
691 #[doc = "00 = Input, no resistors selected\n01 = Input, pull-up selected\n10 = Input, pull-down selected\n11 = Output, no resistors selected"]
692 #[inline(always)]
693 pub fn pupd(
694 self,
695 ) -> crate::common::RegisterField<8, 0x3, 1, 0, u8, u8, P05ModeReg_SPEC, crate::common::RW>
696 {
697 crate::common::RegisterField::<8,0x3,1,0,u8,u8,P05ModeReg_SPEC,crate::common::RW>::from_register(self,0)
698 }
699
700 #[doc = "See P00_MODE_REG\\[PID\\]"]
701 #[inline(always)]
702 pub fn pid(
703 self,
704 ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, P05ModeReg_SPEC, crate::common::RW>
705 {
706 crate::common::RegisterField::<0,0x1f,1,0,u8,u8,P05ModeReg_SPEC,crate::common::RW>::from_register(self,0)
707 }
708}
709impl ::core::default::Default for P05ModeReg {
710 #[inline(always)]
711 fn default() -> P05ModeReg {
712 <crate::RegValueT<P05ModeReg_SPEC> as RegisterValue<_>>::new(512)
713 }
714}
715
716#[doc(hidden)]
717#[derive(Copy, Clone, Eq, PartialEq)]
718pub struct P06ModeReg_SPEC;
719impl crate::sealed::RegSpec for P06ModeReg_SPEC {
720 type DataType = u16;
721}
722
723#[doc = "P06 Mode Register"]
724pub type P06ModeReg = crate::RegValueT<P06ModeReg_SPEC>;
725
726impl P06ModeReg {
727 #[doc = "00 = Input, no resistors selected\n01 = Input, pull-up selected\n10 = Input, pull-down selected\n11 = Output, no resistors selected"]
728 #[inline(always)]
729 pub fn pupd(
730 self,
731 ) -> crate::common::RegisterField<8, 0x3, 1, 0, u8, u8, P06ModeReg_SPEC, crate::common::RW>
732 {
733 crate::common::RegisterField::<8,0x3,1,0,u8,u8,P06ModeReg_SPEC,crate::common::RW>::from_register(self,0)
734 }
735
736 #[doc = "See P00_MODE_REG\\[PID\\]"]
737 #[inline(always)]
738 pub fn pid(
739 self,
740 ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, P06ModeReg_SPEC, crate::common::RW>
741 {
742 crate::common::RegisterField::<0,0x1f,1,0,u8,u8,P06ModeReg_SPEC,crate::common::RW>::from_register(self,0)
743 }
744}
745impl ::core::default::Default for P06ModeReg {
746 #[inline(always)]
747 fn default() -> P06ModeReg {
748 <crate::RegValueT<P06ModeReg_SPEC> as RegisterValue<_>>::new(512)
749 }
750}
751
752#[doc(hidden)]
753#[derive(Copy, Clone, Eq, PartialEq)]
754pub struct P07ModeReg_SPEC;
755impl crate::sealed::RegSpec for P07ModeReg_SPEC {
756 type DataType = u16;
757}
758
759#[doc = "P07 Mode Register"]
760pub type P07ModeReg = crate::RegValueT<P07ModeReg_SPEC>;
761
762impl P07ModeReg {
763 #[doc = "00 = Input, no resistors selected\n01 = Input, pull-up selected\n10 = Input, pull-down selected\n11 = Output, no resistors selected"]
764 #[inline(always)]
765 pub fn pupd(
766 self,
767 ) -> crate::common::RegisterField<8, 0x3, 1, 0, u8, u8, P07ModeReg_SPEC, crate::common::RW>
768 {
769 crate::common::RegisterField::<8,0x3,1,0,u8,u8,P07ModeReg_SPEC,crate::common::RW>::from_register(self,0)
770 }
771
772 #[doc = "See P00_MODE_REG\\[PID\\]"]
773 #[inline(always)]
774 pub fn pid(
775 self,
776 ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, P07ModeReg_SPEC, crate::common::RW>
777 {
778 crate::common::RegisterField::<0,0x1f,1,0,u8,u8,P07ModeReg_SPEC,crate::common::RW>::from_register(self,0)
779 }
780}
781impl ::core::default::Default for P07ModeReg {
782 #[inline(always)]
783 fn default() -> P07ModeReg {
784 <crate::RegValueT<P07ModeReg_SPEC> as RegisterValue<_>>::new(512)
785 }
786}
787
788#[doc(hidden)]
789#[derive(Copy, Clone, Eq, PartialEq)]
790pub struct P08ModeReg_SPEC;
791impl crate::sealed::RegSpec for P08ModeReg_SPEC {
792 type DataType = u16;
793}
794
795#[doc = "P08 Mode Register"]
796pub type P08ModeReg = crate::RegValueT<P08ModeReg_SPEC>;
797
798impl P08ModeReg {
799 #[doc = "00 = Input, no resistors selected\n01 = Input, pull-up selected\n10 = Input, pull-down selected\n11 = Output, no resistors selected"]
800 #[inline(always)]
801 pub fn pupd(
802 self,
803 ) -> crate::common::RegisterField<8, 0x3, 1, 0, u8, u8, P08ModeReg_SPEC, crate::common::RW>
804 {
805 crate::common::RegisterField::<8,0x3,1,0,u8,u8,P08ModeReg_SPEC,crate::common::RW>::from_register(self,0)
806 }
807
808 #[doc = "See P00_MODE_REG\\[PID\\]"]
809 #[inline(always)]
810 pub fn pid(
811 self,
812 ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, P08ModeReg_SPEC, crate::common::RW>
813 {
814 crate::common::RegisterField::<0,0x1f,1,0,u8,u8,P08ModeReg_SPEC,crate::common::RW>::from_register(self,0)
815 }
816}
817impl ::core::default::Default for P08ModeReg {
818 #[inline(always)]
819 fn default() -> P08ModeReg {
820 <crate::RegValueT<P08ModeReg_SPEC> as RegisterValue<_>>::new(512)
821 }
822}
823
824#[doc(hidden)]
825#[derive(Copy, Clone, Eq, PartialEq)]
826pub struct P09ModeReg_SPEC;
827impl crate::sealed::RegSpec for P09ModeReg_SPEC {
828 type DataType = u16;
829}
830
831#[doc = "P09 Mode Register"]
832pub type P09ModeReg = crate::RegValueT<P09ModeReg_SPEC>;
833
834impl P09ModeReg {
835 #[doc = "00 = Input, no resistors selected\n01 = Input, pull-up selected\n10 = Input, pull-down selected\n11 = Output, no resistors selected"]
836 #[inline(always)]
837 pub fn pupd(
838 self,
839 ) -> crate::common::RegisterField<8, 0x3, 1, 0, u8, u8, P09ModeReg_SPEC, crate::common::RW>
840 {
841 crate::common::RegisterField::<8,0x3,1,0,u8,u8,P09ModeReg_SPEC,crate::common::RW>::from_register(self,0)
842 }
843
844 #[doc = "See P00_MODE_REG\\[PID\\]"]
845 #[inline(always)]
846 pub fn pid(
847 self,
848 ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, P09ModeReg_SPEC, crate::common::RW>
849 {
850 crate::common::RegisterField::<0,0x1f,1,0,u8,u8,P09ModeReg_SPEC,crate::common::RW>::from_register(self,0)
851 }
852}
853impl ::core::default::Default for P09ModeReg {
854 #[inline(always)]
855 fn default() -> P09ModeReg {
856 <crate::RegValueT<P09ModeReg_SPEC> as RegisterValue<_>>::new(512)
857 }
858}
859
860#[doc(hidden)]
861#[derive(Copy, Clone, Eq, PartialEq)]
862pub struct P0DataReg_SPEC;
863impl crate::sealed::RegSpec for P0DataReg_SPEC {
864 type DataType = u16;
865}
866
867#[doc = "P0 Data input/output Register"]
868pub type P0DataReg = crate::RegValueT<P0DataReg_SPEC>;
869
870impl P0DataReg {
871 #[doc = "Sets P0 output register when written ; Returns the value of P0 port when read"]
872 #[inline(always)]
873 pub fn p0_data(
874 self,
875 ) -> crate::common::RegisterField<0, 0xfff, 1, 0, u16, u16, P0DataReg_SPEC, crate::common::RW>
876 {
877 crate::common::RegisterField::<0,0xfff,1,0,u16,u16,P0DataReg_SPEC,crate::common::RW>::from_register(self,0)
878 }
879}
880impl ::core::default::Default for P0DataReg {
881 #[inline(always)]
882 fn default() -> P0DataReg {
883 <crate::RegValueT<P0DataReg_SPEC> as RegisterValue<_>>::new(0)
884 }
885}
886
887#[doc(hidden)]
888#[derive(Copy, Clone, Eq, PartialEq)]
889pub struct P0ResetDataReg_SPEC;
890impl crate::sealed::RegSpec for P0ResetDataReg_SPEC {
891 type DataType = u16;
892}
893
894#[doc = "P0 Reset port pins Register"]
895pub type P0ResetDataReg = crate::RegValueT<P0ResetDataReg_SPEC>;
896
897impl P0ResetDataReg {
898 #[doc = "Writing a 1 to P0\\[x\\] sets P0\\[x\\] to 0.\nWriting 0 is discarded, reading returns 0."]
899 #[inline(always)]
900 pub fn p0_reset(
901 self,
902 ) -> crate::common::RegisterField<0, 0xfff, 1, 0, u16, u16, P0ResetDataReg_SPEC, crate::common::W>
903 {
904 crate::common::RegisterField::<
905 0,
906 0xfff,
907 1,
908 0,
909 u16,
910 u16,
911 P0ResetDataReg_SPEC,
912 crate::common::W,
913 >::from_register(self, 0)
914 }
915}
916impl ::core::default::Default for P0ResetDataReg {
917 #[inline(always)]
918 fn default() -> P0ResetDataReg {
919 <crate::RegValueT<P0ResetDataReg_SPEC> as RegisterValue<_>>::new(0)
920 }
921}
922
923#[doc(hidden)]
924#[derive(Copy, Clone, Eq, PartialEq)]
925pub struct P0SetDataReg_SPEC;
926impl crate::sealed::RegSpec for P0SetDataReg_SPEC {
927 type DataType = u16;
928}
929
930#[doc = "P0 Set port pins Register"]
931pub type P0SetDataReg = crate::RegValueT<P0SetDataReg_SPEC>;
932
933impl P0SetDataReg {
934 #[doc = "Writing a 1 to P0\\[x\\] sets P0\\[x\\] to 1.\nWriting 0 is discarded, reading returns 0"]
935 #[inline(always)]
936 pub fn p0_set(
937 self,
938 ) -> crate::common::RegisterField<0, 0xfff, 1, 0, u16, u16, P0SetDataReg_SPEC, crate::common::W>
939 {
940 crate::common::RegisterField::<0,0xfff,1,0,u16,u16,P0SetDataReg_SPEC,crate::common::W>::from_register(self,0)
941 }
942}
943impl ::core::default::Default for P0SetDataReg {
944 #[inline(always)]
945 fn default() -> P0SetDataReg {
946 <crate::RegValueT<P0SetDataReg_SPEC> as RegisterValue<_>>::new(0)
947 }
948}
949
950#[doc(hidden)]
951#[derive(Copy, Clone, Eq, PartialEq)]
952pub struct PadWeakCtrlReg_SPEC;
953impl crate::sealed::RegSpec for PadWeakCtrlReg_SPEC {
954 type DataType = u16;
955}
956
957#[doc = "Pad driving strength control Register"]
958pub type PadWeakCtrlReg = crate::RegValueT<PadWeakCtrlReg_SPEC>;
959
960impl PadWeakCtrlReg {
961 #[doc = "0 = Normal operation\n1 = Reduces the driving strength of P0_x pad.\nBit x controls the driving strength of P0_x, x=0, 1,..., 11."]
962 #[inline(always)]
963 pub fn pad_low_drv(
964 self,
965 ) -> crate::common::RegisterField<
966 0,
967 0xfff,
968 1,
969 0,
970 u16,
971 u16,
972 PadWeakCtrlReg_SPEC,
973 crate::common::RW,
974 > {
975 crate::common::RegisterField::<
976 0,
977 0xfff,
978 1,
979 0,
980 u16,
981 u16,
982 PadWeakCtrlReg_SPEC,
983 crate::common::RW,
984 >::from_register(self, 0)
985 }
986}
987impl ::core::default::Default for PadWeakCtrlReg {
988 #[inline(always)]
989 fn default() -> PadWeakCtrlReg {
990 <crate::RegValueT<PadWeakCtrlReg_SPEC> as RegisterValue<_>>::new(0)
991 }
992}
993
994#[doc(hidden)]
995#[derive(Copy, Clone, Eq, PartialEq)]
996pub struct RombistResulthReg_SPEC;
997impl crate::sealed::RegSpec for RombistResulthReg_SPEC {
998 type DataType = u16;
999}
1000
1001pub type RombistResulthReg = crate::RegValueT<RombistResulthReg_SPEC>;
1002
1003impl RombistResulthReg {
1004 #[inline(always)]
1005 pub fn rombist_resulth(
1006 self,
1007 ) -> crate::common::RegisterField<
1008 0,
1009 0xffff,
1010 1,
1011 0,
1012 u16,
1013 u16,
1014 RombistResulthReg_SPEC,
1015 crate::common::R,
1016 > {
1017 crate::common::RegisterField::<
1018 0,
1019 0xffff,
1020 1,
1021 0,
1022 u16,
1023 u16,
1024 RombistResulthReg_SPEC,
1025 crate::common::R,
1026 >::from_register(self, 0)
1027 }
1028}
1029impl ::core::default::Default for RombistResulthReg {
1030 #[inline(always)]
1031 fn default() -> RombistResulthReg {
1032 <crate::RegValueT<RombistResulthReg_SPEC> as RegisterValue<_>>::new(0)
1033 }
1034}
1035
1036#[doc(hidden)]
1037#[derive(Copy, Clone, Eq, PartialEq)]
1038pub struct RombistResultlReg_SPEC;
1039impl crate::sealed::RegSpec for RombistResultlReg_SPEC {
1040 type DataType = u16;
1041}
1042
1043pub type RombistResultlReg = crate::RegValueT<RombistResultlReg_SPEC>;
1044
1045impl RombistResultlReg {
1046 #[inline(always)]
1047 pub fn rombist_resultl(
1048 self,
1049 ) -> crate::common::RegisterField<
1050 0,
1051 0xffff,
1052 1,
1053 0,
1054 u16,
1055 u16,
1056 RombistResultlReg_SPEC,
1057 crate::common::R,
1058 > {
1059 crate::common::RegisterField::<
1060 0,
1061 0xffff,
1062 1,
1063 0,
1064 u16,
1065 u16,
1066 RombistResultlReg_SPEC,
1067 crate::common::R,
1068 >::from_register(self, 0)
1069 }
1070}
1071impl ::core::default::Default for RombistResultlReg {
1072 #[inline(always)]
1073 fn default() -> RombistResultlReg {
1074 <crate::RegValueT<RombistResultlReg_SPEC> as RegisterValue<_>>::new(0)
1075 }
1076}
1077
1078#[doc(hidden)]
1079#[derive(Copy, Clone, Eq, PartialEq)]
1080pub struct ScanObserveReg_SPEC;
1081impl crate::sealed::RegSpec for ScanObserveReg_SPEC {
1082 type DataType = u16;
1083}
1084
1085pub type ScanObserveReg = crate::RegValueT<ScanObserveReg_SPEC>;
1086
1087impl ScanObserveReg {
1088 #[inline(always)]
1089 pub fn scan_feedback_mux(
1090 self,
1091 ) -> crate::common::RegisterField<
1092 0,
1093 0xffff,
1094 1,
1095 0,
1096 u16,
1097 u16,
1098 ScanObserveReg_SPEC,
1099 crate::common::R,
1100 > {
1101 crate::common::RegisterField::<
1102 0,
1103 0xffff,
1104 1,
1105 0,
1106 u16,
1107 u16,
1108 ScanObserveReg_SPEC,
1109 crate::common::R,
1110 >::from_register(self, 0)
1111 }
1112}
1113impl ::core::default::Default for ScanObserveReg {
1114 #[inline(always)]
1115 fn default() -> ScanObserveReg {
1116 <crate::RegValueT<ScanObserveReg_SPEC> as RegisterValue<_>>::new(0)
1117 }
1118}
1119
1120#[doc(hidden)]
1121#[derive(Copy, Clone, Eq, PartialEq)]
1122pub struct TestCtrl2Reg_SPEC;
1123impl crate::sealed::RegSpec for TestCtrl2Reg_SPEC {
1124 type DataType = u16;
1125}
1126
1127pub type TestCtrl2Reg = crate::RegValueT<TestCtrl2Reg_SPEC>;
1128
1129impl TestCtrl2Reg {
1130 #[inline(always)]
1131 pub fn ana_test_out_param(
1132 self,
1133 ) -> crate::common::RegisterField<12, 0xf, 1, 0, u8, u8, TestCtrl2Reg_SPEC, crate::common::RW>
1134 {
1135 crate::common::RegisterField::<12,0xf,1,0,u8,u8,TestCtrl2Reg_SPEC,crate::common::RW>::from_register(self,0)
1136 }
1137
1138 #[inline(always)]
1139 pub fn ana_test_out_to_pin(
1140 self,
1141 ) -> crate::common::RegisterFieldBool<11, 1, 0, TestCtrl2Reg_SPEC, crate::common::RW> {
1142 crate::common::RegisterFieldBool::<11,1,0,TestCtrl2Reg_SPEC,crate::common::RW>::from_register(self,0)
1143 }
1144
1145 #[inline(always)]
1146 pub fn ana_test_out_sel(
1147 self,
1148 ) -> crate::common::RegisterField<0, 0x3ff, 1, 0, u16, u16, TestCtrl2Reg_SPEC, crate::common::RW>
1149 {
1150 crate::common::RegisterField::<0,0x3ff,1,0,u16,u16,TestCtrl2Reg_SPEC,crate::common::RW>::from_register(self,0)
1151 }
1152}
1153impl ::core::default::Default for TestCtrl2Reg {
1154 #[inline(always)]
1155 fn default() -> TestCtrl2Reg {
1156 <crate::RegValueT<TestCtrl2Reg_SPEC> as RegisterValue<_>>::new(0)
1157 }
1158}
1159
1160#[doc(hidden)]
1161#[derive(Copy, Clone, Eq, PartialEq)]
1162pub struct TestCtrl3Reg_SPEC;
1163impl crate::sealed::RegSpec for TestCtrl3Reg_SPEC {
1164 type DataType = u16;
1165}
1166
1167pub type TestCtrl3Reg = crate::RegValueT<TestCtrl3Reg_SPEC>;
1168
1169impl TestCtrl3Reg {
1170 #[inline(always)]
1171 pub fn rf_test_out_to_pin(
1172 self,
1173 ) -> crate::common::RegisterFieldBool<13, 1, 0, TestCtrl3Reg_SPEC, crate::common::RW> {
1174 crate::common::RegisterFieldBool::<13,1,0,TestCtrl3Reg_SPEC,crate::common::RW>::from_register(self,0)
1175 }
1176
1177 #[inline(always)]
1178 pub fn rf_test_out_param(
1179 self,
1180 ) -> crate::common::RegisterField<7, 0x3f, 1, 0, u8, u8, TestCtrl3Reg_SPEC, crate::common::RW>
1181 {
1182 crate::common::RegisterField::<7,0x3f,1,0,u8,u8,TestCtrl3Reg_SPEC,crate::common::RW>::from_register(self,0)
1183 }
1184
1185 #[inline(always)]
1186 pub fn enable_rfpt(
1187 self,
1188 ) -> crate::common::RegisterFieldBool<6, 1, 0, TestCtrl3Reg_SPEC, crate::common::RW> {
1189 crate::common::RegisterFieldBool::<6,1,0,TestCtrl3Reg_SPEC,crate::common::RW>::from_register(self,0)
1190 }
1191
1192 #[inline(always)]
1193 pub fn rf_test_out_sel(
1194 self,
1195 ) -> crate::common::RegisterField<0, 0x3f, 1, 0, u8, u8, TestCtrl3Reg_SPEC, crate::common::RW>
1196 {
1197 crate::common::RegisterField::<0,0x3f,1,0,u8,u8,TestCtrl3Reg_SPEC,crate::common::RW>::from_register(self,0)
1198 }
1199}
1200impl ::core::default::Default for TestCtrl3Reg {
1201 #[inline(always)]
1202 fn default() -> TestCtrl3Reg {
1203 <crate::RegValueT<TestCtrl3Reg_SPEC> as RegisterValue<_>>::new(0)
1204 }
1205}
1206
1207#[doc(hidden)]
1208#[derive(Copy, Clone, Eq, PartialEq)]
1209pub struct TestCtrl4Reg_SPEC;
1210impl crate::sealed::RegSpec for TestCtrl4Reg_SPEC {
1211 type DataType = u16;
1212}
1213
1214pub type TestCtrl4Reg = crate::RegValueT<TestCtrl4Reg_SPEC>;
1215
1216impl TestCtrl4Reg {
1217 #[inline(always)]
1218 pub fn rf_test_in_to_pin(
1219 self,
1220 ) -> crate::common::RegisterFieldBool<13, 1, 0, TestCtrl4Reg_SPEC, crate::common::RW> {
1221 crate::common::RegisterFieldBool::<13,1,0,TestCtrl4Reg_SPEC,crate::common::RW>::from_register(self,0)
1222 }
1223
1224 #[inline(always)]
1225 pub fn rf_test_in_param(
1226 self,
1227 ) -> crate::common::RegisterField<8, 0x1f, 1, 0, u8, u8, TestCtrl4Reg_SPEC, crate::common::RW>
1228 {
1229 crate::common::RegisterField::<8,0x1f,1,0,u8,u8,TestCtrl4Reg_SPEC,crate::common::RW>::from_register(self,0)
1230 }
1231
1232 #[inline(always)]
1233 pub fn rf_test_in_sel(
1234 self,
1235 ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, TestCtrl4Reg_SPEC, crate::common::RW>
1236 {
1237 crate::common::RegisterField::<0,0xf,1,0,u8,u8,TestCtrl4Reg_SPEC,crate::common::RW>::from_register(self,0)
1238 }
1239}
1240impl ::core::default::Default for TestCtrl4Reg {
1241 #[inline(always)]
1242 fn default() -> TestCtrl4Reg {
1243 <crate::RegValueT<TestCtrl4Reg_SPEC> as RegisterValue<_>>::new(0)
1244 }
1245}
1246
1247#[doc(hidden)]
1248#[derive(Copy, Clone, Eq, PartialEq)]
1249pub struct TestCtrlReg_SPEC;
1250impl crate::sealed::RegSpec for TestCtrlReg_SPEC {
1251 type DataType = u16;
1252}
1253
1254pub type TestCtrlReg = crate::RegValueT<TestCtrlReg_SPEC>;
1255
1256impl TestCtrlReg {
1257 #[inline(always)]
1258 pub fn adpll_scan_comp_en(
1259 self,
1260 ) -> crate::common::RegisterFieldBool<12, 1, 0, TestCtrlReg_SPEC, crate::common::RW> {
1261 crate::common::RegisterFieldBool::<12,1,0,TestCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
1262 }
1263
1264 #[inline(always)]
1265 pub fn adpll_scan_test_en(
1266 self,
1267 ) -> crate::common::RegisterFieldBool<11, 1, 0, TestCtrlReg_SPEC, crate::common::RW> {
1268 crate::common::RegisterFieldBool::<11,1,0,TestCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
1269 }
1270
1271 #[inline(always)]
1272 pub fn cp_cap_bias_trim(
1273 self,
1274 ) -> crate::common::RegisterField<9, 0x3, 1, 0, u8, u8, TestCtrlReg_SPEC, crate::common::RW>
1275 {
1276 crate::common::RegisterField::<9,0x3,1,0,u8,u8,TestCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
1277 }
1278
1279 #[inline(always)]
1280 pub fn ldo_core_dummy_load_enable(
1281 self,
1282 ) -> crate::common::RegisterFieldBool<6, 1, 0, TestCtrlReg_SPEC, crate::common::RW> {
1283 crate::common::RegisterFieldBool::<6,1,0,TestCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
1284 }
1285
1286 #[inline(always)]
1287 pub fn ldo_core_cap_bypass(
1288 self,
1289 ) -> crate::common::RegisterFieldBool<5, 1, 0, TestCtrlReg_SPEC, crate::common::RW> {
1290 crate::common::RegisterFieldBool::<5,1,0,TestCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
1291 }
1292
1293 #[inline(always)]
1294 pub fn xtal32m_cap_test_en(
1295 self,
1296 ) -> crate::common::RegisterFieldBool<4, 1, 0, TestCtrlReg_SPEC, crate::common::RW> {
1297 crate::common::RegisterFieldBool::<4,1,0,TestCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
1298 }
1299
1300 #[inline(always)]
1301 pub fn show_dcdc(
1302 self,
1303 ) -> crate::common::RegisterFieldBool<2, 1, 0, TestCtrlReg_SPEC, crate::common::RW> {
1304 crate::common::RegisterFieldBool::<2,1,0,TestCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
1305 }
1306
1307 #[inline(always)]
1308 pub fn show_power(
1309 self,
1310 ) -> crate::common::RegisterFieldBool<1, 1, 0, TestCtrlReg_SPEC, crate::common::RW> {
1311 crate::common::RegisterFieldBool::<1,1,0,TestCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
1312 }
1313
1314 #[inline(always)]
1315 pub fn show_clocks(
1316 self,
1317 ) -> crate::common::RegisterFieldBool<0, 1, 0, TestCtrlReg_SPEC, crate::common::RW> {
1318 crate::common::RegisterFieldBool::<0,1,0,TestCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
1319 }
1320}
1321impl ::core::default::Default for TestCtrlReg {
1322 #[inline(always)]
1323 fn default() -> TestCtrlReg {
1324 <crate::RegValueT<TestCtrlReg_SPEC> as RegisterValue<_>>::new(0)
1325 }
1326}
1327
1328#[doc(hidden)]
1329#[derive(Copy, Clone, Eq, PartialEq)]
1330pub struct Xtal32MTestctrl0Reg_SPEC;
1331impl crate::sealed::RegSpec for Xtal32MTestctrl0Reg_SPEC {
1332 type DataType = u16;
1333}
1334
1335pub type Xtal32MTestctrl0Reg = crate::RegValueT<Xtal32MTestctrl0Reg_SPEC>;
1336
1337impl Xtal32MTestctrl0Reg {
1338 #[inline(always)]
1339 pub fn bias_sah_hold_override(
1340 self,
1341 ) -> crate::common::RegisterField<
1342 14,
1343 0x3,
1344 1,
1345 0,
1346 u8,
1347 u8,
1348 Xtal32MTestctrl0Reg_SPEC,
1349 crate::common::RW,
1350 > {
1351 crate::common::RegisterField::<
1352 14,
1353 0x3,
1354 1,
1355 0,
1356 u8,
1357 u8,
1358 Xtal32MTestctrl0Reg_SPEC,
1359 crate::common::RW,
1360 >::from_register(self, 0)
1361 }
1362
1363 #[inline(always)]
1364 pub fn core_freq_trim_sw2_amp(
1365 self,
1366 ) -> crate::common::RegisterField<
1367 11,
1368 0x7,
1369 1,
1370 0,
1371 u8,
1372 u8,
1373 Xtal32MTestctrl0Reg_SPEC,
1374 crate::common::RW,
1375 > {
1376 crate::common::RegisterField::<
1377 11,
1378 0x7,
1379 1,
1380 0,
1381 u8,
1382 u8,
1383 Xtal32MTestctrl0Reg_SPEC,
1384 crate::common::RW,
1385 >::from_register(self, 0)
1386 }
1387
1388 #[inline(always)]
1389 pub fn core_gm_current(
1390 self,
1391 ) -> crate::common::RegisterFieldBool<10, 1, 0, Xtal32MTestctrl0Reg_SPEC, crate::common::RW>
1392 {
1393 crate::common::RegisterFieldBool::<10,1,0,Xtal32MTestctrl0Reg_SPEC,crate::common::RW>::from_register(self,0)
1394 }
1395
1396 #[inline(always)]
1397 pub fn core_hold_amp_reg_override(
1398 self,
1399 ) -> crate::common::RegisterField<
1400 8,
1401 0x3,
1402 1,
1403 0,
1404 u8,
1405 u8,
1406 Xtal32MTestctrl0Reg_SPEC,
1407 crate::common::RW,
1408 > {
1409 crate::common::RegisterField::<
1410 8,
1411 0x3,
1412 1,
1413 0,
1414 u8,
1415 u8,
1416 Xtal32MTestctrl0Reg_SPEC,
1417 crate::common::RW,
1418 >::from_register(self, 0)
1419 }
1420
1421 #[inline(always)]
1422 pub fn core_i2v_to_testbus(
1423 self,
1424 ) -> crate::common::RegisterFieldBool<7, 1, 0, Xtal32MTestctrl0Reg_SPEC, crate::common::RW>
1425 {
1426 crate::common::RegisterFieldBool::<7,1,0,Xtal32MTestctrl0Reg_SPEC,crate::common::RW>::from_register(self,0)
1427 }
1428
1429 #[inline(always)]
1430 pub fn core_i2v_to_testbus_10x(
1431 self,
1432 ) -> crate::common::RegisterFieldBool<6, 1, 0, Xtal32MTestctrl0Reg_SPEC, crate::common::RW>
1433 {
1434 crate::common::RegisterFieldBool::<6,1,0,Xtal32MTestctrl0Reg_SPEC,crate::common::RW>::from_register(self,0)
1435 }
1436
1437 #[inline(always)]
1438 pub fn core_max_current(
1439 self,
1440 ) -> crate::common::RegisterFieldBool<5, 1, 0, Xtal32MTestctrl0Reg_SPEC, crate::common::RW>
1441 {
1442 crate::common::RegisterFieldBool::<5,1,0,Xtal32MTestctrl0Reg_SPEC,crate::common::RW>::from_register(self,0)
1443 }
1444
1445 #[inline(always)]
1446 pub fn core_xtal_discharge(
1447 self,
1448 ) -> crate::common::RegisterFieldBool<4, 1, 0, Xtal32MTestctrl0Reg_SPEC, crate::common::RW>
1449 {
1450 crate::common::RegisterFieldBool::<4,1,0,Xtal32MTestctrl0Reg_SPEC,crate::common::RW>::from_register(self,0)
1451 }
1452
1453 #[inline(always)]
1454 pub fn dcblock_lv_mode(
1455 self,
1456 ) -> crate::common::RegisterFieldBool<3, 1, 0, Xtal32MTestctrl0Reg_SPEC, crate::common::RW>
1457 {
1458 crate::common::RegisterFieldBool::<3,1,0,Xtal32MTestctrl0Reg_SPEC,crate::common::RW>::from_register(self,0)
1459 }
1460
1461 #[inline(always)]
1462 pub fn diffbuf_bypass(
1463 self,
1464 ) -> crate::common::RegisterFieldBool<2, 1, 0, Xtal32MTestctrl0Reg_SPEC, crate::common::RW>
1465 {
1466 crate::common::RegisterFieldBool::<2,1,0,Xtal32MTestctrl0Reg_SPEC,crate::common::RW>::from_register(self,0)
1467 }
1468
1469 #[inline(always)]
1470 pub fn osc_trim_open_disable(
1471 self,
1472 ) -> crate::common::RegisterFieldBool<1, 1, 0, Xtal32MTestctrl0Reg_SPEC, crate::common::RW>
1473 {
1474 crate::common::RegisterFieldBool::<1,1,0,Xtal32MTestctrl0Reg_SPEC,crate::common::RW>::from_register(self,0)
1475 }
1476
1477 #[inline(always)]
1478 pub fn spike_flt_disable(
1479 self,
1480 ) -> crate::common::RegisterFieldBool<0, 1, 0, Xtal32MTestctrl0Reg_SPEC, crate::common::RW>
1481 {
1482 crate::common::RegisterFieldBool::<0,1,0,Xtal32MTestctrl0Reg_SPEC,crate::common::RW>::from_register(self,0)
1483 }
1484}
1485impl ::core::default::Default for Xtal32MTestctrl0Reg {
1486 #[inline(always)]
1487 fn default() -> Xtal32MTestctrl0Reg {
1488 <crate::RegValueT<Xtal32MTestctrl0Reg_SPEC> as RegisterValue<_>>::new(13312)
1489 }
1490}
1491
1492#[doc(hidden)]
1493#[derive(Copy, Clone, Eq, PartialEq)]
1494pub struct Xtal32MTestctrl1Reg_SPEC;
1495impl crate::sealed::RegSpec for Xtal32MTestctrl1Reg_SPEC {
1496 type DataType = u16;
1497}
1498
1499pub type Xtal32MTestctrl1Reg = crate::RegValueT<Xtal32MTestctrl1Reg_SPEC>;
1500
1501impl Xtal32MTestctrl1Reg {
1502 #[inline(always)]
1503 pub fn osc_trim_cap_bias(
1504 self,
1505 ) -> crate::common::RegisterFieldBool<8, 1, 0, Xtal32MTestctrl1Reg_SPEC, crate::common::RW>
1506 {
1507 crate::common::RegisterFieldBool::<8,1,0,Xtal32MTestctrl1Reg_SPEC,crate::common::RW>::from_register(self,0)
1508 }
1509
1510 #[inline(always)]
1511 pub fn rfclk_sel_adpll_adc_to_gpio(
1512 self,
1513 ) -> crate::common::RegisterFieldBool<7, 1, 0, Xtal32MTestctrl1Reg_SPEC, crate::common::RW>
1514 {
1515 crate::common::RegisterFieldBool::<7,1,0,Xtal32MTestctrl1Reg_SPEC,crate::common::RW>::from_register(self,0)
1516 }
1517
1518 #[inline(always)]
1519 pub fn rfclk_adc_to_gpio(
1520 self,
1521 ) -> crate::common::RegisterFieldBool<6, 1, 0, Xtal32MTestctrl1Reg_SPEC, crate::common::RW>
1522 {
1523 crate::common::RegisterFieldBool::<6,1,0,Xtal32MTestctrl1Reg_SPEC,crate::common::RW>::from_register(self,0)
1524 }
1525
1526 #[inline(always)]
1527 pub fn rfclk_adpll_to_gpio(
1528 self,
1529 ) -> crate::common::RegisterFieldBool<5, 1, 0, Xtal32MTestctrl1Reg_SPEC, crate::common::RW>
1530 {
1531 crate::common::RegisterFieldBool::<5,1,0,Xtal32MTestctrl1Reg_SPEC,crate::common::RW>::from_register(self,0)
1532 }
1533
1534 #[inline(always)]
1535 pub fn prog_vref_sel(
1536 self,
1537 ) -> crate::common::RegisterFieldBool<4, 1, 0, Xtal32MTestctrl1Reg_SPEC, crate::common::RW>
1538 {
1539 crate::common::RegisterFieldBool::<4,1,0,Xtal32MTestctrl1Reg_SPEC,crate::common::RW>::from_register(self,0)
1540 }
1541
1542 #[inline(always)]
1543 pub fn varicap_test_sel_xtal(
1544 self,
1545 ) -> crate::common::RegisterFieldBool<3, 1, 0, Xtal32MTestctrl1Reg_SPEC, crate::common::RW>
1546 {
1547 crate::common::RegisterFieldBool::<3,1,0,Xtal32MTestctrl1Reg_SPEC,crate::common::RW>::from_register(self,0)
1548 }
1549
1550 #[inline(always)]
1551 pub fn varicap_test_enable(
1552 self,
1553 ) -> crate::common::RegisterFieldBool<2, 1, 0, Xtal32MTestctrl1Reg_SPEC, crate::common::RW>
1554 {
1555 crate::common::RegisterFieldBool::<2,1,0,Xtal32MTestctrl1Reg_SPEC,crate::common::RW>::from_register(self,0)
1556 }
1557
1558 #[inline(always)]
1559 pub fn ldo_vref_hold_override(
1560 self,
1561 ) -> crate::common::RegisterFieldBool<1, 1, 0, Xtal32MTestctrl1Reg_SPEC, crate::common::RW>
1562 {
1563 crate::common::RegisterFieldBool::<1,1,0,Xtal32MTestctrl1Reg_SPEC,crate::common::RW>::from_register(self,0)
1564 }
1565
1566 #[inline(always)]
1567 pub fn disable_tm_clk(
1568 self,
1569 ) -> crate::common::RegisterFieldBool<0, 1, 0, Xtal32MTestctrl1Reg_SPEC, crate::common::RW>
1570 {
1571 crate::common::RegisterFieldBool::<0,1,0,Xtal32MTestctrl1Reg_SPEC,crate::common::RW>::from_register(self,0)
1572 }
1573}
1574impl ::core::default::Default for Xtal32MTestctrl1Reg {
1575 #[inline(always)]
1576 fn default() -> Xtal32MTestctrl1Reg {
1577 <crate::RegValueT<Xtal32MTestctrl1Reg_SPEC> as RegisterValue<_>>::new(0)
1578 }
1579}