d1_pac/hs_timer/
hs_tmr_ctrl.rs

1#[doc = "Register `hs_tmr%s_ctrl` reader"]
2pub type R = crate::R<HS_TMR_CTRL_SPEC>;
3#[doc = "Register `hs_tmr%s_ctrl` writer"]
4pub type W = crate::W<HS_TMR_CTRL_SPEC>;
5#[doc = "Field `hs_tmr_en` reader - HSTimer Enable"]
6pub type HS_TMR_EN_R = crate::BitReader<HS_TMR_EN_A>;
7#[doc = "HSTimer Enable\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum HS_TMR_EN_A {
10    #[doc = "0: `0`"]
11    STOP_PAUSE = 0,
12    #[doc = "1: `1`"]
13    START = 1,
14}
15impl From<HS_TMR_EN_A> for bool {
16    #[inline(always)]
17    fn from(variant: HS_TMR_EN_A) -> Self {
18        variant as u8 != 0
19    }
20}
21impl HS_TMR_EN_R {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> HS_TMR_EN_A {
25        match self.bits {
26            false => HS_TMR_EN_A::STOP_PAUSE,
27            true => HS_TMR_EN_A::START,
28        }
29    }
30    #[doc = "`0`"]
31    #[inline(always)]
32    pub fn is_stop_pause(&self) -> bool {
33        *self == HS_TMR_EN_A::STOP_PAUSE
34    }
35    #[doc = "`1`"]
36    #[inline(always)]
37    pub fn is_start(&self) -> bool {
38        *self == HS_TMR_EN_A::START
39    }
40}
41#[doc = "Field `hs_tmr_en` writer - HSTimer Enable"]
42pub type HS_TMR_EN_W<'a, REG> = crate::BitWriter<'a, REG, HS_TMR_EN_A>;
43impl<'a, REG> HS_TMR_EN_W<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    #[doc = "`0`"]
48    #[inline(always)]
49    pub fn stop_pause(self) -> &'a mut crate::W<REG> {
50        self.variant(HS_TMR_EN_A::STOP_PAUSE)
51    }
52    #[doc = "`1`"]
53    #[inline(always)]
54    pub fn start(self) -> &'a mut crate::W<REG> {
55        self.variant(HS_TMR_EN_A::START)
56    }
57}
58#[doc = "Field `hs_tmr_reload` reader - HSTimer Reload"]
59pub type HS_TMR_RELOAD_R = crate::BitReader<HS_TMR_RELOAD_A>;
60#[doc = "HSTimer Reload\n\nValue on reset: 0"]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum HS_TMR_RELOAD_A {
63    #[doc = "0: `0`"]
64    NO_EFFECT = 0,
65    #[doc = "1: `1`"]
66    RELOAD = 1,
67}
68impl From<HS_TMR_RELOAD_A> for bool {
69    #[inline(always)]
70    fn from(variant: HS_TMR_RELOAD_A) -> Self {
71        variant as u8 != 0
72    }
73}
74impl HS_TMR_RELOAD_R {
75    #[doc = "Get enumerated values variant"]
76    #[inline(always)]
77    pub const fn variant(&self) -> HS_TMR_RELOAD_A {
78        match self.bits {
79            false => HS_TMR_RELOAD_A::NO_EFFECT,
80            true => HS_TMR_RELOAD_A::RELOAD,
81        }
82    }
83    #[doc = "`0`"]
84    #[inline(always)]
85    pub fn is_no_effect(&self) -> bool {
86        *self == HS_TMR_RELOAD_A::NO_EFFECT
87    }
88    #[doc = "`1`"]
89    #[inline(always)]
90    pub fn is_reload(&self) -> bool {
91        *self == HS_TMR_RELOAD_A::RELOAD
92    }
93}
94#[doc = "Field `hs_tmr_reload` writer - HSTimer Reload"]
95pub type HS_TMR_RELOAD_W<'a, REG> = crate::BitWriter1S<'a, REG, HS_TMR_RELOAD_A>;
96impl<'a, REG> HS_TMR_RELOAD_W<'a, REG>
97where
98    REG: crate::Writable + crate::RegisterSpec,
99{
100    #[doc = "`0`"]
101    #[inline(always)]
102    pub fn no_effect(self) -> &'a mut crate::W<REG> {
103        self.variant(HS_TMR_RELOAD_A::NO_EFFECT)
104    }
105    #[doc = "`1`"]
106    #[inline(always)]
107    pub fn reload(self) -> &'a mut crate::W<REG> {
108        self.variant(HS_TMR_RELOAD_A::RELOAD)
109    }
110}
111#[doc = "Field `hs_tmr_clk` reader - Select the pre-scale for the HSTimer clock sources"]
112pub type HS_TMR_CLK_R = crate::FieldReader<HS_TMR_CLK_A>;
113#[doc = "Select the pre-scale for the HSTimer clock sources\n\nValue on reset: 0"]
114#[derive(Clone, Copy, Debug, PartialEq, Eq)]
115#[repr(u8)]
116pub enum HS_TMR_CLK_A {
117    #[doc = "0: `0`"]
118    P1 = 0,
119    #[doc = "1: `1`"]
120    P2 = 1,
121    #[doc = "2: `10`"]
122    P4 = 2,
123    #[doc = "3: `11`"]
124    P8 = 3,
125    #[doc = "4: `100`"]
126    P16 = 4,
127}
128impl From<HS_TMR_CLK_A> for u8 {
129    #[inline(always)]
130    fn from(variant: HS_TMR_CLK_A) -> Self {
131        variant as _
132    }
133}
134impl crate::FieldSpec for HS_TMR_CLK_A {
135    type Ux = u8;
136}
137impl HS_TMR_CLK_R {
138    #[doc = "Get enumerated values variant"]
139    #[inline(always)]
140    pub const fn variant(&self) -> Option<HS_TMR_CLK_A> {
141        match self.bits {
142            0 => Some(HS_TMR_CLK_A::P1),
143            1 => Some(HS_TMR_CLK_A::P2),
144            2 => Some(HS_TMR_CLK_A::P4),
145            3 => Some(HS_TMR_CLK_A::P8),
146            4 => Some(HS_TMR_CLK_A::P16),
147            _ => None,
148        }
149    }
150    #[doc = "`0`"]
151    #[inline(always)]
152    pub fn is_p1(&self) -> bool {
153        *self == HS_TMR_CLK_A::P1
154    }
155    #[doc = "`1`"]
156    #[inline(always)]
157    pub fn is_p2(&self) -> bool {
158        *self == HS_TMR_CLK_A::P2
159    }
160    #[doc = "`10`"]
161    #[inline(always)]
162    pub fn is_p4(&self) -> bool {
163        *self == HS_TMR_CLK_A::P4
164    }
165    #[doc = "`11`"]
166    #[inline(always)]
167    pub fn is_p8(&self) -> bool {
168        *self == HS_TMR_CLK_A::P8
169    }
170    #[doc = "`100`"]
171    #[inline(always)]
172    pub fn is_p16(&self) -> bool {
173        *self == HS_TMR_CLK_A::P16
174    }
175}
176#[doc = "Field `hs_tmr_clk` writer - Select the pre-scale for the HSTimer clock sources"]
177pub type HS_TMR_CLK_W<'a, REG> = crate::FieldWriter<'a, REG, 3, HS_TMR_CLK_A>;
178impl<'a, REG> HS_TMR_CLK_W<'a, REG>
179where
180    REG: crate::Writable + crate::RegisterSpec,
181    REG::Ux: From<u8>,
182{
183    #[doc = "`0`"]
184    #[inline(always)]
185    pub fn p1(self) -> &'a mut crate::W<REG> {
186        self.variant(HS_TMR_CLK_A::P1)
187    }
188    #[doc = "`1`"]
189    #[inline(always)]
190    pub fn p2(self) -> &'a mut crate::W<REG> {
191        self.variant(HS_TMR_CLK_A::P2)
192    }
193    #[doc = "`10`"]
194    #[inline(always)]
195    pub fn p4(self) -> &'a mut crate::W<REG> {
196        self.variant(HS_TMR_CLK_A::P4)
197    }
198    #[doc = "`11`"]
199    #[inline(always)]
200    pub fn p8(self) -> &'a mut crate::W<REG> {
201        self.variant(HS_TMR_CLK_A::P8)
202    }
203    #[doc = "`100`"]
204    #[inline(always)]
205    pub fn p16(self) -> &'a mut crate::W<REG> {
206        self.variant(HS_TMR_CLK_A::P16)
207    }
208}
209#[doc = "Field `hs_tmr_mode` reader - Select the timing mode for HSTimer"]
210pub type HS_TMR_MODE_R = crate::BitReader<HS_TMR_MODE_A>;
211#[doc = "Select the timing mode for HSTimer\n\nValue on reset: 0"]
212#[derive(Clone, Copy, Debug, PartialEq, Eq)]
213pub enum HS_TMR_MODE_A {
214    #[doc = "0: `0`"]
215    PERIODIC = 0,
216    #[doc = "1: `1`"]
217    ONE_SHOT = 1,
218}
219impl From<HS_TMR_MODE_A> for bool {
220    #[inline(always)]
221    fn from(variant: HS_TMR_MODE_A) -> Self {
222        variant as u8 != 0
223    }
224}
225impl HS_TMR_MODE_R {
226    #[doc = "Get enumerated values variant"]
227    #[inline(always)]
228    pub const fn variant(&self) -> HS_TMR_MODE_A {
229        match self.bits {
230            false => HS_TMR_MODE_A::PERIODIC,
231            true => HS_TMR_MODE_A::ONE_SHOT,
232        }
233    }
234    #[doc = "`0`"]
235    #[inline(always)]
236    pub fn is_periodic(&self) -> bool {
237        *self == HS_TMR_MODE_A::PERIODIC
238    }
239    #[doc = "`1`"]
240    #[inline(always)]
241    pub fn is_one_shot(&self) -> bool {
242        *self == HS_TMR_MODE_A::ONE_SHOT
243    }
244}
245#[doc = "Field `hs_tmr_mode` writer - Select the timing mode for HSTimer"]
246pub type HS_TMR_MODE_W<'a, REG> = crate::BitWriter<'a, REG, HS_TMR_MODE_A>;
247impl<'a, REG> HS_TMR_MODE_W<'a, REG>
248where
249    REG: crate::Writable + crate::RegisterSpec,
250{
251    #[doc = "`0`"]
252    #[inline(always)]
253    pub fn periodic(self) -> &'a mut crate::W<REG> {
254        self.variant(HS_TMR_MODE_A::PERIODIC)
255    }
256    #[doc = "`1`"]
257    #[inline(always)]
258    pub fn one_shot(self) -> &'a mut crate::W<REG> {
259        self.variant(HS_TMR_MODE_A::ONE_SHOT)
260    }
261}
262#[doc = "Field `hs_tmr_test` reader - Select the operating mode for HSTimer"]
263pub type HS_TMR_TEST_R = crate::BitReader<HS_TMR_TEST_A>;
264#[doc = "Select the operating mode for HSTimer\n\nValue on reset: 0"]
265#[derive(Clone, Copy, Debug, PartialEq, Eq)]
266pub enum HS_TMR_TEST_A {
267    #[doc = "0: `0`"]
268    NORMAL = 0,
269    #[doc = "1: `1`"]
270    TEST = 1,
271}
272impl From<HS_TMR_TEST_A> for bool {
273    #[inline(always)]
274    fn from(variant: HS_TMR_TEST_A) -> Self {
275        variant as u8 != 0
276    }
277}
278impl HS_TMR_TEST_R {
279    #[doc = "Get enumerated values variant"]
280    #[inline(always)]
281    pub const fn variant(&self) -> HS_TMR_TEST_A {
282        match self.bits {
283            false => HS_TMR_TEST_A::NORMAL,
284            true => HS_TMR_TEST_A::TEST,
285        }
286    }
287    #[doc = "`0`"]
288    #[inline(always)]
289    pub fn is_normal(&self) -> bool {
290        *self == HS_TMR_TEST_A::NORMAL
291    }
292    #[doc = "`1`"]
293    #[inline(always)]
294    pub fn is_test(&self) -> bool {
295        *self == HS_TMR_TEST_A::TEST
296    }
297}
298#[doc = "Field `hs_tmr_test` writer - Select the operating mode for HSTimer"]
299pub type HS_TMR_TEST_W<'a, REG> = crate::BitWriter<'a, REG, HS_TMR_TEST_A>;
300impl<'a, REG> HS_TMR_TEST_W<'a, REG>
301where
302    REG: crate::Writable + crate::RegisterSpec,
303{
304    #[doc = "`0`"]
305    #[inline(always)]
306    pub fn normal(self) -> &'a mut crate::W<REG> {
307        self.variant(HS_TMR_TEST_A::NORMAL)
308    }
309    #[doc = "`1`"]
310    #[inline(always)]
311    pub fn test(self) -> &'a mut crate::W<REG> {
312        self.variant(HS_TMR_TEST_A::TEST)
313    }
314}
315impl R {
316    #[doc = "Bit 0 - HSTimer Enable"]
317    #[inline(always)]
318    pub fn hs_tmr_en(&self) -> HS_TMR_EN_R {
319        HS_TMR_EN_R::new((self.bits & 1) != 0)
320    }
321    #[doc = "Bit 1 - HSTimer Reload"]
322    #[inline(always)]
323    pub fn hs_tmr_reload(&self) -> HS_TMR_RELOAD_R {
324        HS_TMR_RELOAD_R::new(((self.bits >> 1) & 1) != 0)
325    }
326    #[doc = "Bits 4:6 - Select the pre-scale for the HSTimer clock sources"]
327    #[inline(always)]
328    pub fn hs_tmr_clk(&self) -> HS_TMR_CLK_R {
329        HS_TMR_CLK_R::new(((self.bits >> 4) & 7) as u8)
330    }
331    #[doc = "Bit 7 - Select the timing mode for HSTimer"]
332    #[inline(always)]
333    pub fn hs_tmr_mode(&self) -> HS_TMR_MODE_R {
334        HS_TMR_MODE_R::new(((self.bits >> 7) & 1) != 0)
335    }
336    #[doc = "Bit 31 - Select the operating mode for HSTimer"]
337    #[inline(always)]
338    pub fn hs_tmr_test(&self) -> HS_TMR_TEST_R {
339        HS_TMR_TEST_R::new(((self.bits >> 31) & 1) != 0)
340    }
341}
342impl W {
343    #[doc = "Bit 0 - HSTimer Enable"]
344    #[inline(always)]
345    #[must_use]
346    pub fn hs_tmr_en(&mut self) -> HS_TMR_EN_W<HS_TMR_CTRL_SPEC> {
347        HS_TMR_EN_W::new(self, 0)
348    }
349    #[doc = "Bit 1 - HSTimer Reload"]
350    #[inline(always)]
351    #[must_use]
352    pub fn hs_tmr_reload(&mut self) -> HS_TMR_RELOAD_W<HS_TMR_CTRL_SPEC> {
353        HS_TMR_RELOAD_W::new(self, 1)
354    }
355    #[doc = "Bits 4:6 - Select the pre-scale for the HSTimer clock sources"]
356    #[inline(always)]
357    #[must_use]
358    pub fn hs_tmr_clk(&mut self) -> HS_TMR_CLK_W<HS_TMR_CTRL_SPEC> {
359        HS_TMR_CLK_W::new(self, 4)
360    }
361    #[doc = "Bit 7 - Select the timing mode for HSTimer"]
362    #[inline(always)]
363    #[must_use]
364    pub fn hs_tmr_mode(&mut self) -> HS_TMR_MODE_W<HS_TMR_CTRL_SPEC> {
365        HS_TMR_MODE_W::new(self, 7)
366    }
367    #[doc = "Bit 31 - Select the operating mode for HSTimer"]
368    #[inline(always)]
369    #[must_use]
370    pub fn hs_tmr_test(&mut self) -> HS_TMR_TEST_W<HS_TMR_CTRL_SPEC> {
371        HS_TMR_TEST_W::new(self, 31)
372    }
373    #[doc = r" Writes raw bits to the register."]
374    #[doc = r""]
375    #[doc = r" # Safety"]
376    #[doc = r""]
377    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
378    #[inline(always)]
379    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
380        self.bits = bits;
381        self
382    }
383}
384#[doc = "HS Timer Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hs_tmr_ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hs_tmr_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
385pub struct HS_TMR_CTRL_SPEC;
386impl crate::RegisterSpec for HS_TMR_CTRL_SPEC {
387    type Ux = u32;
388}
389#[doc = "`read()` method returns [`hs_tmr_ctrl::R`](R) reader structure"]
390impl crate::Readable for HS_TMR_CTRL_SPEC {}
391#[doc = "`write(|w| ..)` method takes [`hs_tmr_ctrl::W`](W) writer structure"]
392impl crate::Writable for HS_TMR_CTRL_SPEC {
393    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
394    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0x02;
395}
396#[doc = "`reset()` method sets hs_tmr%s_ctrl to value 0"]
397impl crate::Resettable for HS_TMR_CTRL_SPEC {
398    const RESET_VALUE: Self::Ux = 0;
399}
d1_pac/hs_timer/hs_tmr_ctrl.rs

d1_pac/hs_timer/
hs_tmr_ctrl.rs
