d1_pac/usb1/ohci_control_status_partition/
hc_control.rs1#[doc = "Register `hc_control` reader"]
2pub type R = crate::R<HC_CONTROL_SPEC>;
3#[doc = "Register `hc_control` writer"]
4pub type W = crate::W<HC_CONTROL_SPEC>;
5#[doc = "Field `control_bulk_service_ratio` reader - This specifies the service ratio between Control and Bulk EDs. Before processing any of the nonperiodic lists, HC must compare the ratio specified with its internal count on how many nonempty Control EDs have been processed, in determining whether to continue serving another Control ED or switching to Bulk EDs. The internal count will be retained when crossing the frame boundary. In case of reset, HCD is responsible for restoring this value."]
6pub type CONTROL_BULK_SERVICE_RATIO_R = crate::FieldReader<CONTROL_BULK_SERVICE_RATIO_A>;
7#[doc = "This specifies the service ratio between Control and Bulk EDs. Before processing any of the nonperiodic lists, HC must compare the ratio specified with its internal count on how many nonempty Control EDs have been processed, in determining whether to continue serving another Control ED or switching to Bulk EDs. The internal count will be retained when crossing the frame boundary. In case of reset, HCD is responsible for restoring this value.\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9#[repr(u8)]
10pub enum CONTROL_BULK_SERVICE_RATIO_A {
11 #[doc = "0: 1:1"]
12 R1 = 0,
13 #[doc = "1: 2:1"]
14 R2 = 1,
15 #[doc = "2: 3:1"]
16 R3 = 2,
17 #[doc = "3: 4:1"]
18 R4 = 3,
19}
20impl From<CONTROL_BULK_SERVICE_RATIO_A> for u8 {
21 #[inline(always)]
22 fn from(variant: CONTROL_BULK_SERVICE_RATIO_A) -> Self {
23 variant as _
24 }
25}
26impl crate::FieldSpec for CONTROL_BULK_SERVICE_RATIO_A {
27 type Ux = u8;
28}
29impl CONTROL_BULK_SERVICE_RATIO_R {
30 #[doc = "Get enumerated values variant"]
31 #[inline(always)]
32 pub const fn variant(&self) -> CONTROL_BULK_SERVICE_RATIO_A {
33 match self.bits {
34 0 => CONTROL_BULK_SERVICE_RATIO_A::R1,
35 1 => CONTROL_BULK_SERVICE_RATIO_A::R2,
36 2 => CONTROL_BULK_SERVICE_RATIO_A::R3,
37 3 => CONTROL_BULK_SERVICE_RATIO_A::R4,
38 _ => unreachable!(),
39 }
40 }
41 #[doc = "1:1"]
42 #[inline(always)]
43 pub fn is_r1(&self) -> bool {
44 *self == CONTROL_BULK_SERVICE_RATIO_A::R1
45 }
46 #[doc = "2:1"]
47 #[inline(always)]
48 pub fn is_r2(&self) -> bool {
49 *self == CONTROL_BULK_SERVICE_RATIO_A::R2
50 }
51 #[doc = "3:1"]
52 #[inline(always)]
53 pub fn is_r3(&self) -> bool {
54 *self == CONTROL_BULK_SERVICE_RATIO_A::R3
55 }
56 #[doc = "4:1"]
57 #[inline(always)]
58 pub fn is_r4(&self) -> bool {
59 *self == CONTROL_BULK_SERVICE_RATIO_A::R4
60 }
61}
62#[doc = "Field `control_bulk_service_ratio` writer - This specifies the service ratio between Control and Bulk EDs. Before processing any of the nonperiodic lists, HC must compare the ratio specified with its internal count on how many nonempty Control EDs have been processed, in determining whether to continue serving another Control ED or switching to Bulk EDs. The internal count will be retained when crossing the frame boundary. In case of reset, HCD is responsible for restoring this value."]
63pub type CONTROL_BULK_SERVICE_RATIO_W<'a, REG> =
64 crate::FieldWriterSafe<'a, REG, 2, CONTROL_BULK_SERVICE_RATIO_A>;
65impl<'a, REG> CONTROL_BULK_SERVICE_RATIO_W<'a, REG>
66where
67 REG: crate::Writable + crate::RegisterSpec,
68 REG::Ux: From<u8>,
69{
70 #[doc = "1:1"]
71 #[inline(always)]
72 pub fn r1(self) -> &'a mut crate::W<REG> {
73 self.variant(CONTROL_BULK_SERVICE_RATIO_A::R1)
74 }
75 #[doc = "2:1"]
76 #[inline(always)]
77 pub fn r2(self) -> &'a mut crate::W<REG> {
78 self.variant(CONTROL_BULK_SERVICE_RATIO_A::R2)
79 }
80 #[doc = "3:1"]
81 #[inline(always)]
82 pub fn r3(self) -> &'a mut crate::W<REG> {
83 self.variant(CONTROL_BULK_SERVICE_RATIO_A::R3)
84 }
85 #[doc = "4:1"]
86 #[inline(always)]
87 pub fn r4(self) -> &'a mut crate::W<REG> {
88 self.variant(CONTROL_BULK_SERVICE_RATIO_A::R4)
89 }
90}
91#[doc = "Field `periodic_list_enable` reader - This bit is set to enable the processing of periodic list in the next Frame. If cleared by HCD, processing of the periodic list does not occur after the next SOF. HC must check this bit before it starts processing the list."]
92pub type PERIODIC_LIST_ENABLE_R = crate::BitReader;
93#[doc = "Field `periodic_list_enable` writer - This bit is set to enable the processing of periodic list in the next Frame. If cleared by HCD, processing of the periodic list does not occur after the next SOF. HC must check this bit before it starts processing the list."]
94pub type PERIODIC_LIST_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>;
95#[doc = "Field `control_list_enable` reader - This bit is set to enable the processing of the Control list in the next Frame. If cleared by HCD, the processing of the Control list does not occur after the next SOF. HC must check this bit whenever it determines to process the list. When disabled, HCD may modify the list. If HcControlCurrentED is pointing to an ED to be removed, HCD must advance the pointer by updating HcControlCurrentED before re-enabling processing of the list."]
96pub type CONTROL_LIST_ENABLE_R = crate::BitReader;
97#[doc = "Field `control_list_enable` writer - This bit is set to enable the processing of the Control list in the next Frame. If cleared by HCD, the processing of the Control list does not occur after the next SOF. HC must check this bit whenever it determines to process the list. When disabled, HCD may modify the list. If HcControlCurrentED is pointing to an ED to be removed, HCD must advance the pointer by updating HcControlCurrentED before re-enabling processing of the list."]
98pub type CONTROL_LIST_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>;
99#[doc = "Field `isochronous_enable` reader - This bit is used by HCD to enable/disable processing of isochronous EDs. While processing the periodic list in a Frame, HC checks the status of this bit when it finds an Isochronous ED (F=1). If set (enabled), HC continues processing the EDs. If cleared (disabled), HC halts processing of the periodic list (which now contains only isochronous EDs) and begins processing the Bulk/Control lists. Setting this bit is guaranteed to take effect in the next Frame (not the current Frame)."]
100pub type ISOCHRONOUS_ENABLE_R = crate::BitReader;
101#[doc = "Field `isochronous_enable` writer - This bit is used by HCD to enable/disable processing of isochronous EDs. While processing the periodic list in a Frame, HC checks the status of this bit when it finds an Isochronous ED (F=1). If set (enabled), HC continues processing the EDs. If cleared (disabled), HC halts processing of the periodic list (which now contains only isochronous EDs) and begins processing the Bulk/Control lists. Setting this bit is guaranteed to take effect in the next Frame (not the current Frame)."]
102pub type ISOCHRONOUS_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>;
103#[doc = "Field `bulk_list_enable` reader - This bit is set to enable the processing of the Bulk list in the next Frame. If cleared by HCD, the processing of the Bulk list does not occur after the next SOF. HC checks this bit whenever it determines to process the list. When disabled, HCD may modify the list. If HcBulkCurrentED is pointing to an ED to be removed, HCD must advance the pointer by updating HcBulkCurrentED before re-enabling processing of the list."]
104pub type BULK_LIST_ENABLE_R = crate::BitReader;
105#[doc = "Field `bulk_list_enable` writer - This bit is set to enable the processing of the Bulk list in the next Frame. If cleared by HCD, the processing of the Bulk list does not occur after the next SOF. HC checks this bit whenever it determines to process the list. When disabled, HCD may modify the list. If HcBulkCurrentED is pointing to an ED to be removed, HCD must advance the pointer by updating HcBulkCurrentED before re-enabling processing of the list."]
106pub type BULK_LIST_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>;
107#[doc = "Field `host_controller_functional_state_for_usb` reader - A transition to USBOperational from another state causes SOF generation to begin 1 ms later. HCD may determine whether HC has begun sending SOFs by reading the StartoFrame field of HcInterruptStatus.\n\nThis field may be changed by HC only when in the USBSUSPEND state. HC may move from the USBSUSPEND state to the USBRESUME state after detecting the resume signaling from a downstream port.\n\nHC enters USBSUSPEND after a software reset, whereas it enters USBRESET after a hardware reset. The latter also resets the Root Hub and asserts subsequent reset signaling to downstream ports."]
108pub type HOST_CONTROLLER_FUNCTIONAL_STATE_FOR_USB_R =
109 crate::FieldReader<HOST_CONTROLLER_FUNCTIONAL_STATE_FOR_USB_A>;
110#[doc = "A transition to USBOperational from another state causes SOF generation to begin 1 ms later. HCD may determine whether HC has begun sending SOFs by reading the StartoFrame field of HcInterruptStatus.\n\nThis field may be changed by HC only when in the USBSUSPEND state. HC may move from the USBSUSPEND state to the USBRESUME state after detecting the resume signaling from a downstream port.\n\nHC enters USBSUSPEND after a software reset, whereas it enters USBRESET after a hardware reset. The latter also resets the Root Hub and asserts subsequent reset signaling to downstream ports.\n\nValue on reset: 0"]
111#[derive(Clone, Copy, Debug, PartialEq, Eq)]
112#[repr(u8)]
113pub enum HOST_CONTROLLER_FUNCTIONAL_STATE_FOR_USB_A {
114 #[doc = "0: USB Reset"]
115 USB_RESET = 0,
116 #[doc = "1: USB Resume"]
117 USB_RESUME = 1,
118 #[doc = "2: USB Operational"]
119 USB_OPERATIONAL = 2,
120 #[doc = "3: USB Suspend"]
121 USB_SUSPEND = 3,
122}
123impl From<HOST_CONTROLLER_FUNCTIONAL_STATE_FOR_USB_A> for u8 {
124 #[inline(always)]
125 fn from(variant: HOST_CONTROLLER_FUNCTIONAL_STATE_FOR_USB_A) -> Self {
126 variant as _
127 }
128}
129impl crate::FieldSpec for HOST_CONTROLLER_FUNCTIONAL_STATE_FOR_USB_A {
130 type Ux = u8;
131}
132impl HOST_CONTROLLER_FUNCTIONAL_STATE_FOR_USB_R {
133 #[doc = "Get enumerated values variant"]
134 #[inline(always)]
135 pub const fn variant(&self) -> HOST_CONTROLLER_FUNCTIONAL_STATE_FOR_USB_A {
136 match self.bits {
137 0 => HOST_CONTROLLER_FUNCTIONAL_STATE_FOR_USB_A::USB_RESET,
138 1 => HOST_CONTROLLER_FUNCTIONAL_STATE_FOR_USB_A::USB_RESUME,
139 2 => HOST_CONTROLLER_FUNCTIONAL_STATE_FOR_USB_A::USB_OPERATIONAL,
140 3 => HOST_CONTROLLER_FUNCTIONAL_STATE_FOR_USB_A::USB_SUSPEND,
141 _ => unreachable!(),
142 }
143 }
144 #[doc = "USB Reset"]
145 #[inline(always)]
146 pub fn is_usb_reset(&self) -> bool {
147 *self == HOST_CONTROLLER_FUNCTIONAL_STATE_FOR_USB_A::USB_RESET
148 }
149 #[doc = "USB Resume"]
150 #[inline(always)]
151 pub fn is_usb_resume(&self) -> bool {
152 *self == HOST_CONTROLLER_FUNCTIONAL_STATE_FOR_USB_A::USB_RESUME
153 }
154 #[doc = "USB Operational"]
155 #[inline(always)]
156 pub fn is_usb_operational(&self) -> bool {
157 *self == HOST_CONTROLLER_FUNCTIONAL_STATE_FOR_USB_A::USB_OPERATIONAL
158 }
159 #[doc = "USB Suspend"]
160 #[inline(always)]
161 pub fn is_usb_suspend(&self) -> bool {
162 *self == HOST_CONTROLLER_FUNCTIONAL_STATE_FOR_USB_A::USB_SUSPEND
163 }
164}
165#[doc = "Field `host_controller_functional_state_for_usb` writer - A transition to USBOperational from another state causes SOF generation to begin 1 ms later. HCD may determine whether HC has begun sending SOFs by reading the StartoFrame field of HcInterruptStatus.\n\nThis field may be changed by HC only when in the USBSUSPEND state. HC may move from the USBSUSPEND state to the USBRESUME state after detecting the resume signaling from a downstream port.\n\nHC enters USBSUSPEND after a software reset, whereas it enters USBRESET after a hardware reset. The latter also resets the Root Hub and asserts subsequent reset signaling to downstream ports."]
166pub type HOST_CONTROLLER_FUNCTIONAL_STATE_FOR_USB_W<'a, REG> =
167 crate::FieldWriterSafe<'a, REG, 2, HOST_CONTROLLER_FUNCTIONAL_STATE_FOR_USB_A>;
168impl<'a, REG> HOST_CONTROLLER_FUNCTIONAL_STATE_FOR_USB_W<'a, REG>
169where
170 REG: crate::Writable + crate::RegisterSpec,
171 REG::Ux: From<u8>,
172{
173 #[doc = "USB Reset"]
174 #[inline(always)]
175 pub fn usb_reset(self) -> &'a mut crate::W<REG> {
176 self.variant(HOST_CONTROLLER_FUNCTIONAL_STATE_FOR_USB_A::USB_RESET)
177 }
178 #[doc = "USB Resume"]
179 #[inline(always)]
180 pub fn usb_resume(self) -> &'a mut crate::W<REG> {
181 self.variant(HOST_CONTROLLER_FUNCTIONAL_STATE_FOR_USB_A::USB_RESUME)
182 }
183 #[doc = "USB Operational"]
184 #[inline(always)]
185 pub fn usb_operational(self) -> &'a mut crate::W<REG> {
186 self.variant(HOST_CONTROLLER_FUNCTIONAL_STATE_FOR_USB_A::USB_OPERATIONAL)
187 }
188 #[doc = "USB Suspend"]
189 #[inline(always)]
190 pub fn usb_suspend(self) -> &'a mut crate::W<REG> {
191 self.variant(HOST_CONTROLLER_FUNCTIONAL_STATE_FOR_USB_A::USB_SUSPEND)
192 }
193}
194#[doc = "Field `interrupt_routing` reader - InterruptRouting This bit determines the routing of interrupts generated by events registered in HcInterruptStatus. If clear, all interrupt are routed to the normal host bus interrupt mechanism. If set interrupts are routed to the System Management Interrupt. HCD clears this bit upon a hardware reset, but it does not alter this bit upon a software reset. HCD uses this bit as a tag to indicate the ownership of HC."]
195pub type INTERRUPT_ROUTING_R = crate::BitReader;
196#[doc = "Field `interrupt_routing` writer - InterruptRouting This bit determines the routing of interrupts generated by events registered in HcInterruptStatus. If clear, all interrupt are routed to the normal host bus interrupt mechanism. If set interrupts are routed to the System Management Interrupt. HCD clears this bit upon a hardware reset, but it does not alter this bit upon a software reset. HCD uses this bit as a tag to indicate the ownership of HC."]
197pub type INTERRUPT_ROUTING_W<'a, REG> = crate::BitWriter<'a, REG>;
198#[doc = "Field `remote_wakeup_connected` reader - This bit indicates whether HC supports remote wakeup signaling. If remote wakeup is supported and used by the system, it is the responsibility of system firmware to set this bit during POST. HC clear the bit upon a hardware reset but does not alter it upon a software reset. Remote wakeup signaling of the host system is host-bus-specific and is not described in this specification."]
199pub type REMOTE_WAKEUP_CONNECTED_R = crate::BitReader;
200#[doc = "Field `remote_wakeup_connected` writer - This bit indicates whether HC supports remote wakeup signaling. If remote wakeup is supported and used by the system, it is the responsibility of system firmware to set this bit during POST. HC clear the bit upon a hardware reset but does not alter it upon a software reset. Remote wakeup signaling of the host system is host-bus-specific and is not described in this specification."]
201pub type REMOTE_WAKEUP_CONNECTED_W<'a, REG> = crate::BitWriter<'a, REG>;
202#[doc = "Field `remote_wakeup_enable` reader - This bit is used by HCD to enable or disable the remote wakeup feature upon the detection of upstream resume signaling. When this bit is set and the ResumeDetected bit in HcInterruptStatus is set, a remote wakeup is signaled to the host system. Setting this bit has no impact on the generation of hardware interrupt."]
203pub type REMOTE_WAKEUP_ENABLE_R = crate::BitReader;
204#[doc = "Field `remote_wakeup_enable` writer - This bit is used by HCD to enable or disable the remote wakeup feature upon the detection of upstream resume signaling. When this bit is set and the ResumeDetected bit in HcInterruptStatus is set, a remote wakeup is signaled to the host system. Setting this bit has no impact on the generation of hardware interrupt."]
205pub type REMOTE_WAKEUP_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>;
206impl R {
207 #[doc = "Bits 0:1 - This specifies the service ratio between Control and Bulk EDs. Before processing any of the nonperiodic lists, HC must compare the ratio specified with its internal count on how many nonempty Control EDs have been processed, in determining whether to continue serving another Control ED or switching to Bulk EDs. The internal count will be retained when crossing the frame boundary. In case of reset, HCD is responsible for restoring this value."]
208 #[inline(always)]
209 pub fn control_bulk_service_ratio(&self) -> CONTROL_BULK_SERVICE_RATIO_R {
210 CONTROL_BULK_SERVICE_RATIO_R::new((self.bits & 3) as u8)
211 }
212 #[doc = "Bit 2 - This bit is set to enable the processing of periodic list in the next Frame. If cleared by HCD, processing of the periodic list does not occur after the next SOF. HC must check this bit before it starts processing the list."]
213 #[inline(always)]
214 pub fn periodic_list_enable(&self) -> PERIODIC_LIST_ENABLE_R {
215 PERIODIC_LIST_ENABLE_R::new(((self.bits >> 2) & 1) != 0)
216 }
217 #[doc = "Bit 3 - This bit is set to enable the processing of the Control list in the next Frame. If cleared by HCD, the processing of the Control list does not occur after the next SOF. HC must check this bit whenever it determines to process the list. When disabled, HCD may modify the list. If HcControlCurrentED is pointing to an ED to be removed, HCD must advance the pointer by updating HcControlCurrentED before re-enabling processing of the list."]
218 #[inline(always)]
219 pub fn control_list_enable(&self) -> CONTROL_LIST_ENABLE_R {
220 CONTROL_LIST_ENABLE_R::new(((self.bits >> 3) & 1) != 0)
221 }
222 #[doc = "Bit 3 - This bit is used by HCD to enable/disable processing of isochronous EDs. While processing the periodic list in a Frame, HC checks the status of this bit when it finds an Isochronous ED (F=1). If set (enabled), HC continues processing the EDs. If cleared (disabled), HC halts processing of the periodic list (which now contains only isochronous EDs) and begins processing the Bulk/Control lists. Setting this bit is guaranteed to take effect in the next Frame (not the current Frame)."]
223 #[inline(always)]
224 pub fn isochronous_enable(&self) -> ISOCHRONOUS_ENABLE_R {
225 ISOCHRONOUS_ENABLE_R::new(((self.bits >> 3) & 1) != 0)
226 }
227 #[doc = "Bit 5 - This bit is set to enable the processing of the Bulk list in the next Frame. If cleared by HCD, the processing of the Bulk list does not occur after the next SOF. HC checks this bit whenever it determines to process the list. When disabled, HCD may modify the list. If HcBulkCurrentED is pointing to an ED to be removed, HCD must advance the pointer by updating HcBulkCurrentED before re-enabling processing of the list."]
228 #[inline(always)]
229 pub fn bulk_list_enable(&self) -> BULK_LIST_ENABLE_R {
230 BULK_LIST_ENABLE_R::new(((self.bits >> 5) & 1) != 0)
231 }
232 #[doc = "Bits 6:7 - A transition to USBOperational from another state causes SOF generation to begin 1 ms later. HCD may determine whether HC has begun sending SOFs by reading the StartoFrame field of HcInterruptStatus.\n\nThis field may be changed by HC only when in the USBSUSPEND state. HC may move from the USBSUSPEND state to the USBRESUME state after detecting the resume signaling from a downstream port.\n\nHC enters USBSUSPEND after a software reset, whereas it enters USBRESET after a hardware reset. The latter also resets the Root Hub and asserts subsequent reset signaling to downstream ports."]
233 #[inline(always)]
234 pub fn host_controller_functional_state_for_usb(
235 &self,
236 ) -> HOST_CONTROLLER_FUNCTIONAL_STATE_FOR_USB_R {
237 HOST_CONTROLLER_FUNCTIONAL_STATE_FOR_USB_R::new(((self.bits >> 6) & 3) as u8)
238 }
239 #[doc = "Bit 8 - InterruptRouting This bit determines the routing of interrupts generated by events registered in HcInterruptStatus. If clear, all interrupt are routed to the normal host bus interrupt mechanism. If set interrupts are routed to the System Management Interrupt. HCD clears this bit upon a hardware reset, but it does not alter this bit upon a software reset. HCD uses this bit as a tag to indicate the ownership of HC."]
240 #[inline(always)]
241 pub fn interrupt_routing(&self) -> INTERRUPT_ROUTING_R {
242 INTERRUPT_ROUTING_R::new(((self.bits >> 8) & 1) != 0)
243 }
244 #[doc = "Bit 9 - This bit indicates whether HC supports remote wakeup signaling. If remote wakeup is supported and used by the system, it is the responsibility of system firmware to set this bit during POST. HC clear the bit upon a hardware reset but does not alter it upon a software reset. Remote wakeup signaling of the host system is host-bus-specific and is not described in this specification."]
245 #[inline(always)]
246 pub fn remote_wakeup_connected(&self) -> REMOTE_WAKEUP_CONNECTED_R {
247 REMOTE_WAKEUP_CONNECTED_R::new(((self.bits >> 9) & 1) != 0)
248 }
249 #[doc = "Bit 10 - This bit is used by HCD to enable or disable the remote wakeup feature upon the detection of upstream resume signaling. When this bit is set and the ResumeDetected bit in HcInterruptStatus is set, a remote wakeup is signaled to the host system. Setting this bit has no impact on the generation of hardware interrupt."]
250 #[inline(always)]
251 pub fn remote_wakeup_enable(&self) -> REMOTE_WAKEUP_ENABLE_R {
252 REMOTE_WAKEUP_ENABLE_R::new(((self.bits >> 10) & 1) != 0)
253 }
254}
255impl W {
256 #[doc = "Bits 0:1 - This specifies the service ratio between Control and Bulk EDs. Before processing any of the nonperiodic lists, HC must compare the ratio specified with its internal count on how many nonempty Control EDs have been processed, in determining whether to continue serving another Control ED or switching to Bulk EDs. The internal count will be retained when crossing the frame boundary. In case of reset, HCD is responsible for restoring this value."]
257 #[inline(always)]
258 #[must_use]
259 pub fn control_bulk_service_ratio(&mut self) -> CONTROL_BULK_SERVICE_RATIO_W<HC_CONTROL_SPEC> {
260 CONTROL_BULK_SERVICE_RATIO_W::new(self, 0)
261 }
262 #[doc = "Bit 2 - This bit is set to enable the processing of periodic list in the next Frame. If cleared by HCD, processing of the periodic list does not occur after the next SOF. HC must check this bit before it starts processing the list."]
263 #[inline(always)]
264 #[must_use]
265 pub fn periodic_list_enable(&mut self) -> PERIODIC_LIST_ENABLE_W<HC_CONTROL_SPEC> {
266 PERIODIC_LIST_ENABLE_W::new(self, 2)
267 }
268 #[doc = "Bit 3 - This bit is set to enable the processing of the Control list in the next Frame. If cleared by HCD, the processing of the Control list does not occur after the next SOF. HC must check this bit whenever it determines to process the list. When disabled, HCD may modify the list. If HcControlCurrentED is pointing to an ED to be removed, HCD must advance the pointer by updating HcControlCurrentED before re-enabling processing of the list."]
269 #[inline(always)]
270 #[must_use]
271 pub fn control_list_enable(&mut self) -> CONTROL_LIST_ENABLE_W<HC_CONTROL_SPEC> {
272 CONTROL_LIST_ENABLE_W::new(self, 3)
273 }
274 #[doc = "Bit 3 - This bit is used by HCD to enable/disable processing of isochronous EDs. While processing the periodic list in a Frame, HC checks the status of this bit when it finds an Isochronous ED (F=1). If set (enabled), HC continues processing the EDs. If cleared (disabled), HC halts processing of the periodic list (which now contains only isochronous EDs) and begins processing the Bulk/Control lists. Setting this bit is guaranteed to take effect in the next Frame (not the current Frame)."]
275 #[inline(always)]
276 #[must_use]
277 pub fn isochronous_enable(&mut self) -> ISOCHRONOUS_ENABLE_W<HC_CONTROL_SPEC> {
278 ISOCHRONOUS_ENABLE_W::new(self, 3)
279 }
280 #[doc = "Bit 5 - This bit is set to enable the processing of the Bulk list in the next Frame. If cleared by HCD, the processing of the Bulk list does not occur after the next SOF. HC checks this bit whenever it determines to process the list. When disabled, HCD may modify the list. If HcBulkCurrentED is pointing to an ED to be removed, HCD must advance the pointer by updating HcBulkCurrentED before re-enabling processing of the list."]
281 #[inline(always)]
282 #[must_use]
283 pub fn bulk_list_enable(&mut self) -> BULK_LIST_ENABLE_W<HC_CONTROL_SPEC> {
284 BULK_LIST_ENABLE_W::new(self, 5)
285 }
286 #[doc = "Bits 6:7 - A transition to USBOperational from another state causes SOF generation to begin 1 ms later. HCD may determine whether HC has begun sending SOFs by reading the StartoFrame field of HcInterruptStatus.\n\nThis field may be changed by HC only when in the USBSUSPEND state. HC may move from the USBSUSPEND state to the USBRESUME state after detecting the resume signaling from a downstream port.\n\nHC enters USBSUSPEND after a software reset, whereas it enters USBRESET after a hardware reset. The latter also resets the Root Hub and asserts subsequent reset signaling to downstream ports."]
287 #[inline(always)]
288 #[must_use]
289 pub fn host_controller_functional_state_for_usb(
290 &mut self,
291 ) -> HOST_CONTROLLER_FUNCTIONAL_STATE_FOR_USB_W<HC_CONTROL_SPEC> {
292 HOST_CONTROLLER_FUNCTIONAL_STATE_FOR_USB_W::new(self, 6)
293 }
294 #[doc = "Bit 8 - InterruptRouting This bit determines the routing of interrupts generated by events registered in HcInterruptStatus. If clear, all interrupt are routed to the normal host bus interrupt mechanism. If set interrupts are routed to the System Management Interrupt. HCD clears this bit upon a hardware reset, but it does not alter this bit upon a software reset. HCD uses this bit as a tag to indicate the ownership of HC."]
295 #[inline(always)]
296 #[must_use]
297 pub fn interrupt_routing(&mut self) -> INTERRUPT_ROUTING_W<HC_CONTROL_SPEC> {
298 INTERRUPT_ROUTING_W::new(self, 8)
299 }
300 #[doc = "Bit 9 - This bit indicates whether HC supports remote wakeup signaling. If remote wakeup is supported and used by the system, it is the responsibility of system firmware to set this bit during POST. HC clear the bit upon a hardware reset but does not alter it upon a software reset. Remote wakeup signaling of the host system is host-bus-specific and is not described in this specification."]
301 #[inline(always)]
302 #[must_use]
303 pub fn remote_wakeup_connected(&mut self) -> REMOTE_WAKEUP_CONNECTED_W<HC_CONTROL_SPEC> {
304 REMOTE_WAKEUP_CONNECTED_W::new(self, 9)
305 }
306 #[doc = "Bit 10 - This bit is used by HCD to enable or disable the remote wakeup feature upon the detection of upstream resume signaling. When this bit is set and the ResumeDetected bit in HcInterruptStatus is set, a remote wakeup is signaled to the host system. Setting this bit has no impact on the generation of hardware interrupt."]
307 #[inline(always)]
308 #[must_use]
309 pub fn remote_wakeup_enable(&mut self) -> REMOTE_WAKEUP_ENABLE_W<HC_CONTROL_SPEC> {
310 REMOTE_WAKEUP_ENABLE_W::new(self, 10)
311 }
312 #[doc = r" Writes raw bits to the register."]
313 #[doc = r""]
314 #[doc = r" # Safety"]
315 #[doc = r""]
316 #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
317 #[inline(always)]
318 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
319 self.bits = bits;
320 self
321 }
322}
323#[doc = "OHCI Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hc_control::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hc_control::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
324pub struct HC_CONTROL_SPEC;
325impl crate::RegisterSpec for HC_CONTROL_SPEC {
326 type Ux = u32;
327}
328#[doc = "`read()` method returns [`hc_control::R`](R) reader structure"]
329impl crate::Readable for HC_CONTROL_SPEC {}
330#[doc = "`write(|w| ..)` method takes [`hc_control::W`](W) writer structure"]
331impl crate::Writable for HC_CONTROL_SPEC {
332 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
333 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
334}
335#[doc = "`reset()` method sets hc_control to value 0"]
336impl crate::Resettable for HC_CONTROL_SPEC {
337 const RESET_VALUE: Self::Ux = 0;
338}