d1_pac/uart/
mcr.rs

1#[doc = "Register `mcr` reader"]
2pub type R = crate::R<MCR_SPEC>;
3#[doc = "Register `mcr` writer"]
4pub type W = crate::W<MCR_SPEC>;
5#[doc = "Field `dtr` reader - Data Terminal Ready"]
6pub type DTR_R = crate::BitReader<DTR_A>;
7#[doc = "Data Terminal Ready\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum DTR_A {
10    #[doc = "0: `0`"]
11    DEASSERTED = 0,
12    #[doc = "1: `1`"]
13    ASSERTED = 1,
14}
15impl From<DTR_A> for bool {
16    #[inline(always)]
17    fn from(variant: DTR_A) -> Self {
18        variant as u8 != 0
19    }
20}
21impl DTR_R {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> DTR_A {
25        match self.bits {
26            false => DTR_A::DEASSERTED,
27            true => DTR_A::ASSERTED,
28        }
29    }
30    #[doc = "`0`"]
31    #[inline(always)]
32    pub fn is_deasserted(&self) -> bool {
33        *self == DTR_A::DEASSERTED
34    }
35    #[doc = "`1`"]
36    #[inline(always)]
37    pub fn is_asserted(&self) -> bool {
38        *self == DTR_A::ASSERTED
39    }
40}
41#[doc = "Field `dtr` writer - Data Terminal Ready"]
42pub type DTR_W<'a, REG> = crate::BitWriter<'a, REG, DTR_A>;
43impl<'a, REG> DTR_W<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    #[doc = "`0`"]
48    #[inline(always)]
49    pub fn deasserted(self) -> &'a mut crate::W<REG> {
50        self.variant(DTR_A::DEASSERTED)
51    }
52    #[doc = "`1`"]
53    #[inline(always)]
54    pub fn asserted(self) -> &'a mut crate::W<REG> {
55        self.variant(DTR_A::ASSERTED)
56    }
57}
58#[doc = "Field `rts` reader - Request to Send"]
59pub type RTS_R = crate::BitReader<RTS_A>;
60#[doc = "Request to Send\n\nValue on reset: 0"]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum RTS_A {
63    #[doc = "0: `0`"]
64    DEASSERTED = 0,
65    #[doc = "1: `1`"]
66    ASSERTED = 1,
67}
68impl From<RTS_A> for bool {
69    #[inline(always)]
70    fn from(variant: RTS_A) -> Self {
71        variant as u8 != 0
72    }
73}
74impl RTS_R {
75    #[doc = "Get enumerated values variant"]
76    #[inline(always)]
77    pub const fn variant(&self) -> RTS_A {
78        match self.bits {
79            false => RTS_A::DEASSERTED,
80            true => RTS_A::ASSERTED,
81        }
82    }
83    #[doc = "`0`"]
84    #[inline(always)]
85    pub fn is_deasserted(&self) -> bool {
86        *self == RTS_A::DEASSERTED
87    }
88    #[doc = "`1`"]
89    #[inline(always)]
90    pub fn is_asserted(&self) -> bool {
91        *self == RTS_A::ASSERTED
92    }
93}
94#[doc = "Field `rts` writer - Request to Send"]
95pub type RTS_W<'a, REG> = crate::BitWriter<'a, REG, RTS_A>;
96impl<'a, REG> RTS_W<'a, REG>
97where
98    REG: crate::Writable + crate::RegisterSpec,
99{
100    #[doc = "`0`"]
101    #[inline(always)]
102    pub fn deasserted(self) -> &'a mut crate::W<REG> {
103        self.variant(RTS_A::DEASSERTED)
104    }
105    #[doc = "`1`"]
106    #[inline(always)]
107    pub fn asserted(self) -> &'a mut crate::W<REG> {
108        self.variant(RTS_A::ASSERTED)
109    }
110}
111#[doc = "Field `loop` reader - Loop Back Mode"]
112pub type LOOP_R = crate::BitReader<LOOP_A>;
113#[doc = "Loop Back Mode\n\nValue on reset: 0"]
114#[derive(Clone, Copy, Debug, PartialEq, Eq)]
115pub enum LOOP_A {
116    #[doc = "0: `0`"]
117    NORMAL = 0,
118    #[doc = "1: `1`"]
119    LOOP_BACK = 1,
120}
121impl From<LOOP_A> for bool {
122    #[inline(always)]
123    fn from(variant: LOOP_A) -> Self {
124        variant as u8 != 0
125    }
126}
127impl LOOP_R {
128    #[doc = "Get enumerated values variant"]
129    #[inline(always)]
130    pub const fn variant(&self) -> LOOP_A {
131        match self.bits {
132            false => LOOP_A::NORMAL,
133            true => LOOP_A::LOOP_BACK,
134        }
135    }
136    #[doc = "`0`"]
137    #[inline(always)]
138    pub fn is_normal(&self) -> bool {
139        *self == LOOP_A::NORMAL
140    }
141    #[doc = "`1`"]
142    #[inline(always)]
143    pub fn is_loop_back(&self) -> bool {
144        *self == LOOP_A::LOOP_BACK
145    }
146}
147#[doc = "Field `loop` writer - Loop Back Mode"]
148pub type LOOP_W<'a, REG> = crate::BitWriter<'a, REG, LOOP_A>;
149impl<'a, REG> LOOP_W<'a, REG>
150where
151    REG: crate::Writable + crate::RegisterSpec,
152{
153    #[doc = "`0`"]
154    #[inline(always)]
155    pub fn normal(self) -> &'a mut crate::W<REG> {
156        self.variant(LOOP_A::NORMAL)
157    }
158    #[doc = "`1`"]
159    #[inline(always)]
160    pub fn loop_back(self) -> &'a mut crate::W<REG> {
161        self.variant(LOOP_A::LOOP_BACK)
162    }
163}
164#[doc = "Field `afce` reader - Auto Flow Control Enable"]
165pub type AFCE_R = crate::BitReader<AFCE_A>;
166#[doc = "Auto Flow Control Enable\n\nValue on reset: 0"]
167#[derive(Clone, Copy, Debug, PartialEq, Eq)]
168pub enum AFCE_A {
169    #[doc = "0: `0`"]
170    DISABLED = 0,
171    #[doc = "1: `1`"]
172    ENABLED = 1,
173}
174impl From<AFCE_A> for bool {
175    #[inline(always)]
176    fn from(variant: AFCE_A) -> Self {
177        variant as u8 != 0
178    }
179}
180impl AFCE_R {
181    #[doc = "Get enumerated values variant"]
182    #[inline(always)]
183    pub const fn variant(&self) -> AFCE_A {
184        match self.bits {
185            false => AFCE_A::DISABLED,
186            true => AFCE_A::ENABLED,
187        }
188    }
189    #[doc = "`0`"]
190    #[inline(always)]
191    pub fn is_disabled(&self) -> bool {
192        *self == AFCE_A::DISABLED
193    }
194    #[doc = "`1`"]
195    #[inline(always)]
196    pub fn is_enabled(&self) -> bool {
197        *self == AFCE_A::ENABLED
198    }
199}
200#[doc = "Field `afce` writer - Auto Flow Control Enable"]
201pub type AFCE_W<'a, REG> = crate::BitWriter<'a, REG, AFCE_A>;
202impl<'a, REG> AFCE_W<'a, REG>
203where
204    REG: crate::Writable + crate::RegisterSpec,
205{
206    #[doc = "`0`"]
207    #[inline(always)]
208    pub fn disabled(self) -> &'a mut crate::W<REG> {
209        self.variant(AFCE_A::DISABLED)
210    }
211    #[doc = "`1`"]
212    #[inline(always)]
213    pub fn enabled(self) -> &'a mut crate::W<REG> {
214        self.variant(AFCE_A::ENABLED)
215    }
216}
217#[doc = "Field `function` reader - UART Function: Select IrDA or RS485"]
218pub type FUNCTION_R = crate::FieldReader<FUNCTION_A>;
219#[doc = "UART Function: Select IrDA or RS485\n\nValue on reset: 0"]
220#[derive(Clone, Copy, Debug, PartialEq, Eq)]
221#[repr(u8)]
222pub enum FUNCTION_A {
223    #[doc = "0: `0`"]
224    UART = 0,
225    #[doc = "1: `1`"]
226    IR_DA_SIR = 1,
227    #[doc = "2: `10`"]
228    RS485 = 2,
229}
230impl From<FUNCTION_A> for u8 {
231    #[inline(always)]
232    fn from(variant: FUNCTION_A) -> Self {
233        variant as _
234    }
235}
236impl crate::FieldSpec for FUNCTION_A {
237    type Ux = u8;
238}
239impl FUNCTION_R {
240    #[doc = "Get enumerated values variant"]
241    #[inline(always)]
242    pub const fn variant(&self) -> FUNCTION_A {
243        match self.bits {
244            0 => FUNCTION_A::UART,
245            1 => FUNCTION_A::IR_DA_SIR,
246            2 => FUNCTION_A::RS485,
247            _ => unreachable!(),
248        }
249    }
250    #[doc = "`0`"]
251    #[inline(always)]
252    pub fn is_uart(&self) -> bool {
253        *self == FUNCTION_A::UART
254    }
255    #[doc = "`1`"]
256    #[inline(always)]
257    pub fn is_ir_da_sir(&self) -> bool {
258        *self == FUNCTION_A::IR_DA_SIR
259    }
260    #[doc = "`10`"]
261    #[inline(always)]
262    pub fn is_rs485(&self) -> bool {
263        *self == FUNCTION_A::RS485
264    }
265}
266#[doc = "Field `function` writer - UART Function: Select IrDA or RS485"]
267pub type FUNCTION_W<'a, REG> = crate::FieldWriter<'a, REG, 2, FUNCTION_A>;
268impl<'a, REG> FUNCTION_W<'a, REG>
269where
270    REG: crate::Writable + crate::RegisterSpec,
271    REG::Ux: From<u8>,
272{
273    #[doc = "`0`"]
274    #[inline(always)]
275    pub fn uart(self) -> &'a mut crate::W<REG> {
276        self.variant(FUNCTION_A::UART)
277    }
278    #[doc = "`1`"]
279    #[inline(always)]
280    pub fn ir_da_sir(self) -> &'a mut crate::W<REG> {
281        self.variant(FUNCTION_A::IR_DA_SIR)
282    }
283    #[doc = "`10`"]
284    #[inline(always)]
285    pub fn rs485(self) -> &'a mut crate::W<REG> {
286        self.variant(FUNCTION_A::RS485)
287    }
288}
289impl R {
290    #[doc = "Bit 0 - Data Terminal Ready"]
291    #[inline(always)]
292    pub fn dtr(&self) -> DTR_R {
293        DTR_R::new((self.bits & 1) != 0)
294    }
295    #[doc = "Bit 1 - Request to Send"]
296    #[inline(always)]
297    pub fn rts(&self) -> RTS_R {
298        RTS_R::new(((self.bits >> 1) & 1) != 0)
299    }
300    #[doc = "Bit 4 - Loop Back Mode"]
301    #[inline(always)]
302    pub fn loop_(&self) -> LOOP_R {
303        LOOP_R::new(((self.bits >> 4) & 1) != 0)
304    }
305    #[doc = "Bit 5 - Auto Flow Control Enable"]
306    #[inline(always)]
307    pub fn afce(&self) -> AFCE_R {
308        AFCE_R::new(((self.bits >> 5) & 1) != 0)
309    }
310    #[doc = "Bits 6:7 - UART Function: Select IrDA or RS485"]
311    #[inline(always)]
312    pub fn function(&self) -> FUNCTION_R {
313        FUNCTION_R::new(((self.bits >> 6) & 3) as u8)
314    }
315}
316impl W {
317    #[doc = "Bit 0 - Data Terminal Ready"]
318    #[inline(always)]
319    #[must_use]
320    pub fn dtr(&mut self) -> DTR_W<MCR_SPEC> {
321        DTR_W::new(self, 0)
322    }
323    #[doc = "Bit 1 - Request to Send"]
324    #[inline(always)]
325    #[must_use]
326    pub fn rts(&mut self) -> RTS_W<MCR_SPEC> {
327        RTS_W::new(self, 1)
328    }
329    #[doc = "Bit 4 - Loop Back Mode"]
330    #[inline(always)]
331    #[must_use]
332    pub fn loop_(&mut self) -> LOOP_W<MCR_SPEC> {
333        LOOP_W::new(self, 4)
334    }
335    #[doc = "Bit 5 - Auto Flow Control Enable"]
336    #[inline(always)]
337    #[must_use]
338    pub fn afce(&mut self) -> AFCE_W<MCR_SPEC> {
339        AFCE_W::new(self, 5)
340    }
341    #[doc = "Bits 6:7 - UART Function: Select IrDA or RS485"]
342    #[inline(always)]
343    #[must_use]
344    pub fn function(&mut self) -> FUNCTION_W<MCR_SPEC> {
345        FUNCTION_W::new(self, 6)
346    }
347    #[doc = r" Writes raw bits to the register."]
348    #[doc = r""]
349    #[doc = r" # Safety"]
350    #[doc = r""]
351    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
352    #[inline(always)]
353    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
354        self.bits = bits;
355        self
356    }
357}
358#[doc = "UART Modem Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mcr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
359pub struct MCR_SPEC;
360impl crate::RegisterSpec for MCR_SPEC {
361    type Ux = u32;
362}
363#[doc = "`read()` method returns [`mcr::R`](R) reader structure"]
364impl crate::Readable for MCR_SPEC {}
365#[doc = "`write(|w| ..)` method takes [`mcr::W`](W) writer structure"]
366impl crate::Writable for MCR_SPEC {
367    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
368    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
369}
370#[doc = "`reset()` method sets mcr to value 0"]
371impl crate::Resettable for MCR_SPEC {
372    const RESET_VALUE: Self::Ux = 0;
373}
d1_pac/uart/mcr.rs

d1_pac/uart/
mcr.rs
