d1_pac/twi/
twi_drv_slv.rs

1#[doc = "Register `twi_drv_slv` reader"]
2pub type R = crate::R<TWI_DRV_SLV_SPEC>;
3#[doc = "Register `twi_drv_slv` writer"]
4pub type W = crate::W<TWI_DRV_SLV_SPEC>;
5#[doc = "Field `slv_id_x` reader - SLAX\\[7:0\\]"]
6pub type SLV_ID_X_R = crate::FieldReader;
7#[doc = "Field `slv_id_x` writer - SLAX\\[7:0\\]"]
8pub type SLV_ID_X_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9#[doc = "Field `cmd` reader - R/W operation to slave device"]
10pub type CMD_R = crate::BitReader<CMD_A>;
11#[doc = "R/W operation to slave device\n\nValue on reset: 0"]
12#[derive(Clone, Copy, Debug, PartialEq, Eq)]
13pub enum CMD_A {
14    #[doc = "0: `0`"]
15    WRITE = 0,
16    #[doc = "1: `1`"]
17    READ = 1,
18}
19impl From<CMD_A> for bool {
20    #[inline(always)]
21    fn from(variant: CMD_A) -> Self {
22        variant as u8 != 0
23    }
24}
25impl CMD_R {
26    #[doc = "Get enumerated values variant"]
27    #[inline(always)]
28    pub const fn variant(&self) -> CMD_A {
29        match self.bits {
30            false => CMD_A::WRITE,
31            true => CMD_A::READ,
32        }
33    }
34    #[doc = "`0`"]
35    #[inline(always)]
36    pub fn is_write(&self) -> bool {
37        *self == CMD_A::WRITE
38    }
39    #[doc = "`1`"]
40    #[inline(always)]
41    pub fn is_read(&self) -> bool {
42        *self == CMD_A::READ
43    }
44}
45#[doc = "Field `cmd` writer - R/W operation to slave device"]
46pub type CMD_W<'a, REG> = crate::BitWriter<'a, REG, CMD_A>;
47impl<'a, REG> CMD_W<'a, REG>
48where
49    REG: crate::Writable + crate::RegisterSpec,
50{
51    #[doc = "`0`"]
52    #[inline(always)]
53    pub fn write(self) -> &'a mut crate::W<REG> {
54        self.variant(CMD_A::WRITE)
55    }
56    #[doc = "`1`"]
57    #[inline(always)]
58    pub fn read(self) -> &'a mut crate::W<REG> {
59        self.variant(CMD_A::READ)
60    }
61}
62#[doc = "Field `slv_id` reader - Slave device ID"]
63pub type SLV_ID_R = crate::FieldReader;
64#[doc = "Field `slv_id` writer - Slave device ID"]
65pub type SLV_ID_W<'a, REG> = crate::FieldWriter<'a, REG, 7>;
66impl R {
67    #[doc = "Bits 0:7 - SLAX\\[7:0\\]"]
68    #[inline(always)]
69    pub fn slv_id_x(&self) -> SLV_ID_X_R {
70        SLV_ID_X_R::new((self.bits & 0xff) as u8)
71    }
72    #[doc = "Bit 8 - R/W operation to slave device"]
73    #[inline(always)]
74    pub fn cmd(&self) -> CMD_R {
75        CMD_R::new(((self.bits >> 8) & 1) != 0)
76    }
77    #[doc = "Bits 9:15 - Slave device ID"]
78    #[inline(always)]
79    pub fn slv_id(&self) -> SLV_ID_R {
80        SLV_ID_R::new(((self.bits >> 9) & 0x7f) as u8)
81    }
82}
83impl W {
84    #[doc = "Bits 0:7 - SLAX\\[7:0\\]"]
85    #[inline(always)]
86    #[must_use]
87    pub fn slv_id_x(&mut self) -> SLV_ID_X_W<TWI_DRV_SLV_SPEC> {
88        SLV_ID_X_W::new(self, 0)
89    }
90    #[doc = "Bit 8 - R/W operation to slave device"]
91    #[inline(always)]
92    #[must_use]
93    pub fn cmd(&mut self) -> CMD_W<TWI_DRV_SLV_SPEC> {
94        CMD_W::new(self, 8)
95    }
96    #[doc = "Bits 9:15 - Slave device ID"]
97    #[inline(always)]
98    #[must_use]
99    pub fn slv_id(&mut self) -> SLV_ID_W<TWI_DRV_SLV_SPEC> {
100        SLV_ID_W::new(self, 9)
101    }
102    #[doc = r" Writes raw bits to the register."]
103    #[doc = r""]
104    #[doc = r" # Safety"]
105    #[doc = r""]
106    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
107    #[inline(always)]
108    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
109        self.bits = bits;
110        self
111    }
112}
113#[doc = "TWI_DRV Slave ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`twi_drv_slv::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`twi_drv_slv::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
114pub struct TWI_DRV_SLV_SPEC;
115impl crate::RegisterSpec for TWI_DRV_SLV_SPEC {
116    type Ux = u32;
117}
118#[doc = "`read()` method returns [`twi_drv_slv::R`](R) reader structure"]
119impl crate::Readable for TWI_DRV_SLV_SPEC {}
120#[doc = "`write(|w| ..)` method takes [`twi_drv_slv::W`](W) writer structure"]
121impl crate::Writable for TWI_DRV_SLV_SPEC {
122    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
123    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
124}
125#[doc = "`reset()` method sets twi_drv_slv to value 0"]
126impl crate::Resettable for TWI_DRV_SLV_SPEC {
127    const RESET_VALUE: Self::Ux = 0;
128}
d1_pac/twi/twi_drv_slv.rs

d1_pac/twi/
twi_drv_slv.rs
