d1_pac/tve_top/
tve_dac_test.rs1#[doc = "Register `tve_dac_test` reader"]
2pub type R = crate::R<TVE_DAC_TEST_SPEC>;
3#[doc = "Register `tve_dac_test` writer"]
4pub type W = crate::W<TVE_DAC_TEST_SPEC>;
5#[doc = "Field `dac_test_enable` reader - "]
6pub type DAC_TEST_ENABLE_R = crate::BitReader<DAC_TEST_ENABLE_A>;
7#[doc = "\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum DAC_TEST_ENABLE_A {
10 #[doc = "1: Repeat DAC data from DAC sram"]
11 R_EPEAT = 1,
12}
13impl From<DAC_TEST_ENABLE_A> for bool {
14 #[inline(always)]
15 fn from(variant: DAC_TEST_ENABLE_A) -> Self {
16 variant as u8 != 0
17 }
18}
19impl DAC_TEST_ENABLE_R {
20 #[doc = "Get enumerated values variant"]
21 #[inline(always)]
22 pub const fn variant(&self) -> Option<DAC_TEST_ENABLE_A> {
23 match self.bits {
24 true => Some(DAC_TEST_ENABLE_A::R_EPEAT),
25 _ => None,
26 }
27 }
28 #[doc = "Repeat DAC data from DAC sram"]
29 #[inline(always)]
30 pub fn is_r_epeat(&self) -> bool {
31 *self == DAC_TEST_ENABLE_A::R_EPEAT
32 }
33}
34#[doc = "Field `dac_test_enable` writer - "]
35pub type DAC_TEST_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG, DAC_TEST_ENABLE_A>;
36impl<'a, REG> DAC_TEST_ENABLE_W<'a, REG>
37where
38 REG: crate::Writable + crate::RegisterSpec,
39{
40 #[doc = "Repeat DAC data from DAC sram"]
41 #[inline(always)]
42 pub fn r_epeat(self) -> &'a mut crate::W<REG> {
43 self.variant(DAC_TEST_ENABLE_A::R_EPEAT)
44 }
45}
46#[doc = "Field `dac_test_sel` reader - "]
47pub type DAC_TEST_SEL_R = crate::FieldReader<DAC_TEST_SEL_A>;
48#[doc = "\n\nValue on reset: 0"]
49#[derive(Clone, Copy, Debug, PartialEq, Eq)]
50#[repr(u8)]
51pub enum DAC_TEST_SEL_A {
52 #[doc = "0: DAC0"]
53 DAC0 = 0,
54}
55impl From<DAC_TEST_SEL_A> for u8 {
56 #[inline(always)]
57 fn from(variant: DAC_TEST_SEL_A) -> Self {
58 variant as _
59 }
60}
61impl crate::FieldSpec for DAC_TEST_SEL_A {
62 type Ux = u8;
63}
64impl DAC_TEST_SEL_R {
65 #[doc = "Get enumerated values variant"]
66 #[inline(always)]
67 pub const fn variant(&self) -> Option<DAC_TEST_SEL_A> {
68 match self.bits {
69 0 => Some(DAC_TEST_SEL_A::DAC0),
70 _ => None,
71 }
72 }
73 #[doc = "DAC0"]
74 #[inline(always)]
75 pub fn is_dac0(&self) -> bool {
76 *self == DAC_TEST_SEL_A::DAC0
77 }
78}
79#[doc = "Field `dac_test_sel` writer - "]
80pub type DAC_TEST_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2, DAC_TEST_SEL_A>;
81impl<'a, REG> DAC_TEST_SEL_W<'a, REG>
82where
83 REG: crate::Writable + crate::RegisterSpec,
84 REG::Ux: From<u8>,
85{
86 #[doc = "DAC0"]
87 #[inline(always)]
88 pub fn dac0(self) -> &'a mut crate::W<REG> {
89 self.variant(DAC_TEST_SEL_A::DAC0)
90 }
91}
92#[doc = "Field `dac_test_length` reader - DAC TEST DATA LENGTH"]
93pub type DAC_TEST_LENGTH_R = crate::FieldReader<u16>;
94#[doc = "Field `dac_test_length` writer - DAC TEST DATA LENGTH"]
95pub type DAC_TEST_LENGTH_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>;
96impl R {
97 #[doc = "Bit 0"]
98 #[inline(always)]
99 pub fn dac_test_enable(&self) -> DAC_TEST_ENABLE_R {
100 DAC_TEST_ENABLE_R::new((self.bits & 1) != 0)
101 }
102 #[doc = "Bits 4:5"]
103 #[inline(always)]
104 pub fn dac_test_sel(&self) -> DAC_TEST_SEL_R {
105 DAC_TEST_SEL_R::new(((self.bits >> 4) & 3) as u8)
106 }
107 #[doc = "Bits 16:25 - DAC TEST DATA LENGTH"]
108 #[inline(always)]
109 pub fn dac_test_length(&self) -> DAC_TEST_LENGTH_R {
110 DAC_TEST_LENGTH_R::new(((self.bits >> 16) & 0x03ff) as u16)
111 }
112}
113impl W {
114 #[doc = "Bit 0"]
115 #[inline(always)]
116 #[must_use]
117 pub fn dac_test_enable(&mut self) -> DAC_TEST_ENABLE_W<TVE_DAC_TEST_SPEC> {
118 DAC_TEST_ENABLE_W::new(self, 0)
119 }
120 #[doc = "Bits 4:5"]
121 #[inline(always)]
122 #[must_use]
123 pub fn dac_test_sel(&mut self) -> DAC_TEST_SEL_W<TVE_DAC_TEST_SPEC> {
124 DAC_TEST_SEL_W::new(self, 4)
125 }
126 #[doc = "Bits 16:25 - DAC TEST DATA LENGTH"]
127 #[inline(always)]
128 #[must_use]
129 pub fn dac_test_length(&mut self) -> DAC_TEST_LENGTH_W<TVE_DAC_TEST_SPEC> {
130 DAC_TEST_LENGTH_W::new(self, 16)
131 }
132 #[doc = r" Writes raw bits to the register."]
133 #[doc = r""]
134 #[doc = r" # Safety"]
135 #[doc = r""]
136 #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
137 #[inline(always)]
138 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
139 self.bits = bits;
140 self
141 }
142}
143#[doc = "TV Encoder DAC TEST Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tve_dac_test::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tve_dac_test::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
144pub struct TVE_DAC_TEST_SPEC;
145impl crate::RegisterSpec for TVE_DAC_TEST_SPEC {
146 type Ux = u32;
147}
148#[doc = "`read()` method returns [`tve_dac_test::R`](R) reader structure"]
149impl crate::Readable for TVE_DAC_TEST_SPEC {}
150#[doc = "`write(|w| ..)` method takes [`tve_dac_test::W`](W) writer structure"]
151impl crate::Writable for TVE_DAC_TEST_SPEC {
152 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
153 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
154}
155#[doc = "`reset()` method sets tve_dac_test to value 0"]
156impl crate::Resettable for TVE_DAC_TEST_SPEC {
157 const RESET_VALUE: Self::Ux = 0;
158}