d1_pac/tve/
tve_notch_width_comp_yuv_en.rs

1#[doc = "Register `tve_notch_width_comp_yuv_en` reader"]
2pub type R = crate::R<TVE_NOTCH_WIDTH_COMP_YUV_EN_SPEC>;
3#[doc = "Register `tve_notch_width_comp_yuv_en` writer"]
4pub type W = crate::W<TVE_NOTCH_WIDTH_COMP_YUV_EN_SPEC>;
5#[doc = "Field `comp_yuv_en` reader - This bit selects if the components video output are the RGB components or the YUV components."]
6pub type COMP_YUV_EN_R = crate::BitReader<COMP_YUV_EN_A>;
7#[doc = "This bit selects if the components video output are the RGB components or the YUV components.\n\nValue on reset: 1"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum COMP_YUV_EN_A {
10    #[doc = "0: The three component outputs are the RGB components."]
11    RGB = 0,
12    #[doc = "1: The three component outputs are the YUV components, (i.e. the color conversion unit is bypassed)"]
13    YUV = 1,
14}
15impl From<COMP_YUV_EN_A> for bool {
16    #[inline(always)]
17    fn from(variant: COMP_YUV_EN_A) -> Self {
18        variant as u8 != 0
19    }
20}
21impl COMP_YUV_EN_R {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> COMP_YUV_EN_A {
25        match self.bits {
26            false => COMP_YUV_EN_A::RGB,
27            true => COMP_YUV_EN_A::YUV,
28        }
29    }
30    #[doc = "The three component outputs are the RGB components."]
31    #[inline(always)]
32    pub fn is_rgb(&self) -> bool {
33        *self == COMP_YUV_EN_A::RGB
34    }
35    #[doc = "The three component outputs are the YUV components, (i.e. the color conversion unit is bypassed)"]
36    #[inline(always)]
37    pub fn is_yuv(&self) -> bool {
38        *self == COMP_YUV_EN_A::YUV
39    }
40}
41#[doc = "Field `comp_yuv_en` writer - This bit selects if the components video output are the RGB components or the YUV components."]
42pub type COMP_YUV_EN_W<'a, REG> = crate::BitWriter<'a, REG, COMP_YUV_EN_A>;
43impl<'a, REG> COMP_YUV_EN_W<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    #[doc = "The three component outputs are the RGB components."]
48    #[inline(always)]
49    pub fn rgb(self) -> &'a mut crate::W<REG> {
50        self.variant(COMP_YUV_EN_A::RGB)
51    }
52    #[doc = "The three component outputs are the YUV components, (i.e. the color conversion unit is bypassed)"]
53    #[inline(always)]
54    pub fn yuv(self) -> &'a mut crate::W<REG> {
55        self.variant(COMP_YUV_EN_A::YUV)
56    }
57}
58#[doc = "Field `notch_width` reader - Luma notch filter width selection\n\nThis bit selects the luma notch filter (which is a band-reject filter) width."]
59pub type NOTCH_WIDTH_R = crate::BitReader<NOTCH_WIDTH_A>;
60#[doc = "Luma notch filter width selection\n\nThis bit selects the luma notch filter (which is a band-reject filter) width.\n\nValue on reset: 1"]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum NOTCH_WIDTH_A {
63    #[doc = "0: Narrow"]
64    N_ARROW = 0,
65    #[doc = "1: Wide"]
66    W_IDE = 1,
67}
68impl From<NOTCH_WIDTH_A> for bool {
69    #[inline(always)]
70    fn from(variant: NOTCH_WIDTH_A) -> Self {
71        variant as u8 != 0
72    }
73}
74impl NOTCH_WIDTH_R {
75    #[doc = "Get enumerated values variant"]
76    #[inline(always)]
77    pub const fn variant(&self) -> NOTCH_WIDTH_A {
78        match self.bits {
79            false => NOTCH_WIDTH_A::N_ARROW,
80            true => NOTCH_WIDTH_A::W_IDE,
81        }
82    }
83    #[doc = "Narrow"]
84    #[inline(always)]
85    pub fn is_n_arrow(&self) -> bool {
86        *self == NOTCH_WIDTH_A::N_ARROW
87    }
88    #[doc = "Wide"]
89    #[inline(always)]
90    pub fn is_w_ide(&self) -> bool {
91        *self == NOTCH_WIDTH_A::W_IDE
92    }
93}
94#[doc = "Field `notch_width` writer - Luma notch filter width selection\n\nThis bit selects the luma notch filter (which is a band-reject filter) width."]
95pub type NOTCH_WIDTH_W<'a, REG> = crate::BitWriter<'a, REG, NOTCH_WIDTH_A>;
96impl<'a, REG> NOTCH_WIDTH_W<'a, REG>
97where
98    REG: crate::Writable + crate::RegisterSpec,
99{
100    #[doc = "Narrow"]
101    #[inline(always)]
102    pub fn n_arrow(self) -> &'a mut crate::W<REG> {
103        self.variant(NOTCH_WIDTH_A::N_ARROW)
104    }
105    #[doc = "Wide"]
106    #[inline(always)]
107    pub fn w_ide(self) -> &'a mut crate::W<REG> {
108        self.variant(NOTCH_WIDTH_A::W_IDE)
109    }
110}
111impl R {
112    #[doc = "Bit 0 - This bit selects if the components video output are the RGB components or the YUV components."]
113    #[inline(always)]
114    pub fn comp_yuv_en(&self) -> COMP_YUV_EN_R {
115        COMP_YUV_EN_R::new((self.bits & 1) != 0)
116    }
117    #[doc = "Bit 8 - Luma notch filter width selection\n\nThis bit selects the luma notch filter (which is a band-reject filter) width."]
118    #[inline(always)]
119    pub fn notch_width(&self) -> NOTCH_WIDTH_R {
120        NOTCH_WIDTH_R::new(((self.bits >> 8) & 1) != 0)
121    }
122}
123impl W {
124    #[doc = "Bit 0 - This bit selects if the components video output are the RGB components or the YUV components."]
125    #[inline(always)]
126    #[must_use]
127    pub fn comp_yuv_en(&mut self) -> COMP_YUV_EN_W<TVE_NOTCH_WIDTH_COMP_YUV_EN_SPEC> {
128        COMP_YUV_EN_W::new(self, 0)
129    }
130    #[doc = "Bit 8 - Luma notch filter width selection\n\nThis bit selects the luma notch filter (which is a band-reject filter) width."]
131    #[inline(always)]
132    #[must_use]
133    pub fn notch_width(&mut self) -> NOTCH_WIDTH_W<TVE_NOTCH_WIDTH_COMP_YUV_EN_SPEC> {
134        NOTCH_WIDTH_W::new(self, 8)
135    }
136    #[doc = r" Writes raw bits to the register."]
137    #[doc = r""]
138    #[doc = r" # Safety"]
139    #[doc = r""]
140    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
141    #[inline(always)]
142    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
143        self.bits = bits;
144        self
145    }
146}
147#[doc = "TV Encoder Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tve_notch_width_comp_yuv_en::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tve_notch_width_comp_yuv_en::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
148pub struct TVE_NOTCH_WIDTH_COMP_YUV_EN_SPEC;
149impl crate::RegisterSpec for TVE_NOTCH_WIDTH_COMP_YUV_EN_SPEC {
150    type Ux = u32;
151}
152#[doc = "`read()` method returns [`tve_notch_width_comp_yuv_en::R`](R) reader structure"]
153impl crate::Readable for TVE_NOTCH_WIDTH_COMP_YUV_EN_SPEC {}
154#[doc = "`write(|w| ..)` method takes [`tve_notch_width_comp_yuv_en::W`](W) writer structure"]
155impl crate::Writable for TVE_NOTCH_WIDTH_COMP_YUV_EN_SPEC {
156    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
157    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
158}
159#[doc = "`reset()` method sets tve_notch_width_comp_yuv_en to value 0x0101"]
160impl crate::Resettable for TVE_NOTCH_WIDTH_COMP_YUV_EN_SPEC {
161    const RESET_VALUE: Self::Ux = 0x0101;
162}
d1_pac/tve/tve_notch_width_comp_yuv_en.rs

d1_pac/tve/
tve_notch_width_comp_yuv_en.rs
