d1_pac/tve/
tve_dac1.rs

1#[doc = "Register `tve_dac1` reader"]
2pub type R = crate::R<TVE_DAC1_SPEC>;
3#[doc = "Register `tve_dac1` writer"]
4pub type W = crate::W<TVE_DAC1_SPEC>;
5#[doc = "Field `dac0_src_sel` reader - "]
6pub type DAC0_SRC_SEL_R = crate::FieldReader<DAC0_SRC_SEL_A>;
7#[doc = "\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9#[repr(u8)]
10pub enum DAC0_SRC_SEL_A {
11    #[doc = "0: Composite"]
12    C_OMPOSITE = 0,
13}
14impl From<DAC0_SRC_SEL_A> for u8 {
15    #[inline(always)]
16    fn from(variant: DAC0_SRC_SEL_A) -> Self {
17        variant as _
18    }
19}
20impl crate::FieldSpec for DAC0_SRC_SEL_A {
21    type Ux = u8;
22}
23impl DAC0_SRC_SEL_R {
24    #[doc = "Get enumerated values variant"]
25    #[inline(always)]
26    pub const fn variant(&self) -> Option<DAC0_SRC_SEL_A> {
27        match self.bits {
28            0 => Some(DAC0_SRC_SEL_A::C_OMPOSITE),
29            _ => None,
30        }
31    }
32    #[doc = "Composite"]
33    #[inline(always)]
34    pub fn is_c_omposite(&self) -> bool {
35        *self == DAC0_SRC_SEL_A::C_OMPOSITE
36    }
37}
38#[doc = "Field `dac0_src_sel` writer - "]
39pub type DAC0_SRC_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3, DAC0_SRC_SEL_A>;
40impl<'a, REG> DAC0_SRC_SEL_W<'a, REG>
41where
42    REG: crate::Writable + crate::RegisterSpec,
43    REG::Ux: From<u8>,
44{
45    #[doc = "Composite"]
46    #[inline(always)]
47    pub fn c_omposite(self) -> &'a mut crate::W<REG> {
48        self.variant(DAC0_SRC_SEL_A::C_OMPOSITE)
49    }
50}
51impl R {
52    #[doc = "Bits 4:6"]
53    #[inline(always)]
54    pub fn dac0_src_sel(&self) -> DAC0_SRC_SEL_R {
55        DAC0_SRC_SEL_R::new(((self.bits >> 4) & 7) as u8)
56    }
57}
58impl W {
59    #[doc = "Bits 4:6"]
60    #[inline(always)]
61    #[must_use]
62    pub fn dac0_src_sel(&mut self) -> DAC0_SRC_SEL_W<TVE_DAC1_SPEC> {
63        DAC0_SRC_SEL_W::new(self, 4)
64    }
65    #[doc = r" Writes raw bits to the register."]
66    #[doc = r""]
67    #[doc = r" # Safety"]
68    #[doc = r""]
69    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
70    #[inline(always)]
71    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
72        self.bits = bits;
73        self
74    }
75}
76#[doc = "TV Encoder DAC Register1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tve_dac1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tve_dac1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
77pub struct TVE_DAC1_SPEC;
78impl crate::RegisterSpec for TVE_DAC1_SPEC {
79    type Ux = u32;
80}
81#[doc = "`read()` method returns [`tve_dac1::R`](R) reader structure"]
82impl crate::Readable for TVE_DAC1_SPEC {}
83#[doc = "`write(|w| ..)` method takes [`tve_dac1::W`](W) writer structure"]
84impl crate::Writable for TVE_DAC1_SPEC {
85    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
86    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
87}
88#[doc = "`reset()` method sets tve_dac1 to value 0"]
89impl crate::Resettable for TVE_DAC1_SPEC {
90    const RESET_VALUE: Self::Ux = 0;
91}
d1_pac/tve/tve_dac1.rs

d1_pac/tve/
tve_dac1.rs
