d1_pac/tve/
tve_auto_detection_enable.rs

1#[doc = "Register `tve_auto_detection_enable` reader"]
2pub type R = crate::R<TVE_AUTO_DETECTION_ENABLE_SPEC>;
3#[doc = "Register `tve_auto_detection_enable` writer"]
4pub type W = crate::W<TVE_AUTO_DETECTION_ENABLE_SPEC>;
5#[doc = "Field `dac0_auto_detect_enable` reader - "]
6pub type DAC0_AUTO_DETECT_ENABLE_R = crate::BitReader;
7#[doc = "Field `dac0_auto_detect_enable` writer - "]
8pub type DAC0_AUTO_DETECT_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `dac0_auto_detect_interrupt_en` reader - "]
10pub type DAC0_AUTO_DETECT_INTERRUPT_EN_R = crate::BitReader;
11#[doc = "Field `dac0_auto_detect_interrupt_en` writer - "]
12pub type DAC0_AUTO_DETECT_INTERRUPT_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `dac_auto_detect_mode_sel` reader - "]
14pub type DAC_AUTO_DETECT_MODE_SEL_R = crate::BitReader<DAC_AUTO_DETECT_MODE_SEL_A>;
15#[doc = "\n\nValue on reset: 0"]
16#[derive(Clone, Copy, Debug, PartialEq, Eq)]
17pub enum DAC_AUTO_DETECT_MODE_SEL_A {
18    #[doc = "0: Old Mode"]
19    O_LD = 0,
20    #[doc = "1: New Mode"]
21    N_EW = 1,
22}
23impl From<DAC_AUTO_DETECT_MODE_SEL_A> for bool {
24    #[inline(always)]
25    fn from(variant: DAC_AUTO_DETECT_MODE_SEL_A) -> Self {
26        variant as u8 != 0
27    }
28}
29impl DAC_AUTO_DETECT_MODE_SEL_R {
30    #[doc = "Get enumerated values variant"]
31    #[inline(always)]
32    pub const fn variant(&self) -> DAC_AUTO_DETECT_MODE_SEL_A {
33        match self.bits {
34            false => DAC_AUTO_DETECT_MODE_SEL_A::O_LD,
35            true => DAC_AUTO_DETECT_MODE_SEL_A::N_EW,
36        }
37    }
38    #[doc = "Old Mode"]
39    #[inline(always)]
40    pub fn is_o_ld(&self) -> bool {
41        *self == DAC_AUTO_DETECT_MODE_SEL_A::O_LD
42    }
43    #[doc = "New Mode"]
44    #[inline(always)]
45    pub fn is_n_ew(&self) -> bool {
46        *self == DAC_AUTO_DETECT_MODE_SEL_A::N_EW
47    }
48}
49#[doc = "Field `dac_auto_detect_mode_sel` writer - "]
50pub type DAC_AUTO_DETECT_MODE_SEL_W<'a, REG> =
51    crate::BitWriter<'a, REG, DAC_AUTO_DETECT_MODE_SEL_A>;
52impl<'a, REG> DAC_AUTO_DETECT_MODE_SEL_W<'a, REG>
53where
54    REG: crate::Writable + crate::RegisterSpec,
55{
56    #[doc = "Old Mode"]
57    #[inline(always)]
58    pub fn o_ld(self) -> &'a mut crate::W<REG> {
59        self.variant(DAC_AUTO_DETECT_MODE_SEL_A::O_LD)
60    }
61    #[doc = "New Mode"]
62    #[inline(always)]
63    pub fn n_ew(self) -> &'a mut crate::W<REG> {
64        self.variant(DAC_AUTO_DETECT_MODE_SEL_A::N_EW)
65    }
66}
67impl R {
68    #[doc = "Bit 0"]
69    #[inline(always)]
70    pub fn dac0_auto_detect_enable(&self) -> DAC0_AUTO_DETECT_ENABLE_R {
71        DAC0_AUTO_DETECT_ENABLE_R::new((self.bits & 1) != 0)
72    }
73    #[doc = "Bit 16"]
74    #[inline(always)]
75    pub fn dac0_auto_detect_interrupt_en(&self) -> DAC0_AUTO_DETECT_INTERRUPT_EN_R {
76        DAC0_AUTO_DETECT_INTERRUPT_EN_R::new(((self.bits >> 16) & 1) != 0)
77    }
78    #[doc = "Bit 31"]
79    #[inline(always)]
80    pub fn dac_auto_detect_mode_sel(&self) -> DAC_AUTO_DETECT_MODE_SEL_R {
81        DAC_AUTO_DETECT_MODE_SEL_R::new(((self.bits >> 31) & 1) != 0)
82    }
83}
84impl W {
85    #[doc = "Bit 0"]
86    #[inline(always)]
87    #[must_use]
88    pub fn dac0_auto_detect_enable(
89        &mut self,
90    ) -> DAC0_AUTO_DETECT_ENABLE_W<TVE_AUTO_DETECTION_ENABLE_SPEC> {
91        DAC0_AUTO_DETECT_ENABLE_W::new(self, 0)
92    }
93    #[doc = "Bit 16"]
94    #[inline(always)]
95    #[must_use]
96    pub fn dac0_auto_detect_interrupt_en(
97        &mut self,
98    ) -> DAC0_AUTO_DETECT_INTERRUPT_EN_W<TVE_AUTO_DETECTION_ENABLE_SPEC> {
99        DAC0_AUTO_DETECT_INTERRUPT_EN_W::new(self, 16)
100    }
101    #[doc = "Bit 31"]
102    #[inline(always)]
103    #[must_use]
104    pub fn dac_auto_detect_mode_sel(
105        &mut self,
106    ) -> DAC_AUTO_DETECT_MODE_SEL_W<TVE_AUTO_DETECTION_ENABLE_SPEC> {
107        DAC_AUTO_DETECT_MODE_SEL_W::new(self, 31)
108    }
109    #[doc = r" Writes raw bits to the register."]
110    #[doc = r""]
111    #[doc = r" # Safety"]
112    #[doc = r""]
113    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
114    #[inline(always)]
115    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
116        self.bits = bits;
117        self
118    }
119}
120#[doc = "TV Encoder Auto Detection Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tve_auto_detection_enable::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tve_auto_detection_enable::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
121pub struct TVE_AUTO_DETECTION_ENABLE_SPEC;
122impl crate::RegisterSpec for TVE_AUTO_DETECTION_ENABLE_SPEC {
123    type Ux = u32;
124}
125#[doc = "`read()` method returns [`tve_auto_detection_enable::R`](R) reader structure"]
126impl crate::Readable for TVE_AUTO_DETECTION_ENABLE_SPEC {}
127#[doc = "`write(|w| ..)` method takes [`tve_auto_detection_enable::W`](W) writer structure"]
128impl crate::Writable for TVE_AUTO_DETECTION_ENABLE_SPEC {
129    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
130    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
131}
132#[doc = "`reset()` method sets tve_auto_detection_enable to value 0"]
133impl crate::Resettable for TVE_AUTO_DETECTION_ENABLE_SPEC {
134    const RESET_VALUE: Self::Ux = 0;
135}
d1_pac/tve/tve_auto_detection_enable.rs

d1_pac/tve/
tve_auto_detection_enable.rs
