d1_pac/
tvd0.rs

1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4    tvd_en: TVD_EN,
5    tvd_mode: TVD_MODE,
6    tvd_clamp_agc1: TVD_CLAMP_AGC1,
7    tvd_clamp_agc2: TVD_CLAMP_AGC2,
8    tvd_hlock1: TVD_HLOCK1,
9    tvd_hlock2: TVD_HLOCK2,
10    tvd_hlock3: TVD_HLOCK3,
11    tvd_hlock4: TVD_HLOCK4,
12    tvd_hlock5: TVD_HLOCK5,
13    tvd_vlock1: TVD_VLOCK1,
14    tvd_vlock2: TVD_VLOCK2,
15    _reserved11: [u8; 0x04],
16    tvd_clock1: TVD_CLOCK1,
17    tvd_clock2: TVD_CLOCK2,
18    _reserved13: [u8; 0x08],
19    tvd_yc_sep1: TVD_YC_SEP1,
20    tvd_yc_sep2: TVD_YC_SEP2,
21    _reserved15: [u8; 0x08],
22    tvd_enhance1: TVD_ENHANCE1,
23    tvd_enhance2: TVD_ENHANCE2,
24    tvd_enhance3: TVD_ENHANCE3,
25    _reserved18: [u8; 0x04],
26    tvd_wb1: TVD_WB1,
27    tvd_wb2: TVD_WB2,
28    tvd_wb3: TVD_WB3,
29    tvd_wb4: TVD_WB4,
30    _reserved22: [u8; 0x10],
31    tvd_irq_ctl: TVD_IRQ_CTL,
32    _reserved23: [u8; 0x0c],
33    tvd_irq_status: TVD_IRQ_STATUS,
34    _reserved24: [u8; 0x6c],
35    tvd_debug1: TVD_DEBUG1,
36    _reserved25: [u8; 0x7c],
37    tvd_status1: TVD_STATUS1,
38    tvd_status2: TVD_STATUS2,
39    tvd_status3: TVD_STATUS3,
40    tvd_status4: TVD_STATUS4,
41    tvd_status5: TVD_STATUS5,
42    tvd_status6: TVD_STATUS6,
43}
44impl RegisterBlock {
45    #[doc = "0x00 - TVD MODULE CONTROL Register"]
46    #[inline(always)]
47    pub const fn tvd_en(&self) -> &TVD_EN {
48        &self.tvd_en
49    }
50    #[doc = "0x04 - TVD MODE CONTROL Register"]
51    #[inline(always)]
52    pub const fn tvd_mode(&self) -> &TVD_MODE {
53        &self.tvd_mode
54    }
55    #[doc = "0x08 - TVD CLAMP And AGC CONTROL Register1"]
56    #[inline(always)]
57    pub const fn tvd_clamp_agc1(&self) -> &TVD_CLAMP_AGC1 {
58        &self.tvd_clamp_agc1
59    }
60    #[doc = "0x0c - TVD CLAMP And AGC CONTROL Register2"]
61    #[inline(always)]
62    pub const fn tvd_clamp_agc2(&self) -> &TVD_CLAMP_AGC2 {
63        &self.tvd_clamp_agc2
64    }
65    #[doc = "0x10 - TVD HLOCK CONTROL Register1"]
66    #[inline(always)]
67    pub const fn tvd_hlock1(&self) -> &TVD_HLOCK1 {
68        &self.tvd_hlock1
69    }
70    #[doc = "0x14 - TVD HLOCK CONTROL Register2"]
71    #[inline(always)]
72    pub const fn tvd_hlock2(&self) -> &TVD_HLOCK2 {
73        &self.tvd_hlock2
74    }
75    #[doc = "0x18 - TVD HLOCK CONTROL Register3"]
76    #[inline(always)]
77    pub const fn tvd_hlock3(&self) -> &TVD_HLOCK3 {
78        &self.tvd_hlock3
79    }
80    #[doc = "0x1c - TVD HLOCK CONTROL Register4"]
81    #[inline(always)]
82    pub const fn tvd_hlock4(&self) -> &TVD_HLOCK4 {
83        &self.tvd_hlock4
84    }
85    #[doc = "0x20 - TVD HLOCK CONTROL Register5"]
86    #[inline(always)]
87    pub const fn tvd_hlock5(&self) -> &TVD_HLOCK5 {
88        &self.tvd_hlock5
89    }
90    #[doc = "0x24 - TVD VLOCK CONTROL Register1"]
91    #[inline(always)]
92    pub const fn tvd_vlock1(&self) -> &TVD_VLOCK1 {
93        &self.tvd_vlock1
94    }
95    #[doc = "0x28 - TVD VLOCK CONTROL Register2"]
96    #[inline(always)]
97    pub const fn tvd_vlock2(&self) -> &TVD_VLOCK2 {
98        &self.tvd_vlock2
99    }
100    #[doc = "0x30 - TVD CHROMA LOCK CONTROL Register1"]
101    #[inline(always)]
102    pub const fn tvd_clock1(&self) -> &TVD_CLOCK1 {
103        &self.tvd_clock1
104    }
105    #[doc = "0x34 - TVD CHROMA LOCK CONTROL Register2"]
106    #[inline(always)]
107    pub const fn tvd_clock2(&self) -> &TVD_CLOCK2 {
108        &self.tvd_clock2
109    }
110    #[doc = "0x40 - TVD YC SEPERATION CONROL Register1"]
111    #[inline(always)]
112    pub const fn tvd_yc_sep1(&self) -> &TVD_YC_SEP1 {
113        &self.tvd_yc_sep1
114    }
115    #[doc = "0x44 - TVD YC SEPERATION CONROL Register2"]
116    #[inline(always)]
117    pub const fn tvd_yc_sep2(&self) -> &TVD_YC_SEP2 {
118        &self.tvd_yc_sep2
119    }
120    #[doc = "0x50 - TVD ENHANCEMENT CONTROL Register1"]
121    #[inline(always)]
122    pub const fn tvd_enhance1(&self) -> &TVD_ENHANCE1 {
123        &self.tvd_enhance1
124    }
125    #[doc = "0x54 - TVD ENHANCEMENT CONTROL Register2"]
126    #[inline(always)]
127    pub const fn tvd_enhance2(&self) -> &TVD_ENHANCE2 {
128        &self.tvd_enhance2
129    }
130    #[doc = "0x58 - TVD ENHANCEMENT CONTROL Register3"]
131    #[inline(always)]
132    pub const fn tvd_enhance3(&self) -> &TVD_ENHANCE3 {
133        &self.tvd_enhance3
134    }
135    #[doc = "0x60 - TVD WB DMA CONTROL Register1"]
136    #[inline(always)]
137    pub const fn tvd_wb1(&self) -> &TVD_WB1 {
138        &self.tvd_wb1
139    }
140    #[doc = "0x64 - TVD WB DMA CONTROL Register2"]
141    #[inline(always)]
142    pub const fn tvd_wb2(&self) -> &TVD_WB2 {
143        &self.tvd_wb2
144    }
145    #[doc = "0x68 - TVD WB DMA CONTROL Register3"]
146    #[inline(always)]
147    pub const fn tvd_wb3(&self) -> &TVD_WB3 {
148        &self.tvd_wb3
149    }
150    #[doc = "0x6c - TVD WB DMA CONTROL Register4"]
151    #[inline(always)]
152    pub const fn tvd_wb4(&self) -> &TVD_WB4 {
153        &self.tvd_wb4
154    }
155    #[doc = "0x80 - TVD DMA Interrupt Control Register"]
156    #[inline(always)]
157    pub const fn tvd_irq_ctl(&self) -> &TVD_IRQ_CTL {
158        &self.tvd_irq_ctl
159    }
160    #[doc = "0x90 - TVD DMA Interrupt Status Register"]
161    #[inline(always)]
162    pub const fn tvd_irq_status(&self) -> &TVD_IRQ_STATUS {
163        &self.tvd_irq_status
164    }
165    #[doc = "0x100 - TVD DEBUG CONTROL Register1"]
166    #[inline(always)]
167    pub const fn tvd_debug1(&self) -> &TVD_DEBUG1 {
168        &self.tvd_debug1
169    }
170    #[doc = "0x180 - TVD DEBUG STATUS Register1"]
171    #[inline(always)]
172    pub const fn tvd_status1(&self) -> &TVD_STATUS1 {
173        &self.tvd_status1
174    }
175    #[doc = "0x184 - TVD DEBUG STATUS Register2"]
176    #[inline(always)]
177    pub const fn tvd_status2(&self) -> &TVD_STATUS2 {
178        &self.tvd_status2
179    }
180    #[doc = "0x188 - TVD DEBUG STATUS Register3"]
181    #[inline(always)]
182    pub const fn tvd_status3(&self) -> &TVD_STATUS3 {
183        &self.tvd_status3
184    }
185    #[doc = "0x18c - TVD DEBUG STATUS Register4"]
186    #[inline(always)]
187    pub const fn tvd_status4(&self) -> &TVD_STATUS4 {
188        &self.tvd_status4
189    }
190    #[doc = "0x190 - TVD DEBUG STATUS Register5"]
191    #[inline(always)]
192    pub const fn tvd_status5(&self) -> &TVD_STATUS5 {
193        &self.tvd_status5
194    }
195    #[doc = "0x194 - TVD DEBUG STATUS Register6"]
196    #[inline(always)]
197    pub const fn tvd_status6(&self) -> &TVD_STATUS6 {
198        &self.tvd_status6
199    }
200}
201#[doc = "tvd_en (rw) register accessor: TVD MODULE CONTROL Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_en::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_en::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_en`] module"]
202pub type TVD_EN = crate::Reg<tvd_en::TVD_EN_SPEC>;
203#[doc = "TVD MODULE CONTROL Register"]
204pub mod tvd_en;
205#[doc = "tvd_mode (rw) register accessor: TVD MODE CONTROL Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_mode::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_mode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_mode`] module"]
206pub type TVD_MODE = crate::Reg<tvd_mode::TVD_MODE_SPEC>;
207#[doc = "TVD MODE CONTROL Register"]
208pub mod tvd_mode;
209#[doc = "tvd_clamp_agc1 (rw) register accessor: TVD CLAMP And AGC CONTROL Register1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_clamp_agc1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_clamp_agc1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_clamp_agc1`] module"]
210pub type TVD_CLAMP_AGC1 = crate::Reg<tvd_clamp_agc1::TVD_CLAMP_AGC1_SPEC>;
211#[doc = "TVD CLAMP And AGC CONTROL Register1"]
212pub mod tvd_clamp_agc1;
213#[doc = "tvd_clamp_agc2 (rw) register accessor: TVD CLAMP And AGC CONTROL Register2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_clamp_agc2::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_clamp_agc2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_clamp_agc2`] module"]
214pub type TVD_CLAMP_AGC2 = crate::Reg<tvd_clamp_agc2::TVD_CLAMP_AGC2_SPEC>;
215#[doc = "TVD CLAMP And AGC CONTROL Register2"]
216pub mod tvd_clamp_agc2;
217#[doc = "tvd_hlock1 (rw) register accessor: TVD HLOCK CONTROL Register1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_hlock1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_hlock1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_hlock1`] module"]
218pub type TVD_HLOCK1 = crate::Reg<tvd_hlock1::TVD_HLOCK1_SPEC>;
219#[doc = "TVD HLOCK CONTROL Register1"]
220pub mod tvd_hlock1;
221#[doc = "tvd_hlock2 (rw) register accessor: TVD HLOCK CONTROL Register2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_hlock2::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_hlock2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_hlock2`] module"]
222pub type TVD_HLOCK2 = crate::Reg<tvd_hlock2::TVD_HLOCK2_SPEC>;
223#[doc = "TVD HLOCK CONTROL Register2"]
224pub mod tvd_hlock2;
225#[doc = "tvd_hlock3 (rw) register accessor: TVD HLOCK CONTROL Register3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_hlock3::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_hlock3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_hlock3`] module"]
226pub type TVD_HLOCK3 = crate::Reg<tvd_hlock3::TVD_HLOCK3_SPEC>;
227#[doc = "TVD HLOCK CONTROL Register3"]
228pub mod tvd_hlock3;
229#[doc = "tvd_hlock4 (rw) register accessor: TVD HLOCK CONTROL Register4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_hlock4::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_hlock4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_hlock4`] module"]
230pub type TVD_HLOCK4 = crate::Reg<tvd_hlock4::TVD_HLOCK4_SPEC>;
231#[doc = "TVD HLOCK CONTROL Register4"]
232pub mod tvd_hlock4;
233#[doc = "tvd_hlock5 (rw) register accessor: TVD HLOCK CONTROL Register5\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_hlock5::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_hlock5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_hlock5`] module"]
234pub type TVD_HLOCK5 = crate::Reg<tvd_hlock5::TVD_HLOCK5_SPEC>;
235#[doc = "TVD HLOCK CONTROL Register5"]
236pub mod tvd_hlock5;
237#[doc = "tvd_vlock1 (rw) register accessor: TVD VLOCK CONTROL Register1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_vlock1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_vlock1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_vlock1`] module"]
238pub type TVD_VLOCK1 = crate::Reg<tvd_vlock1::TVD_VLOCK1_SPEC>;
239#[doc = "TVD VLOCK CONTROL Register1"]
240pub mod tvd_vlock1;
241#[doc = "tvd_vlock2 (rw) register accessor: TVD VLOCK CONTROL Register2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_vlock2::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_vlock2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_vlock2`] module"]
242pub type TVD_VLOCK2 = crate::Reg<tvd_vlock2::TVD_VLOCK2_SPEC>;
243#[doc = "TVD VLOCK CONTROL Register2"]
244pub mod tvd_vlock2;
245#[doc = "tvd_clock1 (rw) register accessor: TVD CHROMA LOCK CONTROL Register1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_clock1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_clock1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_clock1`] module"]
246pub type TVD_CLOCK1 = crate::Reg<tvd_clock1::TVD_CLOCK1_SPEC>;
247#[doc = "TVD CHROMA LOCK CONTROL Register1"]
248pub mod tvd_clock1;
249#[doc = "tvd_clock2 (rw) register accessor: TVD CHROMA LOCK CONTROL Register2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_clock2::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_clock2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_clock2`] module"]
250pub type TVD_CLOCK2 = crate::Reg<tvd_clock2::TVD_CLOCK2_SPEC>;
251#[doc = "TVD CHROMA LOCK CONTROL Register2"]
252pub mod tvd_clock2;
253#[doc = "tvd_yc_sep1 (rw) register accessor: TVD YC SEPERATION CONROL Register1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_yc_sep1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_yc_sep1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_yc_sep1`] module"]
254pub type TVD_YC_SEP1 = crate::Reg<tvd_yc_sep1::TVD_YC_SEP1_SPEC>;
255#[doc = "TVD YC SEPERATION CONROL Register1"]
256pub mod tvd_yc_sep1;
257#[doc = "tvd_yc_sep2 (rw) register accessor: TVD YC SEPERATION CONROL Register2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_yc_sep2::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_yc_sep2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_yc_sep2`] module"]
258pub type TVD_YC_SEP2 = crate::Reg<tvd_yc_sep2::TVD_YC_SEP2_SPEC>;
259#[doc = "TVD YC SEPERATION CONROL Register2"]
260pub mod tvd_yc_sep2;
261#[doc = "tvd_enhance1 (rw) register accessor: TVD ENHANCEMENT CONTROL Register1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_enhance1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_enhance1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_enhance1`] module"]
262pub type TVD_ENHANCE1 = crate::Reg<tvd_enhance1::TVD_ENHANCE1_SPEC>;
263#[doc = "TVD ENHANCEMENT CONTROL Register1"]
264pub mod tvd_enhance1;
265#[doc = "tvd_enhance2 (rw) register accessor: TVD ENHANCEMENT CONTROL Register2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_enhance2::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_enhance2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_enhance2`] module"]
266pub type TVD_ENHANCE2 = crate::Reg<tvd_enhance2::TVD_ENHANCE2_SPEC>;
267#[doc = "TVD ENHANCEMENT CONTROL Register2"]
268pub mod tvd_enhance2;
269#[doc = "tvd_enhance3 (rw) register accessor: TVD ENHANCEMENT CONTROL Register3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_enhance3::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_enhance3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_enhance3`] module"]
270pub type TVD_ENHANCE3 = crate::Reg<tvd_enhance3::TVD_ENHANCE3_SPEC>;
271#[doc = "TVD ENHANCEMENT CONTROL Register3"]
272pub mod tvd_enhance3;
273#[doc = "tvd_wb1 (rw) register accessor: TVD WB DMA CONTROL Register1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_wb1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_wb1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_wb1`] module"]
274pub type TVD_WB1 = crate::Reg<tvd_wb1::TVD_WB1_SPEC>;
275#[doc = "TVD WB DMA CONTROL Register1"]
276pub mod tvd_wb1;
277#[doc = "tvd_wb2 (rw) register accessor: TVD WB DMA CONTROL Register2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_wb2::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_wb2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_wb2`] module"]
278pub type TVD_WB2 = crate::Reg<tvd_wb2::TVD_WB2_SPEC>;
279#[doc = "TVD WB DMA CONTROL Register2"]
280pub mod tvd_wb2;
281#[doc = "tvd_wb3 (rw) register accessor: TVD WB DMA CONTROL Register3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_wb3::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_wb3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_wb3`] module"]
282pub type TVD_WB3 = crate::Reg<tvd_wb3::TVD_WB3_SPEC>;
283#[doc = "TVD WB DMA CONTROL Register3"]
284pub mod tvd_wb3;
285#[doc = "tvd_wb4 (rw) register accessor: TVD WB DMA CONTROL Register4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_wb4::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_wb4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_wb4`] module"]
286pub type TVD_WB4 = crate::Reg<tvd_wb4::TVD_WB4_SPEC>;
287#[doc = "TVD WB DMA CONTROL Register4"]
288pub mod tvd_wb4;
289#[doc = "tvd_irq_ctl (rw) register accessor: TVD DMA Interrupt Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_irq_ctl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_irq_ctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_irq_ctl`] module"]
290pub type TVD_IRQ_CTL = crate::Reg<tvd_irq_ctl::TVD_IRQ_CTL_SPEC>;
291#[doc = "TVD DMA Interrupt Control Register"]
292pub mod tvd_irq_ctl;
293#[doc = "tvd_irq_status (rw) register accessor: TVD DMA Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_irq_status::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_irq_status::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_irq_status`] module"]
294pub type TVD_IRQ_STATUS = crate::Reg<tvd_irq_status::TVD_IRQ_STATUS_SPEC>;
295#[doc = "TVD DMA Interrupt Status Register"]
296pub mod tvd_irq_status;
297#[doc = "tvd_debug1 (rw) register accessor: TVD DEBUG CONTROL Register1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_debug1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_debug1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_debug1`] module"]
298pub type TVD_DEBUG1 = crate::Reg<tvd_debug1::TVD_DEBUG1_SPEC>;
299#[doc = "TVD DEBUG CONTROL Register1"]
300pub mod tvd_debug1;
301#[doc = "tvd_status1 (rw) register accessor: TVD DEBUG STATUS Register1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_status1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_status1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_status1`] module"]
302pub type TVD_STATUS1 = crate::Reg<tvd_status1::TVD_STATUS1_SPEC>;
303#[doc = "TVD DEBUG STATUS Register1"]
304pub mod tvd_status1;
305#[doc = "tvd_status2 (rw) register accessor: TVD DEBUG STATUS Register2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_status2::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_status2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_status2`] module"]
306pub type TVD_STATUS2 = crate::Reg<tvd_status2::TVD_STATUS2_SPEC>;
307#[doc = "TVD DEBUG STATUS Register2"]
308pub mod tvd_status2;
309#[doc = "tvd_status3 (rw) register accessor: TVD DEBUG STATUS Register3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_status3::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_status3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_status3`] module"]
310pub type TVD_STATUS3 = crate::Reg<tvd_status3::TVD_STATUS3_SPEC>;
311#[doc = "TVD DEBUG STATUS Register3"]
312pub mod tvd_status3;
313#[doc = "tvd_status4 (rw) register accessor: TVD DEBUG STATUS Register4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_status4::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_status4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_status4`] module"]
314pub type TVD_STATUS4 = crate::Reg<tvd_status4::TVD_STATUS4_SPEC>;
315#[doc = "TVD DEBUG STATUS Register4"]
316pub mod tvd_status4;
317#[doc = "tvd_status5 (rw) register accessor: TVD DEBUG STATUS Register5\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_status5::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_status5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_status5`] module"]
318pub type TVD_STATUS5 = crate::Reg<tvd_status5::TVD_STATUS5_SPEC>;
319#[doc = "TVD DEBUG STATUS Register5"]
320pub mod tvd_status5;
321#[doc = "tvd_status6 (rw) register accessor: TVD DEBUG STATUS Register6\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tvd_status6::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tvd_status6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tvd_status6`] module"]
322pub type TVD_STATUS6 = crate::Reg<tvd_status6::TVD_STATUS6_SPEC>;
323#[doc = "TVD DEBUG STATUS Register6"]
324pub mod tvd_status6;