d1_pac/timer/
wdog_irq_en.rs1#[doc = "Register `wdog_irq_en` reader"]
2pub type R = crate::R<WDOG_IRQ_EN_SPEC>;
3#[doc = "Register `wdog_irq_en` writer"]
4pub type W = crate::W<WDOG_IRQ_EN_SPEC>;
5#[doc = "Field `wdog_irq_en` reader - "]
6pub type WDOG_IRQ_EN_R = crate::BitReader<WDOG_IRQ_EN_A>;
7#[doc = "\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum WDOG_IRQ_EN_A {
10 #[doc = "0: `0`"]
11 DISABLED = 0,
12 #[doc = "1: `1`"]
13 ENABLED = 1,
14}
15impl From<WDOG_IRQ_EN_A> for bool {
16 #[inline(always)]
17 fn from(variant: WDOG_IRQ_EN_A) -> Self {
18 variant as u8 != 0
19 }
20}
21impl WDOG_IRQ_EN_R {
22 #[doc = "Get enumerated values variant"]
23 #[inline(always)]
24 pub const fn variant(&self) -> WDOG_IRQ_EN_A {
25 match self.bits {
26 false => WDOG_IRQ_EN_A::DISABLED,
27 true => WDOG_IRQ_EN_A::ENABLED,
28 }
29 }
30 #[doc = "`0`"]
31 #[inline(always)]
32 pub fn is_disabled(&self) -> bool {
33 *self == WDOG_IRQ_EN_A::DISABLED
34 }
35 #[doc = "`1`"]
36 #[inline(always)]
37 pub fn is_enabled(&self) -> bool {
38 *self == WDOG_IRQ_EN_A::ENABLED
39 }
40}
41#[doc = "Field `wdog_irq_en` writer - "]
42pub type WDOG_IRQ_EN_W<'a, REG> = crate::BitWriter<'a, REG, WDOG_IRQ_EN_A>;
43impl<'a, REG> WDOG_IRQ_EN_W<'a, REG>
44where
45 REG: crate::Writable + crate::RegisterSpec,
46{
47 #[doc = "`0`"]
48 #[inline(always)]
49 pub fn disabled(self) -> &'a mut crate::W<REG> {
50 self.variant(WDOG_IRQ_EN_A::DISABLED)
51 }
52 #[doc = "`1`"]
53 #[inline(always)]
54 pub fn enabled(self) -> &'a mut crate::W<REG> {
55 self.variant(WDOG_IRQ_EN_A::ENABLED)
56 }
57}
58impl R {
59 #[doc = "Bit 0"]
60 #[inline(always)]
61 pub fn wdog_irq_en(&self) -> WDOG_IRQ_EN_R {
62 WDOG_IRQ_EN_R::new((self.bits & 1) != 0)
63 }
64}
65impl W {
66 #[doc = "Bit 0"]
67 #[inline(always)]
68 #[must_use]
69 pub fn wdog_irq_en(&mut self) -> WDOG_IRQ_EN_W<WDOG_IRQ_EN_SPEC> {
70 WDOG_IRQ_EN_W::new(self, 0)
71 }
72 #[doc = r" Writes raw bits to the register."]
73 #[doc = r""]
74 #[doc = r" # Safety"]
75 #[doc = r""]
76 #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
77 #[inline(always)]
78 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
79 self.bits = bits;
80 self
81 }
82}
83#[doc = "Watchdog IRQ Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdog_irq_en::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdog_irq_en::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
84pub struct WDOG_IRQ_EN_SPEC;
85impl crate::RegisterSpec for WDOG_IRQ_EN_SPEC {
86 type Ux = u32;
87}
88#[doc = "`read()` method returns [`wdog_irq_en::R`](R) reader structure"]
89impl crate::Readable for WDOG_IRQ_EN_SPEC {}
90#[doc = "`write(|w| ..)` method takes [`wdog_irq_en::W`](W) writer structure"]
91impl crate::Writable for WDOG_IRQ_EN_SPEC {
92 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
93 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
94}
95#[doc = "`reset()` method sets wdog_irq_en to value 0"]
96impl crate::Resettable for WDOG_IRQ_EN_SPEC {
97 const RESET_VALUE: Self::Ux = 0;
98}