1#[doc = "Register `wdog_cfg` reader"]
2pub type R = crate::R<WDOG_CFG_SPEC>;
3#[doc = "Register `wdog_cfg` writer"]
4pub type W = crate::W<WDOG_CFG_SPEC>;
5#[doc = "Field `wdog_mode` reader - Configure the operating mode for the watchdog"]
6pub type WDOG_MODE_R = crate::FieldReader<WDOG_MODE_A>;
7#[doc = "Configure the operating mode for the watchdog\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9#[repr(u8)]
10pub enum WDOG_MODE_A {
11 #[doc = "1: `1`"]
12 WHOLD_SYSTEM = 1,
13 #[doc = "2: `10`"]
14 ONLY_INTERRUPT = 2,
15}
16impl From<WDOG_MODE_A> for u8 {
17 #[inline(always)]
18 fn from(variant: WDOG_MODE_A) -> Self {
19 variant as _
20 }
21}
22impl crate::FieldSpec for WDOG_MODE_A {
23 type Ux = u8;
24}
25impl WDOG_MODE_R {
26 #[doc = "Get enumerated values variant"]
27 #[inline(always)]
28 pub const fn variant(&self) -> Option<WDOG_MODE_A> {
29 match self.bits {
30 1 => Some(WDOG_MODE_A::WHOLD_SYSTEM),
31 2 => Some(WDOG_MODE_A::ONLY_INTERRUPT),
32 _ => None,
33 }
34 }
35 #[doc = "`1`"]
36 #[inline(always)]
37 pub fn is_whold_system(&self) -> bool {
38 *self == WDOG_MODE_A::WHOLD_SYSTEM
39 }
40 #[doc = "`10`"]
41 #[inline(always)]
42 pub fn is_only_interrupt(&self) -> bool {
43 *self == WDOG_MODE_A::ONLY_INTERRUPT
44 }
45}
46#[doc = "Field `wdog_mode` writer - Configure the operating mode for the watchdog"]
47pub type WDOG_MODE_W<'a, REG> = crate::FieldWriter<'a, REG, 2, WDOG_MODE_A>;
48impl<'a, REG> WDOG_MODE_W<'a, REG>
49where
50 REG: crate::Writable + crate::RegisterSpec,
51 REG::Ux: From<u8>,
52{
53 #[doc = "`1`"]
54 #[inline(always)]
55 pub fn whold_system(self) -> &'a mut crate::W<REG> {
56 self.variant(WDOG_MODE_A::WHOLD_SYSTEM)
57 }
58 #[doc = "`10`"]
59 #[inline(always)]
60 pub fn only_interrupt(self) -> &'a mut crate::W<REG> {
61 self.variant(WDOG_MODE_A::ONLY_INTERRUPT)
62 }
63}
64#[doc = "Field `wdog_clk_src` reader - Select the clock source for the watchdog."]
65pub type WDOG_CLK_SRC_R = crate::BitReader<WDOG_CLK_SRC_A>;
66#[doc = "Select the clock source for the watchdog.\n\nValue on reset: 0"]
67#[derive(Clone, Copy, Debug, PartialEq, Eq)]
68pub enum WDOG_CLK_SRC_A {
69 #[doc = "0: `0`"]
70 HOSC_32K = 0,
71 #[doc = "1: `1`"]
72 LOSC_32K = 1,
73}
74impl From<WDOG_CLK_SRC_A> for bool {
75 #[inline(always)]
76 fn from(variant: WDOG_CLK_SRC_A) -> Self {
77 variant as u8 != 0
78 }
79}
80impl WDOG_CLK_SRC_R {
81 #[doc = "Get enumerated values variant"]
82 #[inline(always)]
83 pub const fn variant(&self) -> WDOG_CLK_SRC_A {
84 match self.bits {
85 false => WDOG_CLK_SRC_A::HOSC_32K,
86 true => WDOG_CLK_SRC_A::LOSC_32K,
87 }
88 }
89 #[doc = "`0`"]
90 #[inline(always)]
91 pub fn is_hosc_32k(&self) -> bool {
92 *self == WDOG_CLK_SRC_A::HOSC_32K
93 }
94 #[doc = "`1`"]
95 #[inline(always)]
96 pub fn is_losc_32k(&self) -> bool {
97 *self == WDOG_CLK_SRC_A::LOSC_32K
98 }
99}
100#[doc = "Field `wdog_clk_src` writer - Select the clock source for the watchdog."]
101pub type WDOG_CLK_SRC_W<'a, REG> = crate::BitWriter<'a, REG, WDOG_CLK_SRC_A>;
102impl<'a, REG> WDOG_CLK_SRC_W<'a, REG>
103where
104 REG: crate::Writable + crate::RegisterSpec,
105{
106 #[doc = "`0`"]
107 #[inline(always)]
108 pub fn hosc_32k(self) -> &'a mut crate::W<REG> {
109 self.variant(WDOG_CLK_SRC_A::HOSC_32K)
110 }
111 #[doc = "`1`"]
112 #[inline(always)]
113 pub fn losc_32k(self) -> &'a mut crate::W<REG> {
114 self.variant(WDOG_CLK_SRC_A::LOSC_32K)
115 }
116}
117#[doc = "Field `key_field` writer - Key Field"]
118pub type KEY_FIELD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>;
119impl R {
120 #[doc = "Bits 0:1 - Configure the operating mode for the watchdog"]
121 #[inline(always)]
122 pub fn wdog_mode(&self) -> WDOG_MODE_R {
123 WDOG_MODE_R::new((self.bits & 3) as u8)
124 }
125 #[doc = "Bit 8 - Select the clock source for the watchdog."]
126 #[inline(always)]
127 pub fn wdog_clk_src(&self) -> WDOG_CLK_SRC_R {
128 WDOG_CLK_SRC_R::new(((self.bits >> 8) & 1) != 0)
129 }
130}
131impl W {
132 #[doc = "Bits 0:1 - Configure the operating mode for the watchdog"]
133 #[inline(always)]
134 #[must_use]
135 pub fn wdog_mode(&mut self) -> WDOG_MODE_W<WDOG_CFG_SPEC> {
136 WDOG_MODE_W::new(self, 0)
137 }
138 #[doc = "Bit 8 - Select the clock source for the watchdog."]
139 #[inline(always)]
140 #[must_use]
141 pub fn wdog_clk_src(&mut self) -> WDOG_CLK_SRC_W<WDOG_CFG_SPEC> {
142 WDOG_CLK_SRC_W::new(self, 8)
143 }
144 #[doc = "Bits 16:31 - Key Field"]
145 #[inline(always)]
146 #[must_use]
147 pub fn key_field(&mut self) -> KEY_FIELD_W<WDOG_CFG_SPEC> {
148 KEY_FIELD_W::new(self, 16)
149 }
150 #[doc = r" Writes raw bits to the register."]
151 #[doc = r""]
152 #[doc = r" # Safety"]
153 #[doc = r""]
154 #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
155 #[inline(always)]
156 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
157 self.bits = bits;
158 self
159 }
160}
161#[doc = "Watchdog Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdog_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdog_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
162pub struct WDOG_CFG_SPEC;
163impl crate::RegisterSpec for WDOG_CFG_SPEC {
164 type Ux = u32;
165}
166#[doc = "`read()` method returns [`wdog_cfg::R`](R) reader structure"]
167impl crate::Readable for WDOG_CFG_SPEC {}
168#[doc = "`write(|w| ..)` method takes [`wdog_cfg::W`](W) writer structure"]
169impl crate::Writable for WDOG_CFG_SPEC {
170 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
171 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
172}
173#[doc = "`reset()` method sets wdog_cfg to value 0"]
174impl crate::Resettable for WDOG_CFG_SPEC {
175 const RESET_VALUE: Self::Ux = 0;
176}