1#[doc = "Register `tmr%s_ctrl` reader"]
2pub type R = crate::R<TMR_CTRL_SPEC>;
3#[doc = "Register `tmr%s_ctrl` writer"]
4pub type W = crate::W<TMR_CTRL_SPEC>;
5#[doc = "Field `tmr_en` reader - "]
6pub type TMR_EN_R = crate::BitReader<TMR_EN_A>;
7#[doc = "\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum TMR_EN_A {
10 #[doc = "0: `0`"]
11 STOP_PAUSE = 0,
12 #[doc = "1: `1`"]
13 START = 1,
14}
15impl From<TMR_EN_A> for bool {
16 #[inline(always)]
17 fn from(variant: TMR_EN_A) -> Self {
18 variant as u8 != 0
19 }
20}
21impl TMR_EN_R {
22 #[doc = "Get enumerated values variant"]
23 #[inline(always)]
24 pub const fn variant(&self) -> TMR_EN_A {
25 match self.bits {
26 false => TMR_EN_A::STOP_PAUSE,
27 true => TMR_EN_A::START,
28 }
29 }
30 #[doc = "`0`"]
31 #[inline(always)]
32 pub fn is_stop_pause(&self) -> bool {
33 *self == TMR_EN_A::STOP_PAUSE
34 }
35 #[doc = "`1`"]
36 #[inline(always)]
37 pub fn is_start(&self) -> bool {
38 *self == TMR_EN_A::START
39 }
40}
41#[doc = "Field `tmr_en` writer - "]
42pub type TMR_EN_W<'a, REG> = crate::BitWriter<'a, REG, TMR_EN_A>;
43impl<'a, REG> TMR_EN_W<'a, REG>
44where
45 REG: crate::Writable + crate::RegisterSpec,
46{
47 #[doc = "`0`"]
48 #[inline(always)]
49 pub fn stop_pause(self) -> &'a mut crate::W<REG> {
50 self.variant(TMR_EN_A::STOP_PAUSE)
51 }
52 #[doc = "`1`"]
53 #[inline(always)]
54 pub fn start(self) -> &'a mut crate::W<REG> {
55 self.variant(TMR_EN_A::START)
56 }
57}
58#[doc = "Field `tmr_reload` reader - "]
59pub type TMR_RELOAD_R = crate::BitReader<TMR_RELOAD_A>;
60#[doc = "\n\nValue on reset: 0"]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum TMR_RELOAD_A {
63 #[doc = "0: `0`"]
64 NO_EFFECT = 0,
65 #[doc = "1: `1`"]
66 RELOAD = 1,
67}
68impl From<TMR_RELOAD_A> for bool {
69 #[inline(always)]
70 fn from(variant: TMR_RELOAD_A) -> Self {
71 variant as u8 != 0
72 }
73}
74impl TMR_RELOAD_R {
75 #[doc = "Get enumerated values variant"]
76 #[inline(always)]
77 pub const fn variant(&self) -> TMR_RELOAD_A {
78 match self.bits {
79 false => TMR_RELOAD_A::NO_EFFECT,
80 true => TMR_RELOAD_A::RELOAD,
81 }
82 }
83 #[doc = "`0`"]
84 #[inline(always)]
85 pub fn is_no_effect(&self) -> bool {
86 *self == TMR_RELOAD_A::NO_EFFECT
87 }
88 #[doc = "`1`"]
89 #[inline(always)]
90 pub fn is_reload(&self) -> bool {
91 *self == TMR_RELOAD_A::RELOAD
92 }
93}
94#[doc = "Field `tmr_reload` writer - "]
95pub type TMR_RELOAD_W<'a, REG> = crate::BitWriter<'a, REG, TMR_RELOAD_A>;
96impl<'a, REG> TMR_RELOAD_W<'a, REG>
97where
98 REG: crate::Writable + crate::RegisterSpec,
99{
100 #[doc = "`0`"]
101 #[inline(always)]
102 pub fn no_effect(self) -> &'a mut crate::W<REG> {
103 self.variant(TMR_RELOAD_A::NO_EFFECT)
104 }
105 #[doc = "`1`"]
106 #[inline(always)]
107 pub fn reload(self) -> &'a mut crate::W<REG> {
108 self.variant(TMR_RELOAD_A::RELOAD)
109 }
110}
111#[doc = "Field `tmr_clk_src` reader - "]
112pub type TMR_CLK_SRC_R = crate::FieldReader<TMR_CLK_SRC_A>;
113#[doc = "\n\nValue on reset: 0"]
114#[derive(Clone, Copy, Debug, PartialEq, Eq)]
115#[repr(u8)]
116pub enum TMR_CLK_SRC_A {
117 #[doc = "0: `0`"]
118 LOSC = 0,
119 #[doc = "1: `1`"]
120 OSC24_M = 1,
121}
122impl From<TMR_CLK_SRC_A> for u8 {
123 #[inline(always)]
124 fn from(variant: TMR_CLK_SRC_A) -> Self {
125 variant as _
126 }
127}
128impl crate::FieldSpec for TMR_CLK_SRC_A {
129 type Ux = u8;
130}
131impl TMR_CLK_SRC_R {
132 #[doc = "Get enumerated values variant"]
133 #[inline(always)]
134 pub const fn variant(&self) -> Option<TMR_CLK_SRC_A> {
135 match self.bits {
136 0 => Some(TMR_CLK_SRC_A::LOSC),
137 1 => Some(TMR_CLK_SRC_A::OSC24_M),
138 _ => None,
139 }
140 }
141 #[doc = "`0`"]
142 #[inline(always)]
143 pub fn is_losc(&self) -> bool {
144 *self == TMR_CLK_SRC_A::LOSC
145 }
146 #[doc = "`1`"]
147 #[inline(always)]
148 pub fn is_osc24_m(&self) -> bool {
149 *self == TMR_CLK_SRC_A::OSC24_M
150 }
151}
152#[doc = "Field `tmr_clk_src` writer - "]
153pub type TMR_CLK_SRC_W<'a, REG> = crate::FieldWriter<'a, REG, 2, TMR_CLK_SRC_A>;
154impl<'a, REG> TMR_CLK_SRC_W<'a, REG>
155where
156 REG: crate::Writable + crate::RegisterSpec,
157 REG::Ux: From<u8>,
158{
159 #[doc = "`0`"]
160 #[inline(always)]
161 pub fn losc(self) -> &'a mut crate::W<REG> {
162 self.variant(TMR_CLK_SRC_A::LOSC)
163 }
164 #[doc = "`1`"]
165 #[inline(always)]
166 pub fn osc24_m(self) -> &'a mut crate::W<REG> {
167 self.variant(TMR_CLK_SRC_A::OSC24_M)
168 }
169}
170#[doc = "Field `tmr_clk_pres` reader - "]
171pub type TMR_CLK_PRES_R = crate::FieldReader<TMR_CLK_PRES_A>;
172#[doc = "\n\nValue on reset: 0"]
173#[derive(Clone, Copy, Debug, PartialEq, Eq)]
174#[repr(u8)]
175pub enum TMR_CLK_PRES_A {
176 #[doc = "0: `0`"]
177 P1 = 0,
178 #[doc = "1: `1`"]
179 P2 = 1,
180 #[doc = "2: `10`"]
181 P4 = 2,
182 #[doc = "3: `11`"]
183 P8 = 3,
184 #[doc = "4: `100`"]
185 P16 = 4,
186 #[doc = "5: `101`"]
187 P32 = 5,
188 #[doc = "6: `110`"]
189 P64 = 6,
190 #[doc = "7: `111`"]
191 P128 = 7,
192}
193impl From<TMR_CLK_PRES_A> for u8 {
194 #[inline(always)]
195 fn from(variant: TMR_CLK_PRES_A) -> Self {
196 variant as _
197 }
198}
199impl crate::FieldSpec for TMR_CLK_PRES_A {
200 type Ux = u8;
201}
202impl TMR_CLK_PRES_R {
203 #[doc = "Get enumerated values variant"]
204 #[inline(always)]
205 pub const fn variant(&self) -> TMR_CLK_PRES_A {
206 match self.bits {
207 0 => TMR_CLK_PRES_A::P1,
208 1 => TMR_CLK_PRES_A::P2,
209 2 => TMR_CLK_PRES_A::P4,
210 3 => TMR_CLK_PRES_A::P8,
211 4 => TMR_CLK_PRES_A::P16,
212 5 => TMR_CLK_PRES_A::P32,
213 6 => TMR_CLK_PRES_A::P64,
214 7 => TMR_CLK_PRES_A::P128,
215 _ => unreachable!(),
216 }
217 }
218 #[doc = "`0`"]
219 #[inline(always)]
220 pub fn is_p1(&self) -> bool {
221 *self == TMR_CLK_PRES_A::P1
222 }
223 #[doc = "`1`"]
224 #[inline(always)]
225 pub fn is_p2(&self) -> bool {
226 *self == TMR_CLK_PRES_A::P2
227 }
228 #[doc = "`10`"]
229 #[inline(always)]
230 pub fn is_p4(&self) -> bool {
231 *self == TMR_CLK_PRES_A::P4
232 }
233 #[doc = "`11`"]
234 #[inline(always)]
235 pub fn is_p8(&self) -> bool {
236 *self == TMR_CLK_PRES_A::P8
237 }
238 #[doc = "`100`"]
239 #[inline(always)]
240 pub fn is_p16(&self) -> bool {
241 *self == TMR_CLK_PRES_A::P16
242 }
243 #[doc = "`101`"]
244 #[inline(always)]
245 pub fn is_p32(&self) -> bool {
246 *self == TMR_CLK_PRES_A::P32
247 }
248 #[doc = "`110`"]
249 #[inline(always)]
250 pub fn is_p64(&self) -> bool {
251 *self == TMR_CLK_PRES_A::P64
252 }
253 #[doc = "`111`"]
254 #[inline(always)]
255 pub fn is_p128(&self) -> bool {
256 *self == TMR_CLK_PRES_A::P128
257 }
258}
259#[doc = "Field `tmr_clk_pres` writer - "]
260pub type TMR_CLK_PRES_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, TMR_CLK_PRES_A>;
261impl<'a, REG> TMR_CLK_PRES_W<'a, REG>
262where
263 REG: crate::Writable + crate::RegisterSpec,
264 REG::Ux: From<u8>,
265{
266 #[doc = "`0`"]
267 #[inline(always)]
268 pub fn p1(self) -> &'a mut crate::W<REG> {
269 self.variant(TMR_CLK_PRES_A::P1)
270 }
271 #[doc = "`1`"]
272 #[inline(always)]
273 pub fn p2(self) -> &'a mut crate::W<REG> {
274 self.variant(TMR_CLK_PRES_A::P2)
275 }
276 #[doc = "`10`"]
277 #[inline(always)]
278 pub fn p4(self) -> &'a mut crate::W<REG> {
279 self.variant(TMR_CLK_PRES_A::P4)
280 }
281 #[doc = "`11`"]
282 #[inline(always)]
283 pub fn p8(self) -> &'a mut crate::W<REG> {
284 self.variant(TMR_CLK_PRES_A::P8)
285 }
286 #[doc = "`100`"]
287 #[inline(always)]
288 pub fn p16(self) -> &'a mut crate::W<REG> {
289 self.variant(TMR_CLK_PRES_A::P16)
290 }
291 #[doc = "`101`"]
292 #[inline(always)]
293 pub fn p32(self) -> &'a mut crate::W<REG> {
294 self.variant(TMR_CLK_PRES_A::P32)
295 }
296 #[doc = "`110`"]
297 #[inline(always)]
298 pub fn p64(self) -> &'a mut crate::W<REG> {
299 self.variant(TMR_CLK_PRES_A::P64)
300 }
301 #[doc = "`111`"]
302 #[inline(always)]
303 pub fn p128(self) -> &'a mut crate::W<REG> {
304 self.variant(TMR_CLK_PRES_A::P128)
305 }
306}
307#[doc = "Field `tmr_mode` reader - "]
308pub type TMR_MODE_R = crate::BitReader<TMR_MODE_A>;
309#[doc = "\n\nValue on reset: 0"]
310#[derive(Clone, Copy, Debug, PartialEq, Eq)]
311pub enum TMR_MODE_A {
312 #[doc = "0: `0`"]
313 PERIODIC = 0,
314 #[doc = "1: `1`"]
315 SINGLE_COUNTING = 1,
316}
317impl From<TMR_MODE_A> for bool {
318 #[inline(always)]
319 fn from(variant: TMR_MODE_A) -> Self {
320 variant as u8 != 0
321 }
322}
323impl TMR_MODE_R {
324 #[doc = "Get enumerated values variant"]
325 #[inline(always)]
326 pub const fn variant(&self) -> TMR_MODE_A {
327 match self.bits {
328 false => TMR_MODE_A::PERIODIC,
329 true => TMR_MODE_A::SINGLE_COUNTING,
330 }
331 }
332 #[doc = "`0`"]
333 #[inline(always)]
334 pub fn is_periodic(&self) -> bool {
335 *self == TMR_MODE_A::PERIODIC
336 }
337 #[doc = "`1`"]
338 #[inline(always)]
339 pub fn is_single_counting(&self) -> bool {
340 *self == TMR_MODE_A::SINGLE_COUNTING
341 }
342}
343#[doc = "Field `tmr_mode` writer - "]
344pub type TMR_MODE_W<'a, REG> = crate::BitWriter<'a, REG, TMR_MODE_A>;
345impl<'a, REG> TMR_MODE_W<'a, REG>
346where
347 REG: crate::Writable + crate::RegisterSpec,
348{
349 #[doc = "`0`"]
350 #[inline(always)]
351 pub fn periodic(self) -> &'a mut crate::W<REG> {
352 self.variant(TMR_MODE_A::PERIODIC)
353 }
354 #[doc = "`1`"]
355 #[inline(always)]
356 pub fn single_counting(self) -> &'a mut crate::W<REG> {
357 self.variant(TMR_MODE_A::SINGLE_COUNTING)
358 }
359}
360impl R {
361 #[doc = "Bit 0"]
362 #[inline(always)]
363 pub fn tmr_en(&self) -> TMR_EN_R {
364 TMR_EN_R::new((self.bits & 1) != 0)
365 }
366 #[doc = "Bit 1"]
367 #[inline(always)]
368 pub fn tmr_reload(&self) -> TMR_RELOAD_R {
369 TMR_RELOAD_R::new(((self.bits >> 1) & 1) != 0)
370 }
371 #[doc = "Bits 2:3"]
372 #[inline(always)]
373 pub fn tmr_clk_src(&self) -> TMR_CLK_SRC_R {
374 TMR_CLK_SRC_R::new(((self.bits >> 2) & 3) as u8)
375 }
376 #[doc = "Bits 4:6"]
377 #[inline(always)]
378 pub fn tmr_clk_pres(&self) -> TMR_CLK_PRES_R {
379 TMR_CLK_PRES_R::new(((self.bits >> 4) & 7) as u8)
380 }
381 #[doc = "Bit 7"]
382 #[inline(always)]
383 pub fn tmr_mode(&self) -> TMR_MODE_R {
384 TMR_MODE_R::new(((self.bits >> 7) & 1) != 0)
385 }
386}
387impl W {
388 #[doc = "Bit 0"]
389 #[inline(always)]
390 #[must_use]
391 pub fn tmr_en(&mut self) -> TMR_EN_W<TMR_CTRL_SPEC> {
392 TMR_EN_W::new(self, 0)
393 }
394 #[doc = "Bit 1"]
395 #[inline(always)]
396 #[must_use]
397 pub fn tmr_reload(&mut self) -> TMR_RELOAD_W<TMR_CTRL_SPEC> {
398 TMR_RELOAD_W::new(self, 1)
399 }
400 #[doc = "Bits 2:3"]
401 #[inline(always)]
402 #[must_use]
403 pub fn tmr_clk_src(&mut self) -> TMR_CLK_SRC_W<TMR_CTRL_SPEC> {
404 TMR_CLK_SRC_W::new(self, 2)
405 }
406 #[doc = "Bits 4:6"]
407 #[inline(always)]
408 #[must_use]
409 pub fn tmr_clk_pres(&mut self) -> TMR_CLK_PRES_W<TMR_CTRL_SPEC> {
410 TMR_CLK_PRES_W::new(self, 4)
411 }
412 #[doc = "Bit 7"]
413 #[inline(always)]
414 #[must_use]
415 pub fn tmr_mode(&mut self) -> TMR_MODE_W<TMR_CTRL_SPEC> {
416 TMR_MODE_W::new(self, 7)
417 }
418 #[doc = r" Writes raw bits to the register."]
419 #[doc = r""]
420 #[doc = r" # Safety"]
421 #[doc = r""]
422 #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
423 #[inline(always)]
424 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
425 self.bits = bits;
426 self
427 }
428}
429#[doc = "Timer IRQ Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tmr_ctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tmr_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
430pub struct TMR_CTRL_SPEC;
431impl crate::RegisterSpec for TMR_CTRL_SPEC {
432 type Ux = u32;
433}
434#[doc = "`read()` method returns [`tmr_ctrl::R`](R) reader structure"]
435impl crate::Readable for TMR_CTRL_SPEC {}
436#[doc = "`write(|w| ..)` method takes [`tmr_ctrl::W`](W) writer structure"]
437impl crate::Writable for TMR_CTRL_SPEC {
438 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
439 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
440}
441#[doc = "`reset()` method sets tmr%s_ctrl to value 0"]
442impl crate::Resettable for TMR_CTRL_SPEC {
443 const RESET_VALUE: Self::Ux = 0;
444}