1#[doc = "Register `ths_filter` reader"]
2pub type R = crate::R<THS_FILTER_SPEC>;
3#[doc = "Register `ths_filter` writer"]
4pub type W = crate::W<THS_FILTER_SPEC>;
5#[doc = "Field `filter_type` reader - Averaging filter type"]
6pub type FILTER_TYPE_R = crate::FieldReader<FILTER_TYPE_A>;
7#[doc = "Averaging filter type\n\nValue on reset: 1"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9#[repr(u8)]
10pub enum FILTER_TYPE_A {
11 #[doc = "0: 2"]
12 T2 = 0,
13 #[doc = "1: 4"]
14 T4 = 1,
15 #[doc = "2: 8"]
16 T8 = 2,
17 #[doc = "3: 16"]
18 T16 = 3,
19}
20impl From<FILTER_TYPE_A> for u8 {
21 #[inline(always)]
22 fn from(variant: FILTER_TYPE_A) -> Self {
23 variant as _
24 }
25}
26impl crate::FieldSpec for FILTER_TYPE_A {
27 type Ux = u8;
28}
29impl FILTER_TYPE_R {
30 #[doc = "Get enumerated values variant"]
31 #[inline(always)]
32 pub const fn variant(&self) -> FILTER_TYPE_A {
33 match self.bits {
34 0 => FILTER_TYPE_A::T2,
35 1 => FILTER_TYPE_A::T4,
36 2 => FILTER_TYPE_A::T8,
37 3 => FILTER_TYPE_A::T16,
38 _ => unreachable!(),
39 }
40 }
41 #[doc = "2"]
42 #[inline(always)]
43 pub fn is_t2(&self) -> bool {
44 *self == FILTER_TYPE_A::T2
45 }
46 #[doc = "4"]
47 #[inline(always)]
48 pub fn is_t4(&self) -> bool {
49 *self == FILTER_TYPE_A::T4
50 }
51 #[doc = "8"]
52 #[inline(always)]
53 pub fn is_t8(&self) -> bool {
54 *self == FILTER_TYPE_A::T8
55 }
56 #[doc = "16"]
57 #[inline(always)]
58 pub fn is_t16(&self) -> bool {
59 *self == FILTER_TYPE_A::T16
60 }
61}
62#[doc = "Field `filter_type` writer - Averaging filter type"]
63pub type FILTER_TYPE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, FILTER_TYPE_A>;
64impl<'a, REG> FILTER_TYPE_W<'a, REG>
65where
66 REG: crate::Writable + crate::RegisterSpec,
67 REG::Ux: From<u8>,
68{
69 #[doc = "2"]
70 #[inline(always)]
71 pub fn t2(self) -> &'a mut crate::W<REG> {
72 self.variant(FILTER_TYPE_A::T2)
73 }
74 #[doc = "4"]
75 #[inline(always)]
76 pub fn t4(self) -> &'a mut crate::W<REG> {
77 self.variant(FILTER_TYPE_A::T4)
78 }
79 #[doc = "8"]
80 #[inline(always)]
81 pub fn t8(self) -> &'a mut crate::W<REG> {
82 self.variant(FILTER_TYPE_A::T8)
83 }
84 #[doc = "16"]
85 #[inline(always)]
86 pub fn t16(self) -> &'a mut crate::W<REG> {
87 self.variant(FILTER_TYPE_A::T16)
88 }
89}
90#[doc = "Field `filter_en` reader - Filter enable"]
91pub type FILTER_EN_R = crate::BitReader<FILTER_EN_A>;
92#[doc = "Filter enable\n\nValue on reset: 0"]
93#[derive(Clone, Copy, Debug, PartialEq, Eq)]
94pub enum FILTER_EN_A {
95 #[doc = "0: Disable"]
96 DISABLE = 0,
97 #[doc = "1: Enable"]
98 ENABLE = 1,
99}
100impl From<FILTER_EN_A> for bool {
101 #[inline(always)]
102 fn from(variant: FILTER_EN_A) -> Self {
103 variant as u8 != 0
104 }
105}
106impl FILTER_EN_R {
107 #[doc = "Get enumerated values variant"]
108 #[inline(always)]
109 pub const fn variant(&self) -> FILTER_EN_A {
110 match self.bits {
111 false => FILTER_EN_A::DISABLE,
112 true => FILTER_EN_A::ENABLE,
113 }
114 }
115 #[doc = "Disable"]
116 #[inline(always)]
117 pub fn is_disable(&self) -> bool {
118 *self == FILTER_EN_A::DISABLE
119 }
120 #[doc = "Enable"]
121 #[inline(always)]
122 pub fn is_enable(&self) -> bool {
123 *self == FILTER_EN_A::ENABLE
124 }
125}
126#[doc = "Field `filter_en` writer - Filter enable"]
127pub type FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG, FILTER_EN_A>;
128impl<'a, REG> FILTER_EN_W<'a, REG>
129where
130 REG: crate::Writable + crate::RegisterSpec,
131{
132 #[doc = "Disable"]
133 #[inline(always)]
134 pub fn disable(self) -> &'a mut crate::W<REG> {
135 self.variant(FILTER_EN_A::DISABLE)
136 }
137 #[doc = "Enable"]
138 #[inline(always)]
139 pub fn enable(self) -> &'a mut crate::W<REG> {
140 self.variant(FILTER_EN_A::ENABLE)
141 }
142}
143impl R {
144 #[doc = "Bits 0:1 - Averaging filter type"]
145 #[inline(always)]
146 pub fn filter_type(&self) -> FILTER_TYPE_R {
147 FILTER_TYPE_R::new((self.bits & 3) as u8)
148 }
149 #[doc = "Bit 2 - Filter enable"]
150 #[inline(always)]
151 pub fn filter_en(&self) -> FILTER_EN_R {
152 FILTER_EN_R::new(((self.bits >> 2) & 1) != 0)
153 }
154}
155impl W {
156 #[doc = "Bits 0:1 - Averaging filter type"]
157 #[inline(always)]
158 #[must_use]
159 pub fn filter_type(&mut self) -> FILTER_TYPE_W<THS_FILTER_SPEC> {
160 FILTER_TYPE_W::new(self, 0)
161 }
162 #[doc = "Bit 2 - Filter enable"]
163 #[inline(always)]
164 #[must_use]
165 pub fn filter_en(&mut self) -> FILTER_EN_W<THS_FILTER_SPEC> {
166 FILTER_EN_W::new(self, 2)
167 }
168 #[doc = r" Writes raw bits to the register."]
169 #[doc = r""]
170 #[doc = r" # Safety"]
171 #[doc = r""]
172 #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
173 #[inline(always)]
174 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
175 self.bits = bits;
176 self
177 }
178}
179#[doc = "THS Median Filter Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ths_filter::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ths_filter::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
180pub struct THS_FILTER_SPEC;
181impl crate::RegisterSpec for THS_FILTER_SPEC {
182 type Ux = u32;
183}
184#[doc = "`read()` method returns [`ths_filter::R`](R) reader structure"]
185impl crate::Readable for THS_FILTER_SPEC {}
186#[doc = "`write(|w| ..)` method takes [`ths_filter::W`](W) writer structure"]
187impl crate::Writable for THS_FILTER_SPEC {
188 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
189 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
190}
191#[doc = "`reset()` method sets ths_filter to value 0x01"]
192impl crate::Resettable for THS_FILTER_SPEC {
193 const RESET_VALUE: Self::Ux = 0x01;
194}