d1_pac/tcon_tv0/
tv_gint1.rs

1#[doc = "Register `tv_gint1` reader"]
2pub type R = crate::R<TV_GINT1_SPEC>;
3#[doc = "Register `tv_gint1` writer"]
4pub type W = crate::W<TV_GINT1_SPEC>;
5#[doc = "Field `tv_line_int_num` reader - Scan line for TV line trigger(including inactive lines)\n\nSetting it for the specified line for trigger 1.\n\nNote: SY1 is writable only when LINE_TRG1 is disabled."]
6pub type TV_LINE_INT_NUM_R = crate::FieldReader<u16>;
7#[doc = "Field `tv_line_int_num` writer - Scan line for TV line trigger(including inactive lines)\n\nSetting it for the specified line for trigger 1.\n\nNote: SY1 is writable only when LINE_TRG1 is disabled."]
8pub type TV_LINE_INT_NUM_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>;
9impl R {
10    #[doc = "Bits 0:11 - Scan line for TV line trigger(including inactive lines)\n\nSetting it for the specified line for trigger 1.\n\nNote: SY1 is writable only when LINE_TRG1 is disabled."]
11    #[inline(always)]
12    pub fn tv_line_int_num(&self) -> TV_LINE_INT_NUM_R {
13        TV_LINE_INT_NUM_R::new((self.bits & 0x0fff) as u16)
14    }
15}
16impl W {
17    #[doc = "Bits 0:11 - Scan line for TV line trigger(including inactive lines)\n\nSetting it for the specified line for trigger 1.\n\nNote: SY1 is writable only when LINE_TRG1 is disabled."]
18    #[inline(always)]
19    #[must_use]
20    pub fn tv_line_int_num(&mut self) -> TV_LINE_INT_NUM_W<TV_GINT1_SPEC> {
21        TV_LINE_INT_NUM_W::new(self, 0)
22    }
23    #[doc = r" Writes raw bits to the register."]
24    #[doc = r""]
25    #[doc = r" # Safety"]
26    #[doc = r""]
27    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
28    #[inline(always)]
29    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
30        self.bits = bits;
31        self
32    }
33}
34#[doc = "TV Global Interrupt Register1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_gint1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_gint1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
35pub struct TV_GINT1_SPEC;
36impl crate::RegisterSpec for TV_GINT1_SPEC {
37    type Ux = u32;
38}
39#[doc = "`read()` method returns [`tv_gint1::R`](R) reader structure"]
40impl crate::Readable for TV_GINT1_SPEC {}
41#[doc = "`write(|w| ..)` method takes [`tv_gint1::W`](W) writer structure"]
42impl crate::Writable for TV_GINT1_SPEC {
43    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
44    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
45}
46#[doc = "`reset()` method sets tv_gint1 to value 0"]
47impl crate::Resettable for TV_GINT1_SPEC {
48    const RESET_VALUE: Self::Ux = 0;
49}
d1_pac/tcon_tv0/tv_gint1.rs

d1_pac/tcon_tv0/
tv_gint1.rs
