d1_pac/tcon_tv0/
tv_gint0.rs

1#[doc = "Register `tv_gint0` reader"]
2pub type R = crate::R<TV_GINT0_SPEC>;
3#[doc = "Register `tv_gint0` writer"]
4pub type W = crate::W<TV_GINT0_SPEC>;
5#[doc = "Field `tv_line_int_flag` reader - TV Line Interrupt Flag\n\nTrigger when SY1 match the current TV scan line\n\nWrite 0 to clear it."]
6pub type TV_LINE_INT_FLAG_R = crate::BitReader;
7#[doc = "Field `tv_line_int_flag` writer - TV Line Interrupt Flag\n\nTrigger when SY1 match the current TV scan line\n\nWrite 0 to clear it."]
8pub type TV_LINE_INT_FLAG_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `tv_vb_int_flag` reader - TV Vb Interrupt Flag\n\nAsserted during vertical no-display period every frame.\n\nWrite 0 to clear it."]
10pub type TV_VB_INT_FLAG_R = crate::BitReader;
11#[doc = "Field `tv_vb_int_flag` writer - TV Vb Interrupt Flag\n\nAsserted during vertical no-display period every frame.\n\nWrite 0 to clear it."]
12pub type TV_VB_INT_FLAG_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `tv_line_int_en` reader - TV Line Interrupt Enable"]
14pub type TV_LINE_INT_EN_R = crate::BitReader<TV_LINE_INT_EN_A>;
15#[doc = "TV Line Interrupt Enable\n\nValue on reset: 0"]
16#[derive(Clone, Copy, Debug, PartialEq, Eq)]
17pub enum TV_LINE_INT_EN_A {
18    #[doc = "0: Disable"]
19    DISABLE = 0,
20    #[doc = "1: Enable"]
21    ENABLE = 1,
22}
23impl From<TV_LINE_INT_EN_A> for bool {
24    #[inline(always)]
25    fn from(variant: TV_LINE_INT_EN_A) -> Self {
26        variant as u8 != 0
27    }
28}
29impl TV_LINE_INT_EN_R {
30    #[doc = "Get enumerated values variant"]
31    #[inline(always)]
32    pub const fn variant(&self) -> TV_LINE_INT_EN_A {
33        match self.bits {
34            false => TV_LINE_INT_EN_A::DISABLE,
35            true => TV_LINE_INT_EN_A::ENABLE,
36        }
37    }
38    #[doc = "Disable"]
39    #[inline(always)]
40    pub fn is_disable(&self) -> bool {
41        *self == TV_LINE_INT_EN_A::DISABLE
42    }
43    #[doc = "Enable"]
44    #[inline(always)]
45    pub fn is_enable(&self) -> bool {
46        *self == TV_LINE_INT_EN_A::ENABLE
47    }
48}
49#[doc = "Field `tv_line_int_en` writer - TV Line Interrupt Enable"]
50pub type TV_LINE_INT_EN_W<'a, REG> = crate::BitWriter<'a, REG, TV_LINE_INT_EN_A>;
51impl<'a, REG> TV_LINE_INT_EN_W<'a, REG>
52where
53    REG: crate::Writable + crate::RegisterSpec,
54{
55    #[doc = "Disable"]
56    #[inline(always)]
57    pub fn disable(self) -> &'a mut crate::W<REG> {
58        self.variant(TV_LINE_INT_EN_A::DISABLE)
59    }
60    #[doc = "Enable"]
61    #[inline(always)]
62    pub fn enable(self) -> &'a mut crate::W<REG> {
63        self.variant(TV_LINE_INT_EN_A::ENABLE)
64    }
65}
66#[doc = "Field `tv_vb_int_en` reader - TV Vb Interrupt Enable"]
67pub type TV_VB_INT_EN_R = crate::BitReader<TV_VB_INT_EN_A>;
68#[doc = "TV Vb Interrupt Enable\n\nValue on reset: 0"]
69#[derive(Clone, Copy, Debug, PartialEq, Eq)]
70pub enum TV_VB_INT_EN_A {
71    #[doc = "0: Disable"]
72    DISABLE = 0,
73    #[doc = "1: Enable"]
74    ENABLE = 1,
75}
76impl From<TV_VB_INT_EN_A> for bool {
77    #[inline(always)]
78    fn from(variant: TV_VB_INT_EN_A) -> Self {
79        variant as u8 != 0
80    }
81}
82impl TV_VB_INT_EN_R {
83    #[doc = "Get enumerated values variant"]
84    #[inline(always)]
85    pub const fn variant(&self) -> TV_VB_INT_EN_A {
86        match self.bits {
87            false => TV_VB_INT_EN_A::DISABLE,
88            true => TV_VB_INT_EN_A::ENABLE,
89        }
90    }
91    #[doc = "Disable"]
92    #[inline(always)]
93    pub fn is_disable(&self) -> bool {
94        *self == TV_VB_INT_EN_A::DISABLE
95    }
96    #[doc = "Enable"]
97    #[inline(always)]
98    pub fn is_enable(&self) -> bool {
99        *self == TV_VB_INT_EN_A::ENABLE
100    }
101}
102#[doc = "Field `tv_vb_int_en` writer - TV Vb Interrupt Enable"]
103pub type TV_VB_INT_EN_W<'a, REG> = crate::BitWriter<'a, REG, TV_VB_INT_EN_A>;
104impl<'a, REG> TV_VB_INT_EN_W<'a, REG>
105where
106    REG: crate::Writable + crate::RegisterSpec,
107{
108    #[doc = "Disable"]
109    #[inline(always)]
110    pub fn disable(self) -> &'a mut crate::W<REG> {
111        self.variant(TV_VB_INT_EN_A::DISABLE)
112    }
113    #[doc = "Enable"]
114    #[inline(always)]
115    pub fn enable(self) -> &'a mut crate::W<REG> {
116        self.variant(TV_VB_INT_EN_A::ENABLE)
117    }
118}
119impl R {
120    #[doc = "Bit 12 - TV Line Interrupt Flag\n\nTrigger when SY1 match the current TV scan line\n\nWrite 0 to clear it."]
121    #[inline(always)]
122    pub fn tv_line_int_flag(&self) -> TV_LINE_INT_FLAG_R {
123        TV_LINE_INT_FLAG_R::new(((self.bits >> 12) & 1) != 0)
124    }
125    #[doc = "Bit 14 - TV Vb Interrupt Flag\n\nAsserted during vertical no-display period every frame.\n\nWrite 0 to clear it."]
126    #[inline(always)]
127    pub fn tv_vb_int_flag(&self) -> TV_VB_INT_FLAG_R {
128        TV_VB_INT_FLAG_R::new(((self.bits >> 14) & 1) != 0)
129    }
130    #[doc = "Bit 28 - TV Line Interrupt Enable"]
131    #[inline(always)]
132    pub fn tv_line_int_en(&self) -> TV_LINE_INT_EN_R {
133        TV_LINE_INT_EN_R::new(((self.bits >> 28) & 1) != 0)
134    }
135    #[doc = "Bit 30 - TV Vb Interrupt Enable"]
136    #[inline(always)]
137    pub fn tv_vb_int_en(&self) -> TV_VB_INT_EN_R {
138        TV_VB_INT_EN_R::new(((self.bits >> 30) & 1) != 0)
139    }
140}
141impl W {
142    #[doc = "Bit 12 - TV Line Interrupt Flag\n\nTrigger when SY1 match the current TV scan line\n\nWrite 0 to clear it."]
143    #[inline(always)]
144    #[must_use]
145    pub fn tv_line_int_flag(&mut self) -> TV_LINE_INT_FLAG_W<TV_GINT0_SPEC> {
146        TV_LINE_INT_FLAG_W::new(self, 12)
147    }
148    #[doc = "Bit 14 - TV Vb Interrupt Flag\n\nAsserted during vertical no-display period every frame.\n\nWrite 0 to clear it."]
149    #[inline(always)]
150    #[must_use]
151    pub fn tv_vb_int_flag(&mut self) -> TV_VB_INT_FLAG_W<TV_GINT0_SPEC> {
152        TV_VB_INT_FLAG_W::new(self, 14)
153    }
154    #[doc = "Bit 28 - TV Line Interrupt Enable"]
155    #[inline(always)]
156    #[must_use]
157    pub fn tv_line_int_en(&mut self) -> TV_LINE_INT_EN_W<TV_GINT0_SPEC> {
158        TV_LINE_INT_EN_W::new(self, 28)
159    }
160    #[doc = "Bit 30 - TV Vb Interrupt Enable"]
161    #[inline(always)]
162    #[must_use]
163    pub fn tv_vb_int_en(&mut self) -> TV_VB_INT_EN_W<TV_GINT0_SPEC> {
164        TV_VB_INT_EN_W::new(self, 30)
165    }
166    #[doc = r" Writes raw bits to the register."]
167    #[doc = r""]
168    #[doc = r" # Safety"]
169    #[doc = r""]
170    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
171    #[inline(always)]
172    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
173        self.bits = bits;
174        self
175    }
176}
177#[doc = "TV Global Interrupt Register0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_gint0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_gint0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
178pub struct TV_GINT0_SPEC;
179impl crate::RegisterSpec for TV_GINT0_SPEC {
180    type Ux = u32;
181}
182#[doc = "`read()` method returns [`tv_gint0::R`](R) reader structure"]
183impl crate::Readable for TV_GINT0_SPEC {}
184#[doc = "`write(|w| ..)` method takes [`tv_gint0::W`](W) writer structure"]
185impl crate::Writable for TV_GINT0_SPEC {
186    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
187    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
188}
189#[doc = "`reset()` method sets tv_gint0 to value 0"]
190impl crate::Resettable for TV_GINT0_SPEC {
191    const RESET_VALUE: Self::Ux = 0;
192}
d1_pac/tcon_tv0/tv_gint0.rs

d1_pac/tcon_tv0/
tv_gint0.rs
