d1_pac/tcon_tv0/
tv_debug.rs

1#[doc = "Register `tv_debug` reader"]
2pub type R = crate::R<TV_DEBUG_SPEC>;
3#[doc = "Register `tv_debug` writer"]
4pub type W = crate::W<TV_DEBUG_SPEC>;
5#[doc = "Field `tv_current_line` reader - TV Current Line"]
6pub type TV_CURRENT_LINE_R = crate::FieldReader<u16>;
7#[doc = "Field `line_buf_bypass` reader - Line Buf fer Bypass"]
8pub type LINE_BUF_BYPASS_R = crate::BitReader<LINE_BUF_BYPASS_A>;
9#[doc = "Line Buf fer Bypass\n\nValue on reset: 0"]
10#[derive(Clone, Copy, Debug, PartialEq, Eq)]
11pub enum LINE_BUF_BYPASS_A {
12    #[doc = "0: Used"]
13    U_SED = 0,
14    #[doc = "1: Bypass"]
15    BYPASS = 1,
16}
17impl From<LINE_BUF_BYPASS_A> for bool {
18    #[inline(always)]
19    fn from(variant: LINE_BUF_BYPASS_A) -> Self {
20        variant as u8 != 0
21    }
22}
23impl LINE_BUF_BYPASS_R {
24    #[doc = "Get enumerated values variant"]
25    #[inline(always)]
26    pub const fn variant(&self) -> LINE_BUF_BYPASS_A {
27        match self.bits {
28            false => LINE_BUF_BYPASS_A::U_SED,
29            true => LINE_BUF_BYPASS_A::BYPASS,
30        }
31    }
32    #[doc = "Used"]
33    #[inline(always)]
34    pub fn is_u_sed(&self) -> bool {
35        *self == LINE_BUF_BYPASS_A::U_SED
36    }
37    #[doc = "Bypass"]
38    #[inline(always)]
39    pub fn is_bypass(&self) -> bool {
40        *self == LINE_BUF_BYPASS_A::BYPASS
41    }
42}
43#[doc = "Field `line_buf_bypass` writer - Line Buf fer Bypass"]
44pub type LINE_BUF_BYPASS_W<'a, REG> = crate::BitWriter<'a, REG, LINE_BUF_BYPASS_A>;
45impl<'a, REG> LINE_BUF_BYPASS_W<'a, REG>
46where
47    REG: crate::Writable + crate::RegisterSpec,
48{
49    #[doc = "Used"]
50    #[inline(always)]
51    pub fn u_sed(self) -> &'a mut crate::W<REG> {
52        self.variant(LINE_BUF_BYPASS_A::U_SED)
53    }
54    #[doc = "Bypass"]
55    #[inline(always)]
56    pub fn bypass(self) -> &'a mut crate::W<REG> {
57        self.variant(LINE_BUF_BYPASS_A::BYPASS)
58    }
59}
60#[doc = "Field `tv_field_pol` reader - TV Field Polarity"]
61pub type TV_FIELD_POL_R = crate::BitReader<TV_FIELD_POL_A>;
62#[doc = "TV Field Polarity\n\nValue on reset: 0"]
63#[derive(Clone, Copy, Debug, PartialEq, Eq)]
64pub enum TV_FIELD_POL_A {
65    #[doc = "0: Second field"]
66    SECOND = 0,
67    #[doc = "1: First field"]
68    FIRST = 1,
69}
70impl From<TV_FIELD_POL_A> for bool {
71    #[inline(always)]
72    fn from(variant: TV_FIELD_POL_A) -> Self {
73        variant as u8 != 0
74    }
75}
76impl TV_FIELD_POL_R {
77    #[doc = "Get enumerated values variant"]
78    #[inline(always)]
79    pub const fn variant(&self) -> TV_FIELD_POL_A {
80        match self.bits {
81            false => TV_FIELD_POL_A::SECOND,
82            true => TV_FIELD_POL_A::FIRST,
83        }
84    }
85    #[doc = "Second field"]
86    #[inline(always)]
87    pub fn is_second(&self) -> bool {
88        *self == TV_FIELD_POL_A::SECOND
89    }
90    #[doc = "First field"]
91    #[inline(always)]
92    pub fn is_first(&self) -> bool {
93        *self == TV_FIELD_POL_A::FIRST
94    }
95}
96#[doc = "Field `tv_fifo_u` reader - TV FIFO Underflow"]
97pub type TV_FIFO_U_R = crate::BitReader;
98#[doc = "Field `tv_fifo_u` writer - TV FIFO Underflow"]
99pub type TV_FIFO_U_W<'a, REG> = crate::BitWriter<'a, REG>;
100impl R {
101    #[doc = "Bits 0:11 - TV Current Line"]
102    #[inline(always)]
103    pub fn tv_current_line(&self) -> TV_CURRENT_LINE_R {
104        TV_CURRENT_LINE_R::new((self.bits & 0x0fff) as u16)
105    }
106    #[doc = "Bit 13 - Line Buf fer Bypass"]
107    #[inline(always)]
108    pub fn line_buf_bypass(&self) -> LINE_BUF_BYPASS_R {
109        LINE_BUF_BYPASS_R::new(((self.bits >> 13) & 1) != 0)
110    }
111    #[doc = "Bit 28 - TV Field Polarity"]
112    #[inline(always)]
113    pub fn tv_field_pol(&self) -> TV_FIELD_POL_R {
114        TV_FIELD_POL_R::new(((self.bits >> 28) & 1) != 0)
115    }
116    #[doc = "Bit 30 - TV FIFO Underflow"]
117    #[inline(always)]
118    pub fn tv_fifo_u(&self) -> TV_FIFO_U_R {
119        TV_FIFO_U_R::new(((self.bits >> 30) & 1) != 0)
120    }
121}
122impl W {
123    #[doc = "Bit 13 - Line Buf fer Bypass"]
124    #[inline(always)]
125    #[must_use]
126    pub fn line_buf_bypass(&mut self) -> LINE_BUF_BYPASS_W<TV_DEBUG_SPEC> {
127        LINE_BUF_BYPASS_W::new(self, 13)
128    }
129    #[doc = "Bit 30 - TV FIFO Underflow"]
130    #[inline(always)]
131    #[must_use]
132    pub fn tv_fifo_u(&mut self) -> TV_FIFO_U_W<TV_DEBUG_SPEC> {
133        TV_FIFO_U_W::new(self, 30)
134    }
135    #[doc = r" Writes raw bits to the register."]
136    #[doc = r""]
137    #[doc = r" # Safety"]
138    #[doc = r""]
139    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
140    #[inline(always)]
141    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
142        self.bits = bits;
143        self
144    }
145}
146#[doc = "TV Debug Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_debug::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_debug::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
147pub struct TV_DEBUG_SPEC;
148impl crate::RegisterSpec for TV_DEBUG_SPEC {
149    type Ux = u32;
150}
151#[doc = "`read()` method returns [`tv_debug::R`](R) reader structure"]
152impl crate::Readable for TV_DEBUG_SPEC {}
153#[doc = "`write(|w| ..)` method takes [`tv_debug::W`](W) writer structure"]
154impl crate::Writable for TV_DEBUG_SPEC {
155    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
156    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
157}
158#[doc = "`reset()` method sets tv_debug to value 0"]
159impl crate::Resettable for TV_DEBUG_SPEC {
160    const RESET_VALUE: Self::Ux = 0;
161}
d1_pac/tcon_tv0/tv_debug.rs

d1_pac/tcon_tv0/
tv_debug.rs
