d1_pac/tcon_tv0/
tv_data_io_tri1.rs

1#[doc = "Register `tv_data_io_tri1` reader"]
2pub type R = crate::R<TV_DATA_IO_TRI1_SPEC>;
3#[doc = "Register `tv_data_io_tri1` writer"]
4pub type W = crate::W<TV_DATA_IO_TRI1_SPEC>;
5#[doc = "Field `b_cr_ch_data_out_tri_en` reader - B CR Channel Data Output Trigger Enable"]
6pub type B_CR_CH_DATA_OUT_TRI_EN_R = crate::FieldReader<B_CR_CH_DATA_OUT_TRI_EN_A>;
7#[doc = "B CR Channel Data Output Trigger Enable\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9#[repr(u16)]
10pub enum B_CR_CH_DATA_OUT_TRI_EN_A {
11    #[doc = "0: disable"]
12    DISABLE = 0,
13    #[doc = "1: enable"]
14    ENABLE = 1,
15}
16impl From<B_CR_CH_DATA_OUT_TRI_EN_A> for u16 {
17    #[inline(always)]
18    fn from(variant: B_CR_CH_DATA_OUT_TRI_EN_A) -> Self {
19        variant as _
20    }
21}
22impl crate::FieldSpec for B_CR_CH_DATA_OUT_TRI_EN_A {
23    type Ux = u16;
24}
25impl B_CR_CH_DATA_OUT_TRI_EN_R {
26    #[doc = "Get enumerated values variant"]
27    #[inline(always)]
28    pub const fn variant(&self) -> Option<B_CR_CH_DATA_OUT_TRI_EN_A> {
29        match self.bits {
30            0 => Some(B_CR_CH_DATA_OUT_TRI_EN_A::DISABLE),
31            1 => Some(B_CR_CH_DATA_OUT_TRI_EN_A::ENABLE),
32            _ => None,
33        }
34    }
35    #[doc = "disable"]
36    #[inline(always)]
37    pub fn is_disable(&self) -> bool {
38        *self == B_CR_CH_DATA_OUT_TRI_EN_A::DISABLE
39    }
40    #[doc = "enable"]
41    #[inline(always)]
42    pub fn is_enable(&self) -> bool {
43        *self == B_CR_CH_DATA_OUT_TRI_EN_A::ENABLE
44    }
45}
46#[doc = "Field `b_cr_ch_data_out_tri_en` writer - B CR Channel Data Output Trigger Enable"]
47pub type B_CR_CH_DATA_OUT_TRI_EN_W<'a, REG> =
48    crate::FieldWriter<'a, REG, 10, B_CR_CH_DATA_OUT_TRI_EN_A>;
49impl<'a, REG> B_CR_CH_DATA_OUT_TRI_EN_W<'a, REG>
50where
51    REG: crate::Writable + crate::RegisterSpec,
52    REG::Ux: From<u16>,
53{
54    #[doc = "disable"]
55    #[inline(always)]
56    pub fn disable(self) -> &'a mut crate::W<REG> {
57        self.variant(B_CR_CH_DATA_OUT_TRI_EN_A::DISABLE)
58    }
59    #[doc = "enable"]
60    #[inline(always)]
61    pub fn enable(self) -> &'a mut crate::W<REG> {
62        self.variant(B_CR_CH_DATA_OUT_TRI_EN_A::ENABLE)
63    }
64}
65impl R {
66    #[doc = "Bits 16:25 - B CR Channel Data Output Trigger Enable"]
67    #[inline(always)]
68    pub fn b_cr_ch_data_out_tri_en(&self) -> B_CR_CH_DATA_OUT_TRI_EN_R {
69        B_CR_CH_DATA_OUT_TRI_EN_R::new(((self.bits >> 16) & 0x03ff) as u16)
70    }
71}
72impl W {
73    #[doc = "Bits 16:25 - B CR Channel Data Output Trigger Enable"]
74    #[inline(always)]
75    #[must_use]
76    pub fn b_cr_ch_data_out_tri_en(&mut self) -> B_CR_CH_DATA_OUT_TRI_EN_W<TV_DATA_IO_TRI1_SPEC> {
77        B_CR_CH_DATA_OUT_TRI_EN_W::new(self, 16)
78    }
79    #[doc = r" Writes raw bits to the register."]
80    #[doc = r""]
81    #[doc = r" # Safety"]
82    #[doc = r""]
83    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
84    #[inline(always)]
85    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
86        self.bits = bits;
87        self
88    }
89}
90#[doc = "TCON Data IO Enable Control1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_data_io_tri1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_data_io_tri1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
91pub struct TV_DATA_IO_TRI1_SPEC;
92impl crate::RegisterSpec for TV_DATA_IO_TRI1_SPEC {
93    type Ux = u32;
94}
95#[doc = "`read()` method returns [`tv_data_io_tri1::R`](R) reader structure"]
96impl crate::Readable for TV_DATA_IO_TRI1_SPEC {}
97#[doc = "`write(|w| ..)` method takes [`tv_data_io_tri1::W`](W) writer structure"]
98impl crate::Writable for TV_DATA_IO_TRI1_SPEC {
99    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
100    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
101}
102#[doc = "`reset()` method sets tv_data_io_tri1 to value 0"]
103impl crate::Resettable for TV_DATA_IO_TRI1_SPEC {
104    const RESET_VALUE: Self::Ux = 0;
105}
d1_pac/tcon_tv0/tv_data_io_tri1.rs

d1_pac/tcon_tv0/
tv_data_io_tri1.rs
