d1_pac/
tcon_tv0.rs

1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4    tv_gctl: TV_GCTL,
5    tv_gint0: TV_GINT0,
6    tv_gint1: TV_GINT1,
7    _reserved3: [u8; 0x34],
8    tv_src_ctl: TV_SRC_CTL,
9    _reserved4: [u8; 0x44],
10    tv_io_pol: TV_IO_POL,
11    tv_io_tri: TV_IO_TRI,
12    tv_ctl: TV_CTL,
13    tv_basic0: TV_BASIC0,
14    tv_basic1: TV_BASIC1,
15    tv_basic2: TV_BASIC2,
16    tv_basic3: TV_BASIC3,
17    tv_basic4: TV_BASIC4,
18    tv_basic5: TV_BASIC5,
19    _reserved13: [u8; 0x50],
20    tv_debug: TV_DEBUG,
21    tv_ceu_ctl: TV_CEU_CTL,
22    _reserved15: [u8; 0x0c],
23    tv_ceu_coef_mul: [TV_CEU_COEF_MUL; 11],
24    _reserved16: [u8; 0x04],
25    tv_ceu_coef_rang: [TV_CEU_COEF_RANG; 3],
26    _reserved17: [u8; 0xa4],
27    tv_safe_period: TV_SAFE_PERIOD,
28    _reserved18: [u8; 0x010c],
29    tv_fill_ctl: TV_FILL_CTL,
30    tv_fill_begin: (),
31    _reserved20: [u8; 0x04],
32    tv_fill_end: (),
33    _reserved21: [u8; 0x04],
34    tv_fill_data: (),
35    _reserved22: [u8; 0x24],
36    tv_data_io_pol0: TV_DATA_IO_POL0,
37    tv_data_io_pol1: TV_DATA_IO_POL1,
38    tv_data_io_tri0: TV_DATA_IO_TRI0,
39    tv_data_io_tri1: TV_DATA_IO_TRI1,
40    tv_pixeldepth_mode: TV_PIXELDEPTH_MODE,
41}
42impl RegisterBlock {
43    #[doc = "0x00 - TV Global Control Register"]
44    #[inline(always)]
45    pub const fn tv_gctl(&self) -> &TV_GCTL {
46        &self.tv_gctl
47    }
48    #[doc = "0x04 - TV Global Interrupt Register0"]
49    #[inline(always)]
50    pub const fn tv_gint0(&self) -> &TV_GINT0 {
51        &self.tv_gint0
52    }
53    #[doc = "0x08 - TV Global Interrupt Register1"]
54    #[inline(always)]
55    pub const fn tv_gint1(&self) -> &TV_GINT1 {
56        &self.tv_gint1
57    }
58    #[doc = "0x40 - TV Source Control Register"]
59    #[inline(always)]
60    pub const fn tv_src_ctl(&self) -> &TV_SRC_CTL {
61        &self.tv_src_ctl
62    }
63    #[doc = "0x88 - TV SYNC Signal Polarity Register"]
64    #[inline(always)]
65    pub const fn tv_io_pol(&self) -> &TV_IO_POL {
66        &self.tv_io_pol
67    }
68    #[doc = "0x8c - TV SYNC Signal IO Control Register"]
69    #[inline(always)]
70    pub const fn tv_io_tri(&self) -> &TV_IO_TRI {
71        &self.tv_io_tri
72    }
73    #[doc = "0x90 - TV Control Register"]
74    #[inline(always)]
75    pub const fn tv_ctl(&self) -> &TV_CTL {
76        &self.tv_ctl
77    }
78    #[doc = "0x94 - TV Basic Timing Register0"]
79    #[inline(always)]
80    pub const fn tv_basic0(&self) -> &TV_BASIC0 {
81        &self.tv_basic0
82    }
83    #[doc = "0x98 - TV Basic Timing Register1"]
84    #[inline(always)]
85    pub const fn tv_basic1(&self) -> &TV_BASIC1 {
86        &self.tv_basic1
87    }
88    #[doc = "0x9c - TV Basic Timing Register2"]
89    #[inline(always)]
90    pub const fn tv_basic2(&self) -> &TV_BASIC2 {
91        &self.tv_basic2
92    }
93    #[doc = "0xa0 - TV Basic Timing Register3"]
94    #[inline(always)]
95    pub const fn tv_basic3(&self) -> &TV_BASIC3 {
96        &self.tv_basic3
97    }
98    #[doc = "0xa4 - TV Basic Timing Register4"]
99    #[inline(always)]
100    pub const fn tv_basic4(&self) -> &TV_BASIC4 {
101        &self.tv_basic4
102    }
103    #[doc = "0xa8 - TV Basic Timing Register5"]
104    #[inline(always)]
105    pub const fn tv_basic5(&self) -> &TV_BASIC5 {
106        &self.tv_basic5
107    }
108    #[doc = "0xfc - TV Debug Register"]
109    #[inline(always)]
110    pub const fn tv_debug(&self) -> &TV_DEBUG {
111        &self.tv_debug
112    }
113    #[doc = "0x100 - TV CEU Control Register"]
114    #[inline(always)]
115    pub const fn tv_ceu_ctl(&self) -> &TV_CEU_CTL {
116        &self.tv_ceu_ctl
117    }
118    #[doc = "0x110..0x13c - TV CEU Coefficient Register0"]
119    #[inline(always)]
120    pub const fn tv_ceu_coef_mul(&self, n: usize) -> &TV_CEU_COEF_MUL {
121        &self.tv_ceu_coef_mul[n]
122    }
123    #[doc = "0x140..0x14c - TV CEU Coefficient Register2"]
124    #[inline(always)]
125    pub const fn tv_ceu_coef_rang(&self, n: usize) -> &TV_CEU_COEF_RANG {
126        &self.tv_ceu_coef_rang[n]
127    }
128    #[doc = "0x1f0 - TV Safe Period Register"]
129    #[inline(always)]
130    pub const fn tv_safe_period(&self) -> &TV_SAFE_PERIOD {
131        &self.tv_safe_period
132    }
133    #[doc = "0x300 - TV Fill Data Control Register"]
134    #[inline(always)]
135    pub const fn tv_fill_ctl(&self) -> &TV_FILL_CTL {
136        &self.tv_fill_ctl
137    }
138    #[doc = "0x304..0x310 - TV Fill Data Begin Register"]
139    #[inline(always)]
140    pub const fn tv_fill_begin(&self, n: usize) -> &TV_FILL_BEGIN {
141        #[allow(clippy::no_effect)]
142        [(); 3][n];
143        unsafe {
144            &*(self as *const Self)
145                .cast::<u8>()
146                .add(772)
147                .add(12 * n)
148                .cast()
149        }
150    }
151    #[doc = "0x308..0x314 - TV Fill Data End Register"]
152    #[inline(always)]
153    pub const fn tv_fill_end(&self, n: usize) -> &TV_FILL_END {
154        #[allow(clippy::no_effect)]
155        [(); 3][n];
156        unsafe {
157            &*(self as *const Self)
158                .cast::<u8>()
159                .add(776)
160                .add(12 * n)
161                .cast()
162        }
163    }
164    #[doc = "0x30c..0x318 - TV Fill Data Value Register"]
165    #[inline(always)]
166    pub const fn tv_fill_data(&self, n: usize) -> &TV_FILL_DATA {
167        #[allow(clippy::no_effect)]
168        [(); 3][n];
169        unsafe {
170            &*(self as *const Self)
171                .cast::<u8>()
172                .add(780)
173                .add(12 * n)
174                .cast()
175        }
176    }
177    #[doc = "0x330 - TCON Data IO Polarity Control0"]
178    #[inline(always)]
179    pub const fn tv_data_io_pol0(&self) -> &TV_DATA_IO_POL0 {
180        &self.tv_data_io_pol0
181    }
182    #[doc = "0x334 - TCON Data IO Polarity Control1"]
183    #[inline(always)]
184    pub const fn tv_data_io_pol1(&self) -> &TV_DATA_IO_POL1 {
185        &self.tv_data_io_pol1
186    }
187    #[doc = "0x338 - TCON Data IO Enable Control0"]
188    #[inline(always)]
189    pub const fn tv_data_io_tri0(&self) -> &TV_DATA_IO_TRI0 {
190        &self.tv_data_io_tri0
191    }
192    #[doc = "0x33c - TCON Data IO Enable Control1"]
193    #[inline(always)]
194    pub const fn tv_data_io_tri1(&self) -> &TV_DATA_IO_TRI1 {
195        &self.tv_data_io_tri1
196    }
197    #[doc = "0x340 - TV Pixeldepth Mode Control Register"]
198    #[inline(always)]
199    pub const fn tv_pixeldepth_mode(&self) -> &TV_PIXELDEPTH_MODE {
200        &self.tv_pixeldepth_mode
201    }
202}
203#[doc = "tv_gctl (rw) register accessor: TV Global Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_gctl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_gctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tv_gctl`] module"]
204pub type TV_GCTL = crate::Reg<tv_gctl::TV_GCTL_SPEC>;
205#[doc = "TV Global Control Register"]
206pub mod tv_gctl;
207#[doc = "tv_gint0 (rw) register accessor: TV Global Interrupt Register0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_gint0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_gint0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tv_gint0`] module"]
208pub type TV_GINT0 = crate::Reg<tv_gint0::TV_GINT0_SPEC>;
209#[doc = "TV Global Interrupt Register0"]
210pub mod tv_gint0;
211#[doc = "tv_gint1 (rw) register accessor: TV Global Interrupt Register1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_gint1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_gint1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tv_gint1`] module"]
212pub type TV_GINT1 = crate::Reg<tv_gint1::TV_GINT1_SPEC>;
213#[doc = "TV Global Interrupt Register1"]
214pub mod tv_gint1;
215#[doc = "tv_src_ctl (rw) register accessor: TV Source Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_src_ctl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_src_ctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tv_src_ctl`] module"]
216pub type TV_SRC_CTL = crate::Reg<tv_src_ctl::TV_SRC_CTL_SPEC>;
217#[doc = "TV Source Control Register"]
218pub mod tv_src_ctl;
219#[doc = "tv_ctl (rw) register accessor: TV Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_ctl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_ctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tv_ctl`] module"]
220pub type TV_CTL = crate::Reg<tv_ctl::TV_CTL_SPEC>;
221#[doc = "TV Control Register"]
222pub mod tv_ctl;
223#[doc = "tv_basic0 (rw) register accessor: TV Basic Timing Register0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_basic0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_basic0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tv_basic0`] module"]
224pub type TV_BASIC0 = crate::Reg<tv_basic0::TV_BASIC0_SPEC>;
225#[doc = "TV Basic Timing Register0"]
226pub mod tv_basic0;
227#[doc = "tv_basic1 (rw) register accessor: TV Basic Timing Register1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_basic1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_basic1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tv_basic1`] module"]
228pub type TV_BASIC1 = crate::Reg<tv_basic1::TV_BASIC1_SPEC>;
229#[doc = "TV Basic Timing Register1"]
230pub mod tv_basic1;
231#[doc = "tv_basic2 (rw) register accessor: TV Basic Timing Register2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_basic2::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_basic2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tv_basic2`] module"]
232pub type TV_BASIC2 = crate::Reg<tv_basic2::TV_BASIC2_SPEC>;
233#[doc = "TV Basic Timing Register2"]
234pub mod tv_basic2;
235#[doc = "tv_basic3 (rw) register accessor: TV Basic Timing Register3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_basic3::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_basic3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tv_basic3`] module"]
236pub type TV_BASIC3 = crate::Reg<tv_basic3::TV_BASIC3_SPEC>;
237#[doc = "TV Basic Timing Register3"]
238pub mod tv_basic3;
239#[doc = "tv_basic4 (rw) register accessor: TV Basic Timing Register4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_basic4::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_basic4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tv_basic4`] module"]
240pub type TV_BASIC4 = crate::Reg<tv_basic4::TV_BASIC4_SPEC>;
241#[doc = "TV Basic Timing Register4"]
242pub mod tv_basic4;
243#[doc = "tv_basic5 (rw) register accessor: TV Basic Timing Register5\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_basic5::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_basic5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tv_basic5`] module"]
244pub type TV_BASIC5 = crate::Reg<tv_basic5::TV_BASIC5_SPEC>;
245#[doc = "TV Basic Timing Register5"]
246pub mod tv_basic5;
247#[doc = "tv_io_pol (rw) register accessor: TV SYNC Signal Polarity Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_io_pol::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_io_pol::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tv_io_pol`] module"]
248pub type TV_IO_POL = crate::Reg<tv_io_pol::TV_IO_POL_SPEC>;
249#[doc = "TV SYNC Signal Polarity Register"]
250pub mod tv_io_pol;
251#[doc = "tv_io_tri (rw) register accessor: TV SYNC Signal IO Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_io_tri::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_io_tri::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tv_io_tri`] module"]
252pub type TV_IO_TRI = crate::Reg<tv_io_tri::TV_IO_TRI_SPEC>;
253#[doc = "TV SYNC Signal IO Control Register"]
254pub mod tv_io_tri;
255#[doc = "tv_debug (rw) register accessor: TV Debug Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_debug::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_debug::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tv_debug`] module"]
256pub type TV_DEBUG = crate::Reg<tv_debug::TV_DEBUG_SPEC>;
257#[doc = "TV Debug Register"]
258pub mod tv_debug;
259#[doc = "tv_ceu_ctl (rw) register accessor: TV CEU Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_ceu_ctl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_ceu_ctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tv_ceu_ctl`] module"]
260pub type TV_CEU_CTL = crate::Reg<tv_ceu_ctl::TV_CEU_CTL_SPEC>;
261#[doc = "TV CEU Control Register"]
262pub mod tv_ceu_ctl;
263#[doc = "tv_ceu_coef_mul (rw) register accessor: TV CEU Coefficient Register0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_ceu_coef_mul::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_ceu_coef_mul::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tv_ceu_coef_mul`] module"]
264pub type TV_CEU_COEF_MUL = crate::Reg<tv_ceu_coef_mul::TV_CEU_COEF_MUL_SPEC>;
265#[doc = "TV CEU Coefficient Register0"]
266pub mod tv_ceu_coef_mul;
267#[doc = "tv_ceu_coef_rang (rw) register accessor: TV CEU Coefficient Register2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_ceu_coef_rang::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_ceu_coef_rang::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tv_ceu_coef_rang`] module"]
268pub type TV_CEU_COEF_RANG = crate::Reg<tv_ceu_coef_rang::TV_CEU_COEF_RANG_SPEC>;
269#[doc = "TV CEU Coefficient Register2"]
270pub mod tv_ceu_coef_rang;
271#[doc = "tv_safe_period (rw) register accessor: TV Safe Period Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_safe_period::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_safe_period::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tv_safe_period`] module"]
272pub type TV_SAFE_PERIOD = crate::Reg<tv_safe_period::TV_SAFE_PERIOD_SPEC>;
273#[doc = "TV Safe Period Register"]
274pub mod tv_safe_period;
275#[doc = "tv_fill_ctl (rw) register accessor: TV Fill Data Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_fill_ctl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_fill_ctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tv_fill_ctl`] module"]
276pub type TV_FILL_CTL = crate::Reg<tv_fill_ctl::TV_FILL_CTL_SPEC>;
277#[doc = "TV Fill Data Control Register"]
278pub mod tv_fill_ctl;
279#[doc = "tv_fill_begin (rw) register accessor: TV Fill Data Begin Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_fill_begin::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_fill_begin::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tv_fill_begin`] module"]
280pub type TV_FILL_BEGIN = crate::Reg<tv_fill_begin::TV_FILL_BEGIN_SPEC>;
281#[doc = "TV Fill Data Begin Register"]
282pub mod tv_fill_begin;
283#[doc = "tv_fill_end (rw) register accessor: TV Fill Data End Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_fill_end::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_fill_end::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tv_fill_end`] module"]
284pub type TV_FILL_END = crate::Reg<tv_fill_end::TV_FILL_END_SPEC>;
285#[doc = "TV Fill Data End Register"]
286pub mod tv_fill_end;
287#[doc = "tv_fill_data (rw) register accessor: TV Fill Data Value Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_fill_data::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_fill_data::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tv_fill_data`] module"]
288pub type TV_FILL_DATA = crate::Reg<tv_fill_data::TV_FILL_DATA_SPEC>;
289#[doc = "TV Fill Data Value Register"]
290pub mod tv_fill_data;
291#[doc = "tv_data_io_pol0 (rw) register accessor: TCON Data IO Polarity Control0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_data_io_pol0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_data_io_pol0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tv_data_io_pol0`] module"]
292pub type TV_DATA_IO_POL0 = crate::Reg<tv_data_io_pol0::TV_DATA_IO_POL0_SPEC>;
293#[doc = "TCON Data IO Polarity Control0"]
294pub mod tv_data_io_pol0;
295#[doc = "tv_data_io_pol1 (rw) register accessor: TCON Data IO Polarity Control1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_data_io_pol1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_data_io_pol1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tv_data_io_pol1`] module"]
296pub type TV_DATA_IO_POL1 = crate::Reg<tv_data_io_pol1::TV_DATA_IO_POL1_SPEC>;
297#[doc = "TCON Data IO Polarity Control1"]
298pub mod tv_data_io_pol1;
299#[doc = "tv_data_io_tri0 (rw) register accessor: TCON Data IO Enable Control0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_data_io_tri0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_data_io_tri0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tv_data_io_tri0`] module"]
300pub type TV_DATA_IO_TRI0 = crate::Reg<tv_data_io_tri0::TV_DATA_IO_TRI0_SPEC>;
301#[doc = "TCON Data IO Enable Control0"]
302pub mod tv_data_io_tri0;
303#[doc = "tv_data_io_tri1 (rw) register accessor: TCON Data IO Enable Control1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_data_io_tri1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_data_io_tri1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tv_data_io_tri1`] module"]
304pub type TV_DATA_IO_TRI1 = crate::Reg<tv_data_io_tri1::TV_DATA_IO_TRI1_SPEC>;
305#[doc = "TCON Data IO Enable Control1"]
306pub mod tv_data_io_tri1;
307#[doc = "tv_pixeldepth_mode (rw) register accessor: TV Pixeldepth Mode Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tv_pixeldepth_mode::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tv_pixeldepth_mode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tv_pixeldepth_mode`] module"]
308pub type TV_PIXELDEPTH_MODE = crate::Reg<tv_pixeldepth_mode::TV_PIXELDEPTH_MODE_SPEC>;
309#[doc = "TV Pixeldepth Mode Control Register"]
310pub mod tv_pixeldepth_mode;