d1_pac/tcon_lcd0/
lcd_sync_ctl.rs

1#[doc = "Register `lcd_sync_ctl` reader"]
2pub type R = crate::R<LCD_SYNC_CTL_SPEC>;
3#[doc = "Register `lcd_sync_ctl` writer"]
4pub type W = crate::W<LCD_SYNC_CTL_SPEC>;
5#[doc = "Field `lcd_ctrl_sync_mode` reader - LCD Controller Sync Mode\n\nNote: Only use in Single DSI mode."]
6pub type LCD_CTRL_SYNC_MODE_R = crate::BitReader<LCD_CTRL_SYNC_MODE_A>;
7#[doc = "LCD Controller Sync Mode\n\nNote: Only use in Single DSI mode.\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum LCD_CTRL_SYNC_MODE_A {
10    #[doc = "0: Sync in the first time"]
11    S_YNC_FIRST = 0,
12    #[doc = "1: Sync every frame"]
13    S_YNC_EVERY = 1,
14}
15impl From<LCD_CTRL_SYNC_MODE_A> for bool {
16    #[inline(always)]
17    fn from(variant: LCD_CTRL_SYNC_MODE_A) -> Self {
18        variant as u8 != 0
19    }
20}
21impl LCD_CTRL_SYNC_MODE_R {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> LCD_CTRL_SYNC_MODE_A {
25        match self.bits {
26            false => LCD_CTRL_SYNC_MODE_A::S_YNC_FIRST,
27            true => LCD_CTRL_SYNC_MODE_A::S_YNC_EVERY,
28        }
29    }
30    #[doc = "Sync in the first time"]
31    #[inline(always)]
32    pub fn is_s_ync_first(&self) -> bool {
33        *self == LCD_CTRL_SYNC_MODE_A::S_YNC_FIRST
34    }
35    #[doc = "Sync every frame"]
36    #[inline(always)]
37    pub fn is_s_ync_every(&self) -> bool {
38        *self == LCD_CTRL_SYNC_MODE_A::S_YNC_EVERY
39    }
40}
41#[doc = "Field `lcd_ctrl_sync_mode` writer - LCD Controller Sync Mode\n\nNote: Only use in Single DSI mode."]
42pub type LCD_CTRL_SYNC_MODE_W<'a, REG> = crate::BitWriter<'a, REG, LCD_CTRL_SYNC_MODE_A>;
43impl<'a, REG> LCD_CTRL_SYNC_MODE_W<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    #[doc = "Sync in the first time"]
48    #[inline(always)]
49    pub fn s_ync_first(self) -> &'a mut crate::W<REG> {
50        self.variant(LCD_CTRL_SYNC_MODE_A::S_YNC_FIRST)
51    }
52    #[doc = "Sync every frame"]
53    #[inline(always)]
54    pub fn s_ync_every(self) -> &'a mut crate::W<REG> {
55        self.variant(LCD_CTRL_SYNC_MODE_A::S_YNC_EVERY)
56    }
57}
58#[doc = "Field `lcd_cyrl_sync_master_slave` reader - LCD Controller Sync Master Slave\n\nNote: Only use in Single DSI mode."]
59pub type LCD_CYRL_SYNC_MASTER_SLAVE_R = crate::BitReader<LCD_CYRL_SYNC_MASTER_SLAVE_A>;
60#[doc = "LCD Controller Sync Master Slave\n\nNote: Only use in Single DSI mode.\n\nValue on reset: 0"]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum LCD_CYRL_SYNC_MASTER_SLAVE_A {
63    #[doc = "0: Master"]
64    M_ASTER = 0,
65    #[doc = "1: Slave"]
66    S_LAVE = 1,
67}
68impl From<LCD_CYRL_SYNC_MASTER_SLAVE_A> for bool {
69    #[inline(always)]
70    fn from(variant: LCD_CYRL_SYNC_MASTER_SLAVE_A) -> Self {
71        variant as u8 != 0
72    }
73}
74impl LCD_CYRL_SYNC_MASTER_SLAVE_R {
75    #[doc = "Get enumerated values variant"]
76    #[inline(always)]
77    pub const fn variant(&self) -> LCD_CYRL_SYNC_MASTER_SLAVE_A {
78        match self.bits {
79            false => LCD_CYRL_SYNC_MASTER_SLAVE_A::M_ASTER,
80            true => LCD_CYRL_SYNC_MASTER_SLAVE_A::S_LAVE,
81        }
82    }
83    #[doc = "Master"]
84    #[inline(always)]
85    pub fn is_m_aster(&self) -> bool {
86        *self == LCD_CYRL_SYNC_MASTER_SLAVE_A::M_ASTER
87    }
88    #[doc = "Slave"]
89    #[inline(always)]
90    pub fn is_s_lave(&self) -> bool {
91        *self == LCD_CYRL_SYNC_MASTER_SLAVE_A::S_LAVE
92    }
93}
94#[doc = "Field `lcd_cyrl_sync_master_slave` writer - LCD Controller Sync Master Slave\n\nNote: Only use in Single DSI mode."]
95pub type LCD_CYRL_SYNC_MASTER_SLAVE_W<'a, REG> =
96    crate::BitWriter<'a, REG, LCD_CYRL_SYNC_MASTER_SLAVE_A>;
97impl<'a, REG> LCD_CYRL_SYNC_MASTER_SLAVE_W<'a, REG>
98where
99    REG: crate::Writable + crate::RegisterSpec,
100{
101    #[doc = "Master"]
102    #[inline(always)]
103    pub fn m_aster(self) -> &'a mut crate::W<REG> {
104        self.variant(LCD_CYRL_SYNC_MASTER_SLAVE_A::M_ASTER)
105    }
106    #[doc = "Slave"]
107    #[inline(always)]
108    pub fn s_lave(self) -> &'a mut crate::W<REG> {
109        self.variant(LCD_CYRL_SYNC_MASTER_SLAVE_A::S_LAVE)
110    }
111}
112#[doc = "Field `lcd_ctrl_work_mode` reader - LCD Controller Work mode"]
113pub type LCD_CTRL_WORK_MODE_R = crate::BitReader<LCD_CTRL_WORK_MODE_A>;
114#[doc = "LCD Controller Work mode\n\nValue on reset: 0"]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum LCD_CTRL_WORK_MODE_A {
117    #[doc = "0: Single DSI mode"]
118    S_INGLE = 0,
119    #[doc = "1: Dual DSI mode"]
120    D_UAL = 1,
121}
122impl From<LCD_CTRL_WORK_MODE_A> for bool {
123    #[inline(always)]
124    fn from(variant: LCD_CTRL_WORK_MODE_A) -> Self {
125        variant as u8 != 0
126    }
127}
128impl LCD_CTRL_WORK_MODE_R {
129    #[doc = "Get enumerated values variant"]
130    #[inline(always)]
131    pub const fn variant(&self) -> LCD_CTRL_WORK_MODE_A {
132        match self.bits {
133            false => LCD_CTRL_WORK_MODE_A::S_INGLE,
134            true => LCD_CTRL_WORK_MODE_A::D_UAL,
135        }
136    }
137    #[doc = "Single DSI mode"]
138    #[inline(always)]
139    pub fn is_s_ingle(&self) -> bool {
140        *self == LCD_CTRL_WORK_MODE_A::S_INGLE
141    }
142    #[doc = "Dual DSI mode"]
143    #[inline(always)]
144    pub fn is_d_ual(&self) -> bool {
145        *self == LCD_CTRL_WORK_MODE_A::D_UAL
146    }
147}
148#[doc = "Field `lcd_ctrl_work_mode` writer - LCD Controller Work mode"]
149pub type LCD_CTRL_WORK_MODE_W<'a, REG> = crate::BitWriter<'a, REG, LCD_CTRL_WORK_MODE_A>;
150impl<'a, REG> LCD_CTRL_WORK_MODE_W<'a, REG>
151where
152    REG: crate::Writable + crate::RegisterSpec,
153{
154    #[doc = "Single DSI mode"]
155    #[inline(always)]
156    pub fn s_ingle(self) -> &'a mut crate::W<REG> {
157        self.variant(LCD_CTRL_WORK_MODE_A::S_INGLE)
158    }
159    #[doc = "Dual DSI mode"]
160    #[inline(always)]
161    pub fn d_ual(self) -> &'a mut crate::W<REG> {
162        self.variant(LCD_CTRL_WORK_MODE_A::D_UAL)
163    }
164}
165impl R {
166    #[doc = "Bit 0 - LCD Controller Sync Mode\n\nNote: Only use in Single DSI mode."]
167    #[inline(always)]
168    pub fn lcd_ctrl_sync_mode(&self) -> LCD_CTRL_SYNC_MODE_R {
169        LCD_CTRL_SYNC_MODE_R::new((self.bits & 1) != 0)
170    }
171    #[doc = "Bit 4 - LCD Controller Sync Master Slave\n\nNote: Only use in Single DSI mode."]
172    #[inline(always)]
173    pub fn lcd_cyrl_sync_master_slave(&self) -> LCD_CYRL_SYNC_MASTER_SLAVE_R {
174        LCD_CYRL_SYNC_MASTER_SLAVE_R::new(((self.bits >> 4) & 1) != 0)
175    }
176    #[doc = "Bit 8 - LCD Controller Work mode"]
177    #[inline(always)]
178    pub fn lcd_ctrl_work_mode(&self) -> LCD_CTRL_WORK_MODE_R {
179        LCD_CTRL_WORK_MODE_R::new(((self.bits >> 8) & 1) != 0)
180    }
181}
182impl W {
183    #[doc = "Bit 0 - LCD Controller Sync Mode\n\nNote: Only use in Single DSI mode."]
184    #[inline(always)]
185    #[must_use]
186    pub fn lcd_ctrl_sync_mode(&mut self) -> LCD_CTRL_SYNC_MODE_W<LCD_SYNC_CTL_SPEC> {
187        LCD_CTRL_SYNC_MODE_W::new(self, 0)
188    }
189    #[doc = "Bit 4 - LCD Controller Sync Master Slave\n\nNote: Only use in Single DSI mode."]
190    #[inline(always)]
191    #[must_use]
192    pub fn lcd_cyrl_sync_master_slave(
193        &mut self,
194    ) -> LCD_CYRL_SYNC_MASTER_SLAVE_W<LCD_SYNC_CTL_SPEC> {
195        LCD_CYRL_SYNC_MASTER_SLAVE_W::new(self, 4)
196    }
197    #[doc = "Bit 8 - LCD Controller Work mode"]
198    #[inline(always)]
199    #[must_use]
200    pub fn lcd_ctrl_work_mode(&mut self) -> LCD_CTRL_WORK_MODE_W<LCD_SYNC_CTL_SPEC> {
201        LCD_CTRL_WORK_MODE_W::new(self, 8)
202    }
203    #[doc = r" Writes raw bits to the register."]
204    #[doc = r""]
205    #[doc = r" # Safety"]
206    #[doc = r""]
207    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
208    #[inline(always)]
209    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
210        self.bits = bits;
211        self
212    }
213}
214#[doc = "LCD Sync Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lcd_sync_ctl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lcd_sync_ctl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
215pub struct LCD_SYNC_CTL_SPEC;
216impl crate::RegisterSpec for LCD_SYNC_CTL_SPEC {
217    type Ux = u32;
218}
219#[doc = "`read()` method returns [`lcd_sync_ctl::R`](R) reader structure"]
220impl crate::Readable for LCD_SYNC_CTL_SPEC {}
221#[doc = "`write(|w| ..)` method takes [`lcd_sync_ctl::W`](W) writer structure"]
222impl crate::Writable for LCD_SYNC_CTL_SPEC {
223    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
224    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
225}
226#[doc = "`reset()` method sets lcd_sync_ctl to value 0"]
227impl crate::Resettable for LCD_SYNC_CTL_SPEC {
228    const RESET_VALUE: Self::Ux = 0;
229}
d1_pac/tcon_lcd0/lcd_sync_ctl.rs

d1_pac/tcon_lcd0/
lcd_sync_ctl.rs
