d1_pac/tcon_lcd0/
lcd_frm_ctl.rs

1#[doc = "Register `lcd_frm_ctl` reader"]
2pub type R = crate::R<LCD_FRM_CTL_SPEC>;
3#[doc = "Register `lcd_frm_ctl` writer"]
4pub type W = crate::W<LCD_FRM_CTL_SPEC>;
5#[doc = "Field `lcd_frm_test` reader - Set the test mode of dither function"]
6pub type LCD_FRM_TEST_R = crate::FieldReader<LCD_FRM_TEST_A>;
7#[doc = "Set the test mode of dither function\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9#[repr(u8)]
10pub enum LCD_FRM_TEST_A {
11    #[doc = "0: FRM"]
12    FRM = 0,
13    #[doc = "1: Half 5/6-bit, half FRM"]
14    HALF_BIT_56_FRM = 1,
15    #[doc = "2: Half 8-bit, half FRM"]
16    HALF_BIT_8_FRM = 2,
17    #[doc = "3: Half 8-bit, half 5/6-bit"]
18    HALF_BIT_8_56 = 3,
19}
20impl From<LCD_FRM_TEST_A> for u8 {
21    #[inline(always)]
22    fn from(variant: LCD_FRM_TEST_A) -> Self {
23        variant as _
24    }
25}
26impl crate::FieldSpec for LCD_FRM_TEST_A {
27    type Ux = u8;
28}
29impl LCD_FRM_TEST_R {
30    #[doc = "Get enumerated values variant"]
31    #[inline(always)]
32    pub const fn variant(&self) -> LCD_FRM_TEST_A {
33        match self.bits {
34            0 => LCD_FRM_TEST_A::FRM,
35            1 => LCD_FRM_TEST_A::HALF_BIT_56_FRM,
36            2 => LCD_FRM_TEST_A::HALF_BIT_8_FRM,
37            3 => LCD_FRM_TEST_A::HALF_BIT_8_56,
38            _ => unreachable!(),
39        }
40    }
41    #[doc = "FRM"]
42    #[inline(always)]
43    pub fn is_frm(&self) -> bool {
44        *self == LCD_FRM_TEST_A::FRM
45    }
46    #[doc = "Half 5/6-bit, half FRM"]
47    #[inline(always)]
48    pub fn is_half_bit_56_frm(&self) -> bool {
49        *self == LCD_FRM_TEST_A::HALF_BIT_56_FRM
50    }
51    #[doc = "Half 8-bit, half FRM"]
52    #[inline(always)]
53    pub fn is_half_bit_8_frm(&self) -> bool {
54        *self == LCD_FRM_TEST_A::HALF_BIT_8_FRM
55    }
56    #[doc = "Half 8-bit, half 5/6-bit"]
57    #[inline(always)]
58    pub fn is_half_bit_8_56(&self) -> bool {
59        *self == LCD_FRM_TEST_A::HALF_BIT_8_56
60    }
61}
62#[doc = "Field `lcd_frm_test` writer - Set the test mode of dither function"]
63pub type LCD_FRM_TEST_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, LCD_FRM_TEST_A>;
64impl<'a, REG> LCD_FRM_TEST_W<'a, REG>
65where
66    REG: crate::Writable + crate::RegisterSpec,
67    REG::Ux: From<u8>,
68{
69    #[doc = "FRM"]
70    #[inline(always)]
71    pub fn frm(self) -> &'a mut crate::W<REG> {
72        self.variant(LCD_FRM_TEST_A::FRM)
73    }
74    #[doc = "Half 5/6-bit, half FRM"]
75    #[inline(always)]
76    pub fn half_bit_56_frm(self) -> &'a mut crate::W<REG> {
77        self.variant(LCD_FRM_TEST_A::HALF_BIT_56_FRM)
78    }
79    #[doc = "Half 8-bit, half FRM"]
80    #[inline(always)]
81    pub fn half_bit_8_frm(self) -> &'a mut crate::W<REG> {
82        self.variant(LCD_FRM_TEST_A::HALF_BIT_8_FRM)
83    }
84    #[doc = "Half 8-bit, half 5/6-bit"]
85    #[inline(always)]
86    pub fn half_bit_8_56(self) -> &'a mut crate::W<REG> {
87        self.variant(LCD_FRM_TEST_A::HALF_BIT_8_56)
88    }
89}
90#[doc = "Field `lcd_frm_mode_b` reader - The B component output bits in dither function"]
91pub type LCD_FRM_MODE_B_R = crate::BitReader<LCD_FRM_MODE_B_A>;
92#[doc = "The B component output bits in dither function\n\nValue on reset: 0"]
93#[derive(Clone, Copy, Debug, PartialEq, Eq)]
94pub enum LCD_FRM_MODE_B_A {
95    #[doc = "0: 6-bit frm output"]
96    B_IT6 = 0,
97    #[doc = "1: 5-bit frm output"]
98    B_IT5 = 1,
99}
100impl From<LCD_FRM_MODE_B_A> for bool {
101    #[inline(always)]
102    fn from(variant: LCD_FRM_MODE_B_A) -> Self {
103        variant as u8 != 0
104    }
105}
106impl LCD_FRM_MODE_B_R {
107    #[doc = "Get enumerated values variant"]
108    #[inline(always)]
109    pub const fn variant(&self) -> LCD_FRM_MODE_B_A {
110        match self.bits {
111            false => LCD_FRM_MODE_B_A::B_IT6,
112            true => LCD_FRM_MODE_B_A::B_IT5,
113        }
114    }
115    #[doc = "6-bit frm output"]
116    #[inline(always)]
117    pub fn is_b_it6(&self) -> bool {
118        *self == LCD_FRM_MODE_B_A::B_IT6
119    }
120    #[doc = "5-bit frm output"]
121    #[inline(always)]
122    pub fn is_b_it5(&self) -> bool {
123        *self == LCD_FRM_MODE_B_A::B_IT5
124    }
125}
126#[doc = "Field `lcd_frm_mode_b` writer - The B component output bits in dither function"]
127pub type LCD_FRM_MODE_B_W<'a, REG> = crate::BitWriter<'a, REG, LCD_FRM_MODE_B_A>;
128impl<'a, REG> LCD_FRM_MODE_B_W<'a, REG>
129where
130    REG: crate::Writable + crate::RegisterSpec,
131{
132    #[doc = "6-bit frm output"]
133    #[inline(always)]
134    pub fn b_it6(self) -> &'a mut crate::W<REG> {
135        self.variant(LCD_FRM_MODE_B_A::B_IT6)
136    }
137    #[doc = "5-bit frm output"]
138    #[inline(always)]
139    pub fn b_it5(self) -> &'a mut crate::W<REG> {
140        self.variant(LCD_FRM_MODE_B_A::B_IT5)
141    }
142}
143#[doc = "Field `lcd_frm_mode_g` reader - The G component output bits in dither function"]
144pub type LCD_FRM_MODE_G_R = crate::BitReader<LCD_FRM_MODE_G_A>;
145#[doc = "The G component output bits in dither function\n\nValue on reset: 0"]
146#[derive(Clone, Copy, Debug, PartialEq, Eq)]
147pub enum LCD_FRM_MODE_G_A {
148    #[doc = "0: 6-bit frm output"]
149    B_IT6 = 0,
150    #[doc = "1: 5-bit frm output"]
151    B_IT5 = 1,
152}
153impl From<LCD_FRM_MODE_G_A> for bool {
154    #[inline(always)]
155    fn from(variant: LCD_FRM_MODE_G_A) -> Self {
156        variant as u8 != 0
157    }
158}
159impl LCD_FRM_MODE_G_R {
160    #[doc = "Get enumerated values variant"]
161    #[inline(always)]
162    pub const fn variant(&self) -> LCD_FRM_MODE_G_A {
163        match self.bits {
164            false => LCD_FRM_MODE_G_A::B_IT6,
165            true => LCD_FRM_MODE_G_A::B_IT5,
166        }
167    }
168    #[doc = "6-bit frm output"]
169    #[inline(always)]
170    pub fn is_b_it6(&self) -> bool {
171        *self == LCD_FRM_MODE_G_A::B_IT6
172    }
173    #[doc = "5-bit frm output"]
174    #[inline(always)]
175    pub fn is_b_it5(&self) -> bool {
176        *self == LCD_FRM_MODE_G_A::B_IT5
177    }
178}
179#[doc = "Field `lcd_frm_mode_g` writer - The G component output bits in dither function"]
180pub type LCD_FRM_MODE_G_W<'a, REG> = crate::BitWriter<'a, REG, LCD_FRM_MODE_G_A>;
181impl<'a, REG> LCD_FRM_MODE_G_W<'a, REG>
182where
183    REG: crate::Writable + crate::RegisterSpec,
184{
185    #[doc = "6-bit frm output"]
186    #[inline(always)]
187    pub fn b_it6(self) -> &'a mut crate::W<REG> {
188        self.variant(LCD_FRM_MODE_G_A::B_IT6)
189    }
190    #[doc = "5-bit frm output"]
191    #[inline(always)]
192    pub fn b_it5(self) -> &'a mut crate::W<REG> {
193        self.variant(LCD_FRM_MODE_G_A::B_IT5)
194    }
195}
196#[doc = "Field `lcd_frm_mode_r` reader - The R component output bits in dither function"]
197pub type LCD_FRM_MODE_R_R = crate::BitReader<LCD_FRM_MODE_R_A>;
198#[doc = "The R component output bits in dither function\n\nValue on reset: 0"]
199#[derive(Clone, Copy, Debug, PartialEq, Eq)]
200pub enum LCD_FRM_MODE_R_A {
201    #[doc = "0: 6-bit frm output"]
202    B_IT6 = 0,
203    #[doc = "1: 5-bit frm output"]
204    B_IT5 = 1,
205}
206impl From<LCD_FRM_MODE_R_A> for bool {
207    #[inline(always)]
208    fn from(variant: LCD_FRM_MODE_R_A) -> Self {
209        variant as u8 != 0
210    }
211}
212impl LCD_FRM_MODE_R_R {
213    #[doc = "Get enumerated values variant"]
214    #[inline(always)]
215    pub const fn variant(&self) -> LCD_FRM_MODE_R_A {
216        match self.bits {
217            false => LCD_FRM_MODE_R_A::B_IT6,
218            true => LCD_FRM_MODE_R_A::B_IT5,
219        }
220    }
221    #[doc = "6-bit frm output"]
222    #[inline(always)]
223    pub fn is_b_it6(&self) -> bool {
224        *self == LCD_FRM_MODE_R_A::B_IT6
225    }
226    #[doc = "5-bit frm output"]
227    #[inline(always)]
228    pub fn is_b_it5(&self) -> bool {
229        *self == LCD_FRM_MODE_R_A::B_IT5
230    }
231}
232#[doc = "Field `lcd_frm_mode_r` writer - The R component output bits in dither function"]
233pub type LCD_FRM_MODE_R_W<'a, REG> = crate::BitWriter<'a, REG, LCD_FRM_MODE_R_A>;
234impl<'a, REG> LCD_FRM_MODE_R_W<'a, REG>
235where
236    REG: crate::Writable + crate::RegisterSpec,
237{
238    #[doc = "6-bit frm output"]
239    #[inline(always)]
240    pub fn b_it6(self) -> &'a mut crate::W<REG> {
241        self.variant(LCD_FRM_MODE_R_A::B_IT6)
242    }
243    #[doc = "5-bit frm output"]
244    #[inline(always)]
245    pub fn b_it5(self) -> &'a mut crate::W<REG> {
246        self.variant(LCD_FRM_MODE_R_A::B_IT5)
247    }
248}
249#[doc = "Field `lcd_frm_en` reader - Enable the dither function"]
250pub type LCD_FRM_EN_R = crate::BitReader<LCD_FRM_EN_A>;
251#[doc = "Enable the dither function\n\nValue on reset: 0"]
252#[derive(Clone, Copy, Debug, PartialEq, Eq)]
253pub enum LCD_FRM_EN_A {
254    #[doc = "0: Disable"]
255    DISABLE = 0,
256    #[doc = "1: Enable"]
257    ENABLE = 1,
258}
259impl From<LCD_FRM_EN_A> for bool {
260    #[inline(always)]
261    fn from(variant: LCD_FRM_EN_A) -> Self {
262        variant as u8 != 0
263    }
264}
265impl LCD_FRM_EN_R {
266    #[doc = "Get enumerated values variant"]
267    #[inline(always)]
268    pub const fn variant(&self) -> LCD_FRM_EN_A {
269        match self.bits {
270            false => LCD_FRM_EN_A::DISABLE,
271            true => LCD_FRM_EN_A::ENABLE,
272        }
273    }
274    #[doc = "Disable"]
275    #[inline(always)]
276    pub fn is_disable(&self) -> bool {
277        *self == LCD_FRM_EN_A::DISABLE
278    }
279    #[doc = "Enable"]
280    #[inline(always)]
281    pub fn is_enable(&self) -> bool {
282        *self == LCD_FRM_EN_A::ENABLE
283    }
284}
285#[doc = "Field `lcd_frm_en` writer - Enable the dither function"]
286pub type LCD_FRM_EN_W<'a, REG> = crate::BitWriter<'a, REG, LCD_FRM_EN_A>;
287impl<'a, REG> LCD_FRM_EN_W<'a, REG>
288where
289    REG: crate::Writable + crate::RegisterSpec,
290{
291    #[doc = "Disable"]
292    #[inline(always)]
293    pub fn disable(self) -> &'a mut crate::W<REG> {
294        self.variant(LCD_FRM_EN_A::DISABLE)
295    }
296    #[doc = "Enable"]
297    #[inline(always)]
298    pub fn enable(self) -> &'a mut crate::W<REG> {
299        self.variant(LCD_FRM_EN_A::ENABLE)
300    }
301}
302impl R {
303    #[doc = "Bits 0:1 - Set the test mode of dither function"]
304    #[inline(always)]
305    pub fn lcd_frm_test(&self) -> LCD_FRM_TEST_R {
306        LCD_FRM_TEST_R::new((self.bits & 3) as u8)
307    }
308    #[doc = "Bit 4 - The B component output bits in dither function"]
309    #[inline(always)]
310    pub fn lcd_frm_mode_b(&self) -> LCD_FRM_MODE_B_R {
311        LCD_FRM_MODE_B_R::new(((self.bits >> 4) & 1) != 0)
312    }
313    #[doc = "Bit 5 - The G component output bits in dither function"]
314    #[inline(always)]
315    pub fn lcd_frm_mode_g(&self) -> LCD_FRM_MODE_G_R {
316        LCD_FRM_MODE_G_R::new(((self.bits >> 5) & 1) != 0)
317    }
318    #[doc = "Bit 6 - The R component output bits in dither function"]
319    #[inline(always)]
320    pub fn lcd_frm_mode_r(&self) -> LCD_FRM_MODE_R_R {
321        LCD_FRM_MODE_R_R::new(((self.bits >> 6) & 1) != 0)
322    }
323    #[doc = "Bit 31 - Enable the dither function"]
324    #[inline(always)]
325    pub fn lcd_frm_en(&self) -> LCD_FRM_EN_R {
326        LCD_FRM_EN_R::new(((self.bits >> 31) & 1) != 0)
327    }
328}
329impl W {
330    #[doc = "Bits 0:1 - Set the test mode of dither function"]
331    #[inline(always)]
332    #[must_use]
333    pub fn lcd_frm_test(&mut self) -> LCD_FRM_TEST_W<LCD_FRM_CTL_SPEC> {
334        LCD_FRM_TEST_W::new(self, 0)
335    }
336    #[doc = "Bit 4 - The B component output bits in dither function"]
337    #[inline(always)]
338    #[must_use]
339    pub fn lcd_frm_mode_b(&mut self) -> LCD_FRM_MODE_B_W<LCD_FRM_CTL_SPEC> {
340        LCD_FRM_MODE_B_W::new(self, 4)
341    }
342    #[doc = "Bit 5 - The G component output bits in dither function"]
343    #[inline(always)]
344    #[must_use]
345    pub fn lcd_frm_mode_g(&mut self) -> LCD_FRM_MODE_G_W<LCD_FRM_CTL_SPEC> {
346        LCD_FRM_MODE_G_W::new(self, 5)
347    }
348    #[doc = "Bit 6 - The R component output bits in dither function"]
349    #[inline(always)]
350    #[must_use]
351    pub fn lcd_frm_mode_r(&mut self) -> LCD_FRM_MODE_R_W<LCD_FRM_CTL_SPEC> {
352        LCD_FRM_MODE_R_W::new(self, 6)
353    }
354    #[doc = "Bit 31 - Enable the dither function"]
355    #[inline(always)]
356    #[must_use]
357    pub fn lcd_frm_en(&mut self) -> LCD_FRM_EN_W<LCD_FRM_CTL_SPEC> {
358        LCD_FRM_EN_W::new(self, 31)
359    }
360    #[doc = r" Writes raw bits to the register."]
361    #[doc = r""]
362    #[doc = r" # Safety"]
363    #[doc = r""]
364    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
365    #[inline(always)]
366    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
367        self.bits = bits;
368        self
369    }
370}
371#[doc = "LCD FRM Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lcd_frm_ctl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lcd_frm_ctl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
372pub struct LCD_FRM_CTL_SPEC;
373impl crate::RegisterSpec for LCD_FRM_CTL_SPEC {
374    type Ux = u32;
375}
376#[doc = "`read()` method returns [`lcd_frm_ctl::R`](R) reader structure"]
377impl crate::Readable for LCD_FRM_CTL_SPEC {}
378#[doc = "`write(|w| ..)` method takes [`lcd_frm_ctl::W`](W) writer structure"]
379impl crate::Writable for LCD_FRM_CTL_SPEC {
380    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
381    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
382}
383#[doc = "`reset()` method sets lcd_frm_ctl to value 0"]
384impl crate::Resettable for LCD_FRM_CTL_SPEC {
385    const RESET_VALUE: Self::Ux = 0;
386}
d1_pac/tcon_lcd0/lcd_frm_ctl.rs

d1_pac/tcon_lcd0/
lcd_frm_ctl.rs
