d1_pac/tcon_lcd0/
lcd_basic3.rs

1#[doc = "Register `lcd_basic3` reader"]
2pub type R = crate::R<LCD_BASIC3_SPEC>;
3#[doc = "Register `lcd_basic3` writer"]
4pub type W = crate::W<LCD_BASIC3_SPEC>;
5#[doc = "Field `vspw` reader - Tvspw = (VSPW+1) * Thsync\n\nVT/2 > (VSPW+1)"]
6pub type VSPW_R = crate::FieldReader<u16>;
7#[doc = "Field `vspw` writer - Tvspw = (VSPW+1) * Thsync\n\nVT/2 > (VSPW+1)"]
8pub type VSPW_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>;
9#[doc = "Field `hspw` reader - Thspw = (HSPW+1) * Tdclk\n\nHT > (HSPW+1)"]
10pub type HSPW_R = crate::FieldReader<u16>;
11#[doc = "Field `hspw` writer - Thspw = (HSPW+1) * Tdclk\n\nHT > (HSPW+1)"]
12pub type HSPW_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>;
13impl R {
14    #[doc = "Bits 0:9 - Tvspw = (VSPW+1) * Thsync\n\nVT/2 > (VSPW+1)"]
15    #[inline(always)]
16    pub fn vspw(&self) -> VSPW_R {
17        VSPW_R::new((self.bits & 0x03ff) as u16)
18    }
19    #[doc = "Bits 16:25 - Thspw = (HSPW+1) * Tdclk\n\nHT > (HSPW+1)"]
20    #[inline(always)]
21    pub fn hspw(&self) -> HSPW_R {
22        HSPW_R::new(((self.bits >> 16) & 0x03ff) as u16)
23    }
24}
25impl W {
26    #[doc = "Bits 0:9 - Tvspw = (VSPW+1) * Thsync\n\nVT/2 > (VSPW+1)"]
27    #[inline(always)]
28    #[must_use]
29    pub fn vspw(&mut self) -> VSPW_W<LCD_BASIC3_SPEC> {
30        VSPW_W::new(self, 0)
31    }
32    #[doc = "Bits 16:25 - Thspw = (HSPW+1) * Tdclk\n\nHT > (HSPW+1)"]
33    #[inline(always)]
34    #[must_use]
35    pub fn hspw(&mut self) -> HSPW_W<LCD_BASIC3_SPEC> {
36        HSPW_W::new(self, 16)
37    }
38    #[doc = r" Writes raw bits to the register."]
39    #[doc = r""]
40    #[doc = r" # Safety"]
41    #[doc = r""]
42    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
43    #[inline(always)]
44    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
45        self.bits = bits;
46        self
47    }
48}
49#[doc = "LCD Basic Timing Register3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lcd_basic3::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lcd_basic3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
50pub struct LCD_BASIC3_SPEC;
51impl crate::RegisterSpec for LCD_BASIC3_SPEC {
52    type Ux = u32;
53}
54#[doc = "`read()` method returns [`lcd_basic3::R`](R) reader structure"]
55impl crate::Readable for LCD_BASIC3_SPEC {}
56#[doc = "`write(|w| ..)` method takes [`lcd_basic3::W`](W) writer structure"]
57impl crate::Writable for LCD_BASIC3_SPEC {
58    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
59    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
60}
61#[doc = "`reset()` method sets lcd_basic3 to value 0"]
62impl crate::Resettable for LCD_BASIC3_SPEC {
63    const RESET_VALUE: Self::Ux = 0;
64}
d1_pac/tcon_lcd0/lcd_basic3.rs

d1_pac/tcon_lcd0/
lcd_basic3.rs
