d1_pac/tcon_lcd0/
lcd_3d_fifo.rs

1#[doc = "Register `lcd_3d_fifo` reader"]
2pub type R = crate::R<LCD_3D_FIFO_SPEC>;
3#[doc = "Register `lcd_3d_fifo` writer"]
4pub type W = crate::W<LCD_3D_FIFO_SPEC>;
5#[doc = "Field `setting` reader - Set the work mode of 3D FIFO"]
6pub type SETTING_R = crate::FieldReader<SETTING_A>;
7#[doc = "Set the work mode of 3D FIFO\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9#[repr(u8)]
10pub enum SETTING_A {
11    #[doc = "0: Bypass"]
12    BYPASS = 0,
13    #[doc = "1: Used as normal FIFO"]
14    NORMAL = 1,
15    #[doc = "2: Used as 3D interlace FIFO"]
16    INTERLACE_3D = 2,
17}
18impl From<SETTING_A> for u8 {
19    #[inline(always)]
20    fn from(variant: SETTING_A) -> Self {
21        variant as _
22    }
23}
24impl crate::FieldSpec for SETTING_A {
25    type Ux = u8;
26}
27impl SETTING_R {
28    #[doc = "Get enumerated values variant"]
29    #[inline(always)]
30    pub const fn variant(&self) -> Option<SETTING_A> {
31        match self.bits {
32            0 => Some(SETTING_A::BYPASS),
33            1 => Some(SETTING_A::NORMAL),
34            2 => Some(SETTING_A::INTERLACE_3D),
35            _ => None,
36        }
37    }
38    #[doc = "Bypass"]
39    #[inline(always)]
40    pub fn is_bypass(&self) -> bool {
41        *self == SETTING_A::BYPASS
42    }
43    #[doc = "Used as normal FIFO"]
44    #[inline(always)]
45    pub fn is_normal(&self) -> bool {
46        *self == SETTING_A::NORMAL
47    }
48    #[doc = "Used as 3D interlace FIFO"]
49    #[inline(always)]
50    pub fn is_interlace_3d(&self) -> bool {
51        *self == SETTING_A::INTERLACE_3D
52    }
53}
54#[doc = "Field `setting` writer - Set the work mode of 3D FIFO"]
55pub type SETTING_W<'a, REG> = crate::FieldWriter<'a, REG, 2, SETTING_A>;
56impl<'a, REG> SETTING_W<'a, REG>
57where
58    REG: crate::Writable + crate::RegisterSpec,
59    REG::Ux: From<u8>,
60{
61    #[doc = "Bypass"]
62    #[inline(always)]
63    pub fn bypass(self) -> &'a mut crate::W<REG> {
64        self.variant(SETTING_A::BYPASS)
65    }
66    #[doc = "Used as normal FIFO"]
67    #[inline(always)]
68    pub fn normal(self) -> &'a mut crate::W<REG> {
69        self.variant(SETTING_A::NORMAL)
70    }
71    #[doc = "Used as 3D interlace FIFO"]
72    #[inline(always)]
73    pub fn interlace_3d(self) -> &'a mut crate::W<REG> {
74        self.variant(SETTING_A::INTERLACE_3D)
75    }
76}
77#[doc = "Field `half_line_size` reader - The number of data in half line=3D_FIFO_HALF_LINE_SIZE+1, only valid when 3D_FIFO_SETTING is set as 2."]
78pub type HALF_LINE_SIZE_R = crate::FieldReader<u16>;
79#[doc = "Field `half_line_size` writer - The number of data in half line=3D_FIFO_HALF_LINE_SIZE+1, only valid when 3D_FIFO_SETTING is set as 2."]
80pub type HALF_LINE_SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>;
81#[doc = "Field `bist_en` reader - Enable the 3D fifo bist test function"]
82pub type BIST_EN_R = crate::BitReader<BIST_EN_A>;
83#[doc = "Enable the 3D fifo bist test function\n\nValue on reset: 0"]
84#[derive(Clone, Copy, Debug, PartialEq, Eq)]
85pub enum BIST_EN_A {
86    #[doc = "0: Disable"]
87    DISABLE = 0,
88    #[doc = "1: Enable"]
89    ENABLE = 1,
90}
91impl From<BIST_EN_A> for bool {
92    #[inline(always)]
93    fn from(variant: BIST_EN_A) -> Self {
94        variant as u8 != 0
95    }
96}
97impl BIST_EN_R {
98    #[doc = "Get enumerated values variant"]
99    #[inline(always)]
100    pub const fn variant(&self) -> BIST_EN_A {
101        match self.bits {
102            false => BIST_EN_A::DISABLE,
103            true => BIST_EN_A::ENABLE,
104        }
105    }
106    #[doc = "Disable"]
107    #[inline(always)]
108    pub fn is_disable(&self) -> bool {
109        *self == BIST_EN_A::DISABLE
110    }
111    #[doc = "Enable"]
112    #[inline(always)]
113    pub fn is_enable(&self) -> bool {
114        *self == BIST_EN_A::ENABLE
115    }
116}
117#[doc = "Field `bist_en` writer - Enable the 3D fifo bist test function"]
118pub type BIST_EN_W<'a, REG> = crate::BitWriter<'a, REG, BIST_EN_A>;
119impl<'a, REG> BIST_EN_W<'a, REG>
120where
121    REG: crate::Writable + crate::RegisterSpec,
122{
123    #[doc = "Disable"]
124    #[inline(always)]
125    pub fn disable(self) -> &'a mut crate::W<REG> {
126        self.variant(BIST_EN_A::DISABLE)
127    }
128    #[doc = "Enable"]
129    #[inline(always)]
130    pub fn enable(self) -> &'a mut crate::W<REG> {
131        self.variant(BIST_EN_A::ENABLE)
132    }
133}
134impl R {
135    #[doc = "Bits 0:1 - Set the work mode of 3D FIFO"]
136    #[inline(always)]
137    pub fn setting(&self) -> SETTING_R {
138        SETTING_R::new((self.bits & 3) as u8)
139    }
140    #[doc = "Bits 4:13 - The number of data in half line=3D_FIFO_HALF_LINE_SIZE+1, only valid when 3D_FIFO_SETTING is set as 2."]
141    #[inline(always)]
142    pub fn half_line_size(&self) -> HALF_LINE_SIZE_R {
143        HALF_LINE_SIZE_R::new(((self.bits >> 4) & 0x03ff) as u16)
144    }
145    #[doc = "Bit 31 - Enable the 3D fifo bist test function"]
146    #[inline(always)]
147    pub fn bist_en(&self) -> BIST_EN_R {
148        BIST_EN_R::new(((self.bits >> 31) & 1) != 0)
149    }
150}
151impl W {
152    #[doc = "Bits 0:1 - Set the work mode of 3D FIFO"]
153    #[inline(always)]
154    #[must_use]
155    pub fn setting(&mut self) -> SETTING_W<LCD_3D_FIFO_SPEC> {
156        SETTING_W::new(self, 0)
157    }
158    #[doc = "Bits 4:13 - The number of data in half line=3D_FIFO_HALF_LINE_SIZE+1, only valid when 3D_FIFO_SETTING is set as 2."]
159    #[inline(always)]
160    #[must_use]
161    pub fn half_line_size(&mut self) -> HALF_LINE_SIZE_W<LCD_3D_FIFO_SPEC> {
162        HALF_LINE_SIZE_W::new(self, 4)
163    }
164    #[doc = "Bit 31 - Enable the 3D fifo bist test function"]
165    #[inline(always)]
166    #[must_use]
167    pub fn bist_en(&mut self) -> BIST_EN_W<LCD_3D_FIFO_SPEC> {
168        BIST_EN_W::new(self, 31)
169    }
170    #[doc = r" Writes raw bits to the register."]
171    #[doc = r""]
172    #[doc = r" # Safety"]
173    #[doc = r""]
174    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
175    #[inline(always)]
176    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
177        self.bits = bits;
178        self
179    }
180}
181#[doc = "LCD 3D FIFO Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lcd_3d_fifo::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lcd_3d_fifo::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
182pub struct LCD_3D_FIFO_SPEC;
183impl crate::RegisterSpec for LCD_3D_FIFO_SPEC {
184    type Ux = u32;
185}
186#[doc = "`read()` method returns [`lcd_3d_fifo::R`](R) reader structure"]
187impl crate::Readable for LCD_3D_FIFO_SPEC {}
188#[doc = "`write(|w| ..)` method takes [`lcd_3d_fifo::W`](W) writer structure"]
189impl crate::Writable for LCD_3D_FIFO_SPEC {
190    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
191    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
192}
193#[doc = "`reset()` method sets lcd_3d_fifo to value 0"]
194impl crate::Resettable for LCD_3D_FIFO_SPEC {
195    const RESET_VALUE: Self::Ux = 0;
196}
d1_pac/tcon_lcd0/lcd_3d_fifo.rs

d1_pac/tcon_lcd0/
lcd_3d_fifo.rs
