d1_pac/spinlock/
spinlock_systatus.rs1#[doc = "Register `spinlock_systatus` reader"]
2pub type R = crate::R<SPINLOCK_SYSTATUS_SPEC>;
3#[doc = "Field `iu0` reader - In-Use flag0"]
4pub type IU0_R = crate::BitReader<IU0_A>;
5#[doc = "In-Use flag0\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7pub enum IU0_A {
8 #[doc = "0: All lock registers 0-31 are not taken"]
9 ALL_NOT_TAKEN = 0,
10 #[doc = "1: At least one of the lock registers 0-31 is taken"]
11 AT_LEAST_ONE_TAKEN = 1,
12}
13impl From<IU0_A> for bool {
14 #[inline(always)]
15 fn from(variant: IU0_A) -> Self {
16 variant as u8 != 0
17 }
18}
19impl IU0_R {
20 #[doc = "Get enumerated values variant"]
21 #[inline(always)]
22 pub const fn variant(&self) -> IU0_A {
23 match self.bits {
24 false => IU0_A::ALL_NOT_TAKEN,
25 true => IU0_A::AT_LEAST_ONE_TAKEN,
26 }
27 }
28 #[doc = "All lock registers 0-31 are not taken"]
29 #[inline(always)]
30 pub fn is_all_not_taken(&self) -> bool {
31 *self == IU0_A::ALL_NOT_TAKEN
32 }
33 #[doc = "At least one of the lock registers 0-31 is taken"]
34 #[inline(always)]
35 pub fn is_at_least_one_taken(&self) -> bool {
36 *self == IU0_A::AT_LEAST_ONE_TAKEN
37 }
38}
39#[doc = "Field `locks_num` reader - Number of lock registers implemented"]
40pub type LOCKS_NUM_R = crate::FieldReader<LOCKS_NUM_A>;
41#[doc = "Number of lock registers implemented\n\nValue on reset: 0"]
42#[derive(Clone, Copy, Debug, PartialEq, Eq)]
43#[repr(u8)]
44pub enum LOCKS_NUM_A {
45 #[doc = "0: 256 lock registers"]
46 N256 = 0,
47 #[doc = "1: 32 lock registers"]
48 N32 = 1,
49 #[doc = "2: 64 lock registers"]
50 N64 = 2,
51 #[doc = "3: 128 lock registers"]
52 N128 = 3,
53}
54impl From<LOCKS_NUM_A> for u8 {
55 #[inline(always)]
56 fn from(variant: LOCKS_NUM_A) -> Self {
57 variant as _
58 }
59}
60impl crate::FieldSpec for LOCKS_NUM_A {
61 type Ux = u8;
62}
63impl LOCKS_NUM_R {
64 #[doc = "Get enumerated values variant"]
65 #[inline(always)]
66 pub const fn variant(&self) -> LOCKS_NUM_A {
67 match self.bits {
68 0 => LOCKS_NUM_A::N256,
69 1 => LOCKS_NUM_A::N32,
70 2 => LOCKS_NUM_A::N64,
71 3 => LOCKS_NUM_A::N128,
72 _ => unreachable!(),
73 }
74 }
75 #[doc = "256 lock registers"]
76 #[inline(always)]
77 pub fn is_n256(&self) -> bool {
78 *self == LOCKS_NUM_A::N256
79 }
80 #[doc = "32 lock registers"]
81 #[inline(always)]
82 pub fn is_n32(&self) -> bool {
83 *self == LOCKS_NUM_A::N32
84 }
85 #[doc = "64 lock registers"]
86 #[inline(always)]
87 pub fn is_n64(&self) -> bool {
88 *self == LOCKS_NUM_A::N64
89 }
90 #[doc = "128 lock registers"]
91 #[inline(always)]
92 pub fn is_n128(&self) -> bool {
93 *self == LOCKS_NUM_A::N128
94 }
95}
96impl R {
97 #[doc = "Bit 8 - In-Use flag0"]
98 #[inline(always)]
99 pub fn iu0(&self) -> IU0_R {
100 IU0_R::new(((self.bits >> 8) & 1) != 0)
101 }
102 #[doc = "Bits 28:29 - Number of lock registers implemented"]
103 #[inline(always)]
104 pub fn locks_num(&self) -> LOCKS_NUM_R {
105 LOCKS_NUM_R::new(((self.bits >> 28) & 3) as u8)
106 }
107}
108#[doc = "Spinlock System Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spinlock_systatus::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
109pub struct SPINLOCK_SYSTATUS_SPEC;
110impl crate::RegisterSpec for SPINLOCK_SYSTATUS_SPEC {
111 type Ux = u32;
112}
113#[doc = "`read()` method returns [`spinlock_systatus::R`](R) reader structure"]
114impl crate::Readable for SPINLOCK_SYSTATUS_SPEC {}
115#[doc = "`reset()` method sets spinlock_systatus to value 0"]
116impl crate::Resettable for SPINLOCK_SYSTATUS_SPEC {
117 const RESET_VALUE: Self::Ux = 0;
118}