d1_pac/spi_dbi/
dbi_timer.rs

1#[doc = "Register `dbi_timer` reader"]
2pub type R = crate::R<DBI_TIMER_SPEC>;
3#[doc = "Register `dbi_timer` writer"]
4pub type W = crate::W<DBI_TIMER_SPEC>;
5#[doc = "Field `dbi_timer_value` reader - "]
6pub type DBI_TIMER_VALUE_R = crate::FieldReader<u32>;
7#[doc = "Field `dbi_timer_value` writer - "]
8pub type DBI_TIMER_VALUE_W<'a, REG> = crate::FieldWriter<'a, REG, 31, u32>;
9#[doc = "Field `dbi_tm_en` reader - DBI Timer Enable"]
10pub type DBI_TM_EN_R = crate::BitReader<DBI_TM_EN_A>;
11#[doc = "DBI Timer Enable\n\nValue on reset: 0"]
12#[derive(Clone, Copy, Debug, PartialEq, Eq)]
13pub enum DBI_TM_EN_A {
14    #[doc = "0: `0`"]
15    ENABLE = 0,
16    #[doc = "1: `1`"]
17    DISABLE = 1,
18}
19impl From<DBI_TM_EN_A> for bool {
20    #[inline(always)]
21    fn from(variant: DBI_TM_EN_A) -> Self {
22        variant as u8 != 0
23    }
24}
25impl DBI_TM_EN_R {
26    #[doc = "Get enumerated values variant"]
27    #[inline(always)]
28    pub const fn variant(&self) -> DBI_TM_EN_A {
29        match self.bits {
30            false => DBI_TM_EN_A::ENABLE,
31            true => DBI_TM_EN_A::DISABLE,
32        }
33    }
34    #[doc = "`0`"]
35    #[inline(always)]
36    pub fn is_enable(&self) -> bool {
37        *self == DBI_TM_EN_A::ENABLE
38    }
39    #[doc = "`1`"]
40    #[inline(always)]
41    pub fn is_disable(&self) -> bool {
42        *self == DBI_TM_EN_A::DISABLE
43    }
44}
45#[doc = "Field `dbi_tm_en` writer - DBI Timer Enable"]
46pub type DBI_TM_EN_W<'a, REG> = crate::BitWriter<'a, REG, DBI_TM_EN_A>;
47impl<'a, REG> DBI_TM_EN_W<'a, REG>
48where
49    REG: crate::Writable + crate::RegisterSpec,
50{
51    #[doc = "`0`"]
52    #[inline(always)]
53    pub fn enable(self) -> &'a mut crate::W<REG> {
54        self.variant(DBI_TM_EN_A::ENABLE)
55    }
56    #[doc = "`1`"]
57    #[inline(always)]
58    pub fn disable(self) -> &'a mut crate::W<REG> {
59        self.variant(DBI_TM_EN_A::DISABLE)
60    }
61}
62impl R {
63    #[doc = "Bits 0:30"]
64    #[inline(always)]
65    pub fn dbi_timer_value(&self) -> DBI_TIMER_VALUE_R {
66        DBI_TIMER_VALUE_R::new(self.bits & 0x7fff_ffff)
67    }
68    #[doc = "Bit 31 - DBI Timer Enable"]
69    #[inline(always)]
70    pub fn dbi_tm_en(&self) -> DBI_TM_EN_R {
71        DBI_TM_EN_R::new(((self.bits >> 31) & 1) != 0)
72    }
73}
74impl W {
75    #[doc = "Bits 0:30"]
76    #[inline(always)]
77    #[must_use]
78    pub fn dbi_timer_value(&mut self) -> DBI_TIMER_VALUE_W<DBI_TIMER_SPEC> {
79        DBI_TIMER_VALUE_W::new(self, 0)
80    }
81    #[doc = "Bit 31 - DBI Timer Enable"]
82    #[inline(always)]
83    #[must_use]
84    pub fn dbi_tm_en(&mut self) -> DBI_TM_EN_W<DBI_TIMER_SPEC> {
85        DBI_TM_EN_W::new(self, 31)
86    }
87    #[doc = r" Writes raw bits to the register."]
88    #[doc = r""]
89    #[doc = r" # Safety"]
90    #[doc = r""]
91    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
92    #[inline(always)]
93    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
94        self.bits = bits;
95        self
96    }
97}
98#[doc = "DBI Timer Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dbi_timer::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dbi_timer::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
99pub struct DBI_TIMER_SPEC;
100impl crate::RegisterSpec for DBI_TIMER_SPEC {
101    type Ux = u32;
102}
103#[doc = "`read()` method returns [`dbi_timer::R`](R) reader structure"]
104impl crate::Readable for DBI_TIMER_SPEC {}
105#[doc = "`write(|w| ..)` method takes [`dbi_timer::W`](W) writer structure"]
106impl crate::Writable for DBI_TIMER_SPEC {
107    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
108    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
109}
110#[doc = "`reset()` method sets dbi_timer to value 0"]
111impl crate::Resettable for DBI_TIMER_SPEC {
112    const RESET_VALUE: Self::Ux = 0;
113}
d1_pac/spi_dbi/dbi_timer.rs

d1_pac/spi_dbi/
dbi_timer.rs
