d1_pac/spi_dbi/
dbi_debug_0.rs

1#[doc = "Register `dbi_debug_0` reader"]
2pub type R = crate::R<DBI_DEBUG_0_SPEC>;
3#[doc = "Field `mem_cs` reader - "]
4pub type MEM_CS_R = crate::FieldReader;
5#[doc = "Field `dbi_txcs` reader - "]
6pub type DBI_TXCS_R = crate::FieldReader;
7#[doc = "Field `sh_cs` reader - "]
8pub type SH_CS_R = crate::FieldReader;
9#[doc = "Field `dbi_rxcs` reader - "]
10pub type DBI_RXCS_R = crate::FieldReader;
11#[doc = "Field `te_val` reader - "]
12pub type TE_VAL_R = crate::BitReader;
13#[doc = "Field `dbi_fifo_avail` reader - "]
14pub type DBI_FIFO_AVAIL_R = crate::FieldReader;
15impl R {
16    #[doc = "Bits 0:1"]
17    #[inline(always)]
18    pub fn mem_cs(&self) -> MEM_CS_R {
19        MEM_CS_R::new((self.bits & 3) as u8)
20    }
21    #[doc = "Bits 2:3"]
22    #[inline(always)]
23    pub fn dbi_txcs(&self) -> DBI_TXCS_R {
24        DBI_TXCS_R::new(((self.bits >> 2) & 3) as u8)
25    }
26    #[doc = "Bits 4:7"]
27    #[inline(always)]
28    pub fn sh_cs(&self) -> SH_CS_R {
29        SH_CS_R::new(((self.bits >> 4) & 0x0f) as u8)
30    }
31    #[doc = "Bits 8:11"]
32    #[inline(always)]
33    pub fn dbi_rxcs(&self) -> DBI_RXCS_R {
34        DBI_RXCS_R::new(((self.bits >> 8) & 0x0f) as u8)
35    }
36    #[doc = "Bit 12"]
37    #[inline(always)]
38    pub fn te_val(&self) -> TE_VAL_R {
39        TE_VAL_R::new(((self.bits >> 12) & 1) != 0)
40    }
41    #[doc = "Bits 16:22"]
42    #[inline(always)]
43    pub fn dbi_fifo_avail(&self) -> DBI_FIFO_AVAIL_R {
44        DBI_FIFO_AVAIL_R::new(((self.bits >> 16) & 0x7f) as u8)
45    }
46}
47#[doc = "DBI BEBUG 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dbi_debug_0::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
48pub struct DBI_DEBUG_0_SPEC;
49impl crate::RegisterSpec for DBI_DEBUG_0_SPEC {
50    type Ux = u32;
51}
52#[doc = "`read()` method returns [`dbi_debug_0::R`](R) reader structure"]
53impl crate::Readable for DBI_DEBUG_0_SPEC {}
54#[doc = "`reset()` method sets dbi_debug_0 to value 0"]
55impl crate::Resettable for DBI_DEBUG_0_SPEC {
56    const RESET_VALUE: Self::Ux = 0;
57}
d1_pac/spi_dbi/dbi_debug_0.rs

d1_pac/spi_dbi/
dbi_debug_0.rs
