d1_pac/rtc/
losc_ctrl.rs

1#[doc = "Register `losc_ctrl` reader"]
2pub type R = crate::R<LOSC_CTRL_SPEC>;
3#[doc = "Register `losc_ctrl` writer"]
4pub type W = crate::W<LOSC_CTRL_SPEC>;
5#[doc = "Field `losc_src_sel` reader - LOSC Clock Source Select"]
6pub type LOSC_SRC_SEL_R = crate::BitReader<LOSC_SRC_SEL_A>;
7#[doc = "LOSC Clock Source Select\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum LOSC_SRC_SEL_A {
10    #[doc = "0: Low frequency clock from 16M RC"]
11    LOW = 0,
12    #[doc = "1: External 32.768 kHz OSC"]
13    EXTERNAL = 1,
14}
15impl From<LOSC_SRC_SEL_A> for bool {
16    #[inline(always)]
17    fn from(variant: LOSC_SRC_SEL_A) -> Self {
18        variant as u8 != 0
19    }
20}
21impl LOSC_SRC_SEL_R {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> LOSC_SRC_SEL_A {
25        match self.bits {
26            false => LOSC_SRC_SEL_A::LOW,
27            true => LOSC_SRC_SEL_A::EXTERNAL,
28        }
29    }
30    #[doc = "Low frequency clock from 16M RC"]
31    #[inline(always)]
32    pub fn is_low(&self) -> bool {
33        *self == LOSC_SRC_SEL_A::LOW
34    }
35    #[doc = "External 32.768 kHz OSC"]
36    #[inline(always)]
37    pub fn is_external(&self) -> bool {
38        *self == LOSC_SRC_SEL_A::EXTERNAL
39    }
40}
41#[doc = "Field `losc_src_sel` writer - LOSC Clock Source Select"]
42pub type LOSC_SRC_SEL_W<'a, REG> = crate::BitWriter<'a, REG, LOSC_SRC_SEL_A>;
43impl<'a, REG> LOSC_SRC_SEL_W<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    #[doc = "Low frequency clock from 16M RC"]
48    #[inline(always)]
49    pub fn low(self) -> &'a mut crate::W<REG> {
50        self.variant(LOSC_SRC_SEL_A::LOW)
51    }
52    #[doc = "External 32.768 kHz OSC"]
53    #[inline(always)]
54    pub fn external(self) -> &'a mut crate::W<REG> {
55        self.variant(LOSC_SRC_SEL_A::EXTERNAL)
56    }
57}
58#[doc = "Field `rtc_src_sel` reader - RTC_TIMER Clock Source Select"]
59pub type RTC_SRC_SEL_R = crate::BitReader<RTC_SRC_SEL_A>;
60#[doc = "RTC_TIMER Clock Source Select\n\nValue on reset: 0"]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum RTC_SRC_SEL_A {
63    #[doc = "0: LOSC_SRC"]
64    LOSC_SRC = 0,
65    #[doc = "1: 24MDIV32K\n\nBefore switching the bit, make sure that the 24MDIV32K function is enabled, that is, the bit16 of the 32K Fanout Control Register is 1."]
66    _24MDIV32K = 1,
67}
68impl From<RTC_SRC_SEL_A> for bool {
69    #[inline(always)]
70    fn from(variant: RTC_SRC_SEL_A) -> Self {
71        variant as u8 != 0
72    }
73}
74impl RTC_SRC_SEL_R {
75    #[doc = "Get enumerated values variant"]
76    #[inline(always)]
77    pub const fn variant(&self) -> RTC_SRC_SEL_A {
78        match self.bits {
79            false => RTC_SRC_SEL_A::LOSC_SRC,
80            true => RTC_SRC_SEL_A::_24MDIV32K,
81        }
82    }
83    #[doc = "LOSC_SRC"]
84    #[inline(always)]
85    pub fn is_losc_src(&self) -> bool {
86        *self == RTC_SRC_SEL_A::LOSC_SRC
87    }
88    #[doc = "24MDIV32K\n\nBefore switching the bit, make sure that the 24MDIV32K function is enabled, that is, the bit16 of the 32K Fanout Control Register is 1."]
89    #[inline(always)]
90    pub fn is_24mdiv32k(&self) -> bool {
91        *self == RTC_SRC_SEL_A::_24MDIV32K
92    }
93}
94#[doc = "Field `rtc_src_sel` writer - RTC_TIMER Clock Source Select"]
95pub type RTC_SRC_SEL_W<'a, REG> = crate::BitWriter<'a, REG, RTC_SRC_SEL_A>;
96impl<'a, REG> RTC_SRC_SEL_W<'a, REG>
97where
98    REG: crate::Writable + crate::RegisterSpec,
99{
100    #[doc = "LOSC_SRC"]
101    #[inline(always)]
102    pub fn losc_src(self) -> &'a mut crate::W<REG> {
103        self.variant(RTC_SRC_SEL_A::LOSC_SRC)
104    }
105    #[doc = "24MDIV32K\n\nBefore switching the bit, make sure that the 24MDIV32K function is enabled, that is, the bit16 of the 32K Fanout Control Register is 1."]
106    #[inline(always)]
107    pub fn _24mdiv32k(self) -> &'a mut crate::W<REG> {
108        self.variant(RTC_SRC_SEL_A::_24MDIV32K)
109    }
110}
111#[doc = "Field `ext_losc_gsm` reader - External 32.768 kHz Crystal GSM\n\nWhen GSM is changed, the 32K oscillation circuit will arise transient instability. If the autoswitch function (bit 15) is enabled, 32K changes to RC16M with certain probability. The GSM can influence the time of 32K starting oscillation, the more the GSM, the shorter the time of starting oscillation. So modifying GSM is not recommended.\n\nIf you need to modify the GSM, firstly disable the auto switch function (bit 15), with a delay of 50 us, then change the GSM, the 32K clock source is changed to external clock."]
112pub type EXT_LOSC_GSM_R = crate::FieldReader<EXT_LOSC_GSM_A>;
113#[doc = "External 32.768 kHz Crystal GSM\n\nWhen GSM is changed, the 32K oscillation circuit will arise transient instability. If the autoswitch function (bit 15) is enabled, 32K changes to RC16M with certain probability. The GSM can influence the time of 32K starting oscillation, the more the GSM, the shorter the time of starting oscillation. So modifying GSM is not recommended.\n\nIf you need to modify the GSM, firstly disable the auto switch function (bit 15), with a delay of 50 us, then change the GSM, the 32K clock source is changed to external clock.\n\nValue on reset: 0"]
114#[derive(Clone, Copy, Debug, PartialEq, Eq)]
115#[repr(u8)]
116pub enum EXT_LOSC_GSM_A {
117    #[doc = "0: Low"]
118    LOW = 0,
119    #[doc = "3: High"]
120    HIGH = 3,
121}
122impl From<EXT_LOSC_GSM_A> for u8 {
123    #[inline(always)]
124    fn from(variant: EXT_LOSC_GSM_A) -> Self {
125        variant as _
126    }
127}
128impl crate::FieldSpec for EXT_LOSC_GSM_A {
129    type Ux = u8;
130}
131impl EXT_LOSC_GSM_R {
132    #[doc = "Get enumerated values variant"]
133    #[inline(always)]
134    pub const fn variant(&self) -> Option<EXT_LOSC_GSM_A> {
135        match self.bits {
136            0 => Some(EXT_LOSC_GSM_A::LOW),
137            3 => Some(EXT_LOSC_GSM_A::HIGH),
138            _ => None,
139        }
140    }
141    #[doc = "Low"]
142    #[inline(always)]
143    pub fn is_low(&self) -> bool {
144        *self == EXT_LOSC_GSM_A::LOW
145    }
146    #[doc = "High"]
147    #[inline(always)]
148    pub fn is_high(&self) -> bool {
149        *self == EXT_LOSC_GSM_A::HIGH
150    }
151}
152#[doc = "Field `ext_losc_gsm` writer - External 32.768 kHz Crystal GSM\n\nWhen GSM is changed, the 32K oscillation circuit will arise transient instability. If the autoswitch function (bit 15) is enabled, 32K changes to RC16M with certain probability. The GSM can influence the time of 32K starting oscillation, the more the GSM, the shorter the time of starting oscillation. So modifying GSM is not recommended.\n\nIf you need to modify the GSM, firstly disable the auto switch function (bit 15), with a delay of 50 us, then change the GSM, the 32K clock source is changed to external clock."]
153pub type EXT_LOSC_GSM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, EXT_LOSC_GSM_A>;
154impl<'a, REG> EXT_LOSC_GSM_W<'a, REG>
155where
156    REG: crate::Writable + crate::RegisterSpec,
157    REG::Ux: From<u8>,
158{
159    #[doc = "Low"]
160    #[inline(always)]
161    pub fn low(self) -> &'a mut crate::W<REG> {
162        self.variant(EXT_LOSC_GSM_A::LOW)
163    }
164    #[doc = "High"]
165    #[inline(always)]
166    pub fn high(self) -> &'a mut crate::W<REG> {
167        self.variant(EXT_LOSC_GSM_A::HIGH)
168    }
169}
170#[doc = "Field `ext_losc_en` reader - External 32.768 kHz Crystal Enable"]
171pub type EXT_LOSC_EN_R = crate::BitReader<EXT_LOSC_EN_A>;
172#[doc = "External 32.768 kHz Crystal Enable\n\nValue on reset: 1"]
173#[derive(Clone, Copy, Debug, PartialEq, Eq)]
174pub enum EXT_LOSC_EN_A {
175    #[doc = "0: Disable"]
176    DISABLE = 0,
177    #[doc = "1: Enable"]
178    ENABLE = 1,
179}
180impl From<EXT_LOSC_EN_A> for bool {
181    #[inline(always)]
182    fn from(variant: EXT_LOSC_EN_A) -> Self {
183        variant as u8 != 0
184    }
185}
186impl EXT_LOSC_EN_R {
187    #[doc = "Get enumerated values variant"]
188    #[inline(always)]
189    pub const fn variant(&self) -> EXT_LOSC_EN_A {
190        match self.bits {
191            false => EXT_LOSC_EN_A::DISABLE,
192            true => EXT_LOSC_EN_A::ENABLE,
193        }
194    }
195    #[doc = "Disable"]
196    #[inline(always)]
197    pub fn is_disable(&self) -> bool {
198        *self == EXT_LOSC_EN_A::DISABLE
199    }
200    #[doc = "Enable"]
201    #[inline(always)]
202    pub fn is_enable(&self) -> bool {
203        *self == EXT_LOSC_EN_A::ENABLE
204    }
205}
206#[doc = "Field `ext_losc_en` writer - External 32.768 kHz Crystal Enable"]
207pub type EXT_LOSC_EN_W<'a, REG> = crate::BitWriter<'a, REG, EXT_LOSC_EN_A>;
208impl<'a, REG> EXT_LOSC_EN_W<'a, REG>
209where
210    REG: crate::Writable + crate::RegisterSpec,
211{
212    #[doc = "Disable"]
213    #[inline(always)]
214    pub fn disable(self) -> &'a mut crate::W<REG> {
215        self.variant(EXT_LOSC_EN_A::DISABLE)
216    }
217    #[doc = "Enable"]
218    #[inline(always)]
219    pub fn enable(self) -> &'a mut crate::W<REG> {
220        self.variant(EXT_LOSC_EN_A::ENABLE)
221    }
222}
223#[doc = "Field `rtc_day_acce` reader - RTC DAY access\n\nAfter writing the RTC DAY register, this bit is set and it will be cleared until the real writing operation is finished. After writing the RTC DAY register, the DAY register will be refreshed for at most one second.\n\nNote: Make sure that the bit is 0 for time configuration."]
224pub type RTC_DAY_ACCE_R = crate::BitReader;
225#[doc = "Field `rtc_day_acce` writer - RTC DAY access\n\nAfter writing the RTC DAY register, this bit is set and it will be cleared until the real writing operation is finished. After writing the RTC DAY register, the DAY register will be refreshed for at most one second.\n\nNote: Make sure that the bit is 0 for time configuration."]
226pub type RTC_DAY_ACCE_W<'a, REG> = crate::BitWriter<'a, REG>;
227#[doc = "Field `rtc_hhmmss_acce` reader - RTC Hour Minute Second access\n\nAfter writing the RTC HH-MM-SS Register, this bit is set and it will be cleared until the real writing operation is finished. After writing the RTC HH-MM-SS Register, the RTC HH-MM-SS Register will be refreshed for at most one second.\n\nNote: Make sure that the bit is 0 for time configuration."]
228pub type RTC_HHMMSS_ACCE_R = crate::BitReader;
229#[doc = "Field `rtc_hhmmss_acce` writer - RTC Hour Minute Second access\n\nAfter writing the RTC HH-MM-SS Register, this bit is set and it will be cleared until the real writing operation is finished. After writing the RTC HH-MM-SS Register, the RTC HH-MM-SS Register will be refreshed for at most one second.\n\nNote: Make sure that the bit is 0 for time configuration."]
230pub type RTC_HHMMSS_ACCE_W<'a, REG> = crate::BitWriter<'a, REG>;
231#[doc = "Field `losc_auto_swt_32k_sel_en` reader - LOSC auto switch 32K clk source select enable"]
232pub type LOSC_AUTO_SWT_32K_SEL_EN_R = crate::BitReader<LOSC_AUTO_SWT_32K_SEL_EN_A>;
233#[doc = "LOSC auto switch 32K clk source select enable\n\nValue on reset: 1"]
234#[derive(Clone, Copy, Debug, PartialEq, Eq)]
235pub enum LOSC_AUTO_SWT_32K_SEL_EN_A {
236    #[doc = "0: Disable. When the losc losts, the 32k clk source will not change to RC"]
237    DISABLE = 0,
238    #[doc = "1: Enable. When the losc losts, the 32k clk source will change to RC (LOSC_SRC_SEL will be changed from 1 to 0)"]
239    ENABLE = 1,
240}
241impl From<LOSC_AUTO_SWT_32K_SEL_EN_A> for bool {
242    #[inline(always)]
243    fn from(variant: LOSC_AUTO_SWT_32K_SEL_EN_A) -> Self {
244        variant as u8 != 0
245    }
246}
247impl LOSC_AUTO_SWT_32K_SEL_EN_R {
248    #[doc = "Get enumerated values variant"]
249    #[inline(always)]
250    pub const fn variant(&self) -> LOSC_AUTO_SWT_32K_SEL_EN_A {
251        match self.bits {
252            false => LOSC_AUTO_SWT_32K_SEL_EN_A::DISABLE,
253            true => LOSC_AUTO_SWT_32K_SEL_EN_A::ENABLE,
254        }
255    }
256    #[doc = "Disable. When the losc losts, the 32k clk source will not change to RC"]
257    #[inline(always)]
258    pub fn is_disable(&self) -> bool {
259        *self == LOSC_AUTO_SWT_32K_SEL_EN_A::DISABLE
260    }
261    #[doc = "Enable. When the losc losts, the 32k clk source will change to RC (LOSC_SRC_SEL will be changed from 1 to 0)"]
262    #[inline(always)]
263    pub fn is_enable(&self) -> bool {
264        *self == LOSC_AUTO_SWT_32K_SEL_EN_A::ENABLE
265    }
266}
267#[doc = "Field `losc_auto_swt_32k_sel_en` writer - LOSC auto switch 32K clk source select enable"]
268pub type LOSC_AUTO_SWT_32K_SEL_EN_W<'a, REG> =
269    crate::BitWriter<'a, REG, LOSC_AUTO_SWT_32K_SEL_EN_A>;
270impl<'a, REG> LOSC_AUTO_SWT_32K_SEL_EN_W<'a, REG>
271where
272    REG: crate::Writable + crate::RegisterSpec,
273{
274    #[doc = "Disable. When the losc losts, the 32k clk source will not change to RC"]
275    #[inline(always)]
276    pub fn disable(self) -> &'a mut crate::W<REG> {
277        self.variant(LOSC_AUTO_SWT_32K_SEL_EN_A::DISABLE)
278    }
279    #[doc = "Enable. When the losc losts, the 32k clk source will change to RC (LOSC_SRC_SEL will be changed from 1 to 0)"]
280    #[inline(always)]
281    pub fn enable(self) -> &'a mut crate::W<REG> {
282        self.variant(LOSC_AUTO_SWT_32K_SEL_EN_A::ENABLE)
283    }
284}
285#[doc = "Field `losc_auto_swt_function` reader - LOSC auto switch function disable"]
286pub type LOSC_AUTO_SWT_FUNCTION_R = crate::BitReader<LOSC_AUTO_SWT_FUNCTION_A>;
287#[doc = "LOSC auto switch function disable\n\nValue on reset: 0"]
288#[derive(Clone, Copy, Debug, PartialEq, Eq)]
289pub enum LOSC_AUTO_SWT_FUNCTION_A {
290    #[doc = "0: Enable"]
291    ENABLE = 0,
292    #[doc = "1: Disable"]
293    DISABLE = 1,
294}
295impl From<LOSC_AUTO_SWT_FUNCTION_A> for bool {
296    #[inline(always)]
297    fn from(variant: LOSC_AUTO_SWT_FUNCTION_A) -> Self {
298        variant as u8 != 0
299    }
300}
301impl LOSC_AUTO_SWT_FUNCTION_R {
302    #[doc = "Get enumerated values variant"]
303    #[inline(always)]
304    pub const fn variant(&self) -> LOSC_AUTO_SWT_FUNCTION_A {
305        match self.bits {
306            false => LOSC_AUTO_SWT_FUNCTION_A::ENABLE,
307            true => LOSC_AUTO_SWT_FUNCTION_A::DISABLE,
308        }
309    }
310    #[doc = "Enable"]
311    #[inline(always)]
312    pub fn is_enable(&self) -> bool {
313        *self == LOSC_AUTO_SWT_FUNCTION_A::ENABLE
314    }
315    #[doc = "Disable"]
316    #[inline(always)]
317    pub fn is_disable(&self) -> bool {
318        *self == LOSC_AUTO_SWT_FUNCTION_A::DISABLE
319    }
320}
321#[doc = "Field `losc_auto_swt_function` writer - LOSC auto switch function disable"]
322pub type LOSC_AUTO_SWT_FUNCTION_W<'a, REG> = crate::BitWriter<'a, REG, LOSC_AUTO_SWT_FUNCTION_A>;
323impl<'a, REG> LOSC_AUTO_SWT_FUNCTION_W<'a, REG>
324where
325    REG: crate::Writable + crate::RegisterSpec,
326{
327    #[doc = "Enable"]
328    #[inline(always)]
329    pub fn enable(self) -> &'a mut crate::W<REG> {
330        self.variant(LOSC_AUTO_SWT_FUNCTION_A::ENABLE)
331    }
332    #[doc = "Disable"]
333    #[inline(always)]
334    pub fn disable(self) -> &'a mut crate::W<REG> {
335        self.variant(LOSC_AUTO_SWT_FUNCTION_A::DISABLE)
336    }
337}
338#[doc = "Field `key_field` writer - Key Field\n\nThis field should be filled with 0x16AA, and then the bit0 and bit1 can be written with the new value."]
339pub type KEY_FIELD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>;
340impl R {
341    #[doc = "Bit 0 - LOSC Clock Source Select"]
342    #[inline(always)]
343    pub fn losc_src_sel(&self) -> LOSC_SRC_SEL_R {
344        LOSC_SRC_SEL_R::new((self.bits & 1) != 0)
345    }
346    #[doc = "Bit 1 - RTC_TIMER Clock Source Select"]
347    #[inline(always)]
348    pub fn rtc_src_sel(&self) -> RTC_SRC_SEL_R {
349        RTC_SRC_SEL_R::new(((self.bits >> 1) & 1) != 0)
350    }
351    #[doc = "Bits 2:3 - External 32.768 kHz Crystal GSM\n\nWhen GSM is changed, the 32K oscillation circuit will arise transient instability. If the autoswitch function (bit 15) is enabled, 32K changes to RC16M with certain probability. The GSM can influence the time of 32K starting oscillation, the more the GSM, the shorter the time of starting oscillation. So modifying GSM is not recommended.\n\nIf you need to modify the GSM, firstly disable the auto switch function (bit 15), with a delay of 50 us, then change the GSM, the 32K clock source is changed to external clock."]
352    #[inline(always)]
353    pub fn ext_losc_gsm(&self) -> EXT_LOSC_GSM_R {
354        EXT_LOSC_GSM_R::new(((self.bits >> 2) & 3) as u8)
355    }
356    #[doc = "Bit 4 - External 32.768 kHz Crystal Enable"]
357    #[inline(always)]
358    pub fn ext_losc_en(&self) -> EXT_LOSC_EN_R {
359        EXT_LOSC_EN_R::new(((self.bits >> 4) & 1) != 0)
360    }
361    #[doc = "Bit 7 - RTC DAY access\n\nAfter writing the RTC DAY register, this bit is set and it will be cleared until the real writing operation is finished. After writing the RTC DAY register, the DAY register will be refreshed for at most one second.\n\nNote: Make sure that the bit is 0 for time configuration."]
362    #[inline(always)]
363    pub fn rtc_day_acce(&self) -> RTC_DAY_ACCE_R {
364        RTC_DAY_ACCE_R::new(((self.bits >> 7) & 1) != 0)
365    }
366    #[doc = "Bit 8 - RTC Hour Minute Second access\n\nAfter writing the RTC HH-MM-SS Register, this bit is set and it will be cleared until the real writing operation is finished. After writing the RTC HH-MM-SS Register, the RTC HH-MM-SS Register will be refreshed for at most one second.\n\nNote: Make sure that the bit is 0 for time configuration."]
367    #[inline(always)]
368    pub fn rtc_hhmmss_acce(&self) -> RTC_HHMMSS_ACCE_R {
369        RTC_HHMMSS_ACCE_R::new(((self.bits >> 8) & 1) != 0)
370    }
371    #[doc = "Bit 14 - LOSC auto switch 32K clk source select enable"]
372    #[inline(always)]
373    pub fn losc_auto_swt_32k_sel_en(&self) -> LOSC_AUTO_SWT_32K_SEL_EN_R {
374        LOSC_AUTO_SWT_32K_SEL_EN_R::new(((self.bits >> 14) & 1) != 0)
375    }
376    #[doc = "Bit 15 - LOSC auto switch function disable"]
377    #[inline(always)]
378    pub fn losc_auto_swt_function(&self) -> LOSC_AUTO_SWT_FUNCTION_R {
379        LOSC_AUTO_SWT_FUNCTION_R::new(((self.bits >> 15) & 1) != 0)
380    }
381}
382impl W {
383    #[doc = "Bit 0 - LOSC Clock Source Select"]
384    #[inline(always)]
385    #[must_use]
386    pub fn losc_src_sel(&mut self) -> LOSC_SRC_SEL_W<LOSC_CTRL_SPEC> {
387        LOSC_SRC_SEL_W::new(self, 0)
388    }
389    #[doc = "Bit 1 - RTC_TIMER Clock Source Select"]
390    #[inline(always)]
391    #[must_use]
392    pub fn rtc_src_sel(&mut self) -> RTC_SRC_SEL_W<LOSC_CTRL_SPEC> {
393        RTC_SRC_SEL_W::new(self, 1)
394    }
395    #[doc = "Bits 2:3 - External 32.768 kHz Crystal GSM\n\nWhen GSM is changed, the 32K oscillation circuit will arise transient instability. If the autoswitch function (bit 15) is enabled, 32K changes to RC16M with certain probability. The GSM can influence the time of 32K starting oscillation, the more the GSM, the shorter the time of starting oscillation. So modifying GSM is not recommended.\n\nIf you need to modify the GSM, firstly disable the auto switch function (bit 15), with a delay of 50 us, then change the GSM, the 32K clock source is changed to external clock."]
396    #[inline(always)]
397    #[must_use]
398    pub fn ext_losc_gsm(&mut self) -> EXT_LOSC_GSM_W<LOSC_CTRL_SPEC> {
399        EXT_LOSC_GSM_W::new(self, 2)
400    }
401    #[doc = "Bit 4 - External 32.768 kHz Crystal Enable"]
402    #[inline(always)]
403    #[must_use]
404    pub fn ext_losc_en(&mut self) -> EXT_LOSC_EN_W<LOSC_CTRL_SPEC> {
405        EXT_LOSC_EN_W::new(self, 4)
406    }
407    #[doc = "Bit 7 - RTC DAY access\n\nAfter writing the RTC DAY register, this bit is set and it will be cleared until the real writing operation is finished. After writing the RTC DAY register, the DAY register will be refreshed for at most one second.\n\nNote: Make sure that the bit is 0 for time configuration."]
408    #[inline(always)]
409    #[must_use]
410    pub fn rtc_day_acce(&mut self) -> RTC_DAY_ACCE_W<LOSC_CTRL_SPEC> {
411        RTC_DAY_ACCE_W::new(self, 7)
412    }
413    #[doc = "Bit 8 - RTC Hour Minute Second access\n\nAfter writing the RTC HH-MM-SS Register, this bit is set and it will be cleared until the real writing operation is finished. After writing the RTC HH-MM-SS Register, the RTC HH-MM-SS Register will be refreshed for at most one second.\n\nNote: Make sure that the bit is 0 for time configuration."]
414    #[inline(always)]
415    #[must_use]
416    pub fn rtc_hhmmss_acce(&mut self) -> RTC_HHMMSS_ACCE_W<LOSC_CTRL_SPEC> {
417        RTC_HHMMSS_ACCE_W::new(self, 8)
418    }
419    #[doc = "Bit 14 - LOSC auto switch 32K clk source select enable"]
420    #[inline(always)]
421    #[must_use]
422    pub fn losc_auto_swt_32k_sel_en(&mut self) -> LOSC_AUTO_SWT_32K_SEL_EN_W<LOSC_CTRL_SPEC> {
423        LOSC_AUTO_SWT_32K_SEL_EN_W::new(self, 14)
424    }
425    #[doc = "Bit 15 - LOSC auto switch function disable"]
426    #[inline(always)]
427    #[must_use]
428    pub fn losc_auto_swt_function(&mut self) -> LOSC_AUTO_SWT_FUNCTION_W<LOSC_CTRL_SPEC> {
429        LOSC_AUTO_SWT_FUNCTION_W::new(self, 15)
430    }
431    #[doc = "Bits 16:31 - Key Field\n\nThis field should be filled with 0x16AA, and then the bit0 and bit1 can be written with the new value."]
432    #[inline(always)]
433    #[must_use]
434    pub fn key_field(&mut self) -> KEY_FIELD_W<LOSC_CTRL_SPEC> {
435        KEY_FIELD_W::new(self, 16)
436    }
437    #[doc = r" Writes raw bits to the register."]
438    #[doc = r""]
439    #[doc = r" # Safety"]
440    #[doc = r""]
441    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
442    #[inline(always)]
443    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
444        self.bits = bits;
445        self
446    }
447}
448#[doc = "Low Oscillator Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`losc_ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`losc_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
449pub struct LOSC_CTRL_SPEC;
450impl crate::RegisterSpec for LOSC_CTRL_SPEC {
451    type Ux = u32;
452}
453#[doc = "`read()` method returns [`losc_ctrl::R`](R) reader structure"]
454impl crate::Readable for LOSC_CTRL_SPEC {}
455#[doc = "`write(|w| ..)` method takes [`losc_ctrl::W`](W) writer structure"]
456impl crate::Writable for LOSC_CTRL_SPEC {
457    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
458    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
459}
460#[doc = "`reset()` method sets losc_ctrl to value 0x4010"]
461impl crate::Resettable for LOSC_CTRL_SPEC {
462    const RESET_VALUE: Self::Ux = 0x4010;
463}
d1_pac/rtc/losc_ctrl.rs

d1_pac/rtc/
losc_ctrl.rs
