d1_pac/riscv_cfg/
sram_addr_twist.rs

1#[doc = "Register `sram_addr_twist` reader"]
2pub type R = crate::R<SRAM_ADDR_TWIST_SPEC>;
3#[doc = "Register `sram_addr_twist` writer"]
4pub type W = crate::W<SRAM_ADDR_TWIST_SPEC>;
5#[doc = "Field `sram_addr_ts_fg` reader - SRAM Address Twist Flag"]
6pub type SRAM_ADDR_TS_FG_R = crate::BitReader;
7#[doc = "Field `sram_addr_ts_fg` writer - SRAM Address Twist Flag"]
8pub type SRAM_ADDR_TS_FG_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `sram_ts_kf` writer - SRAM Twist Keyfield"]
10pub type SRAM_TS_KF_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>;
11impl R {
12    #[doc = "Bit 0 - SRAM Address Twist Flag"]
13    #[inline(always)]
14    pub fn sram_addr_ts_fg(&self) -> SRAM_ADDR_TS_FG_R {
15        SRAM_ADDR_TS_FG_R::new((self.bits & 1) != 0)
16    }
17}
18impl W {
19    #[doc = "Bit 0 - SRAM Address Twist Flag"]
20    #[inline(always)]
21    #[must_use]
22    pub fn sram_addr_ts_fg(&mut self) -> SRAM_ADDR_TS_FG_W<SRAM_ADDR_TWIST_SPEC> {
23        SRAM_ADDR_TS_FG_W::new(self, 0)
24    }
25    #[doc = "Bits 16:31 - SRAM Twist Keyfield"]
26    #[inline(always)]
27    #[must_use]
28    pub fn sram_ts_kf(&mut self) -> SRAM_TS_KF_W<SRAM_ADDR_TWIST_SPEC> {
29        SRAM_TS_KF_W::new(self, 16)
30    }
31    #[doc = r" Writes raw bits to the register."]
32    #[doc = r""]
33    #[doc = r" # Safety"]
34    #[doc = r""]
35    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
36    #[inline(always)]
37    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
38        self.bits = bits;
39        self
40    }
41}
42#[doc = "SRAM Address Twist Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sram_addr_twist::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sram_addr_twist::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
43pub struct SRAM_ADDR_TWIST_SPEC;
44impl crate::RegisterSpec for SRAM_ADDR_TWIST_SPEC {
45    type Ux = u32;
46}
47#[doc = "`read()` method returns [`sram_addr_twist::R`](R) reader structure"]
48impl crate::Readable for SRAM_ADDR_TWIST_SPEC {}
49#[doc = "`write(|w| ..)` method takes [`sram_addr_twist::W`](W) writer structure"]
50impl crate::Writable for SRAM_ADDR_TWIST_SPEC {
51    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
52    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
53}
54#[doc = "`reset()` method sets sram_addr_twist to value 0"]
55impl crate::Resettable for SRAM_ADDR_TWIST_SPEC {
56    const RESET_VALUE: Self::Ux = 0;
57}
d1_pac/riscv_cfg/sram_addr_twist.rs

d1_pac/riscv_cfg/
sram_addr_twist.rs
