d1_pac/pwm/
pgr.rs

1#[doc = "Register `pgr%s` reader"]
2pub type R = crate::R<PGR_SPEC>;
3#[doc = "Register `pgr%s` writer"]
4pub type W = crate::W<PGR_SPEC>;
5#[doc = "Field `cs` reader - If bit\\[i\\] is set, the PWM i is selected as one channel of PWM Group\\[g\\]."]
6pub type CS_R = crate::FieldReader<u16>;
7#[doc = "Field `cs` writer - If bit\\[i\\] is set, the PWM i is selected as one channel of PWM Group\\[g\\]."]
8pub type CS_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>;
9#[doc = "Field `en` reader - PWM Group Enable."]
10pub type EN_R = crate::BitReader;
11#[doc = "Field `en` writer - PWM Group Enable."]
12pub type EN_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `start` reader - The PWM channels selected in CS start to output PWM waveform at the same time."]
14pub type START_R = crate::BitReader;
15#[doc = "Field `start` writer - The PWM channels selected in CS start to output PWM waveform at the same time."]
16pub type START_W<'a, REG> = crate::BitWriter<'a, REG>;
17impl R {
18    #[doc = "Bits 0:15 - If bit\\[i\\] is set, the PWM i is selected as one channel of PWM Group\\[g\\]."]
19    #[inline(always)]
20    pub fn cs(&self) -> CS_R {
21        CS_R::new((self.bits & 0xffff) as u16)
22    }
23    #[doc = "Bit 16 - PWM Group Enable."]
24    #[inline(always)]
25    pub fn en(&self) -> EN_R {
26        EN_R::new(((self.bits >> 16) & 1) != 0)
27    }
28    #[doc = "Bit 17 - The PWM channels selected in CS start to output PWM waveform at the same time."]
29    #[inline(always)]
30    pub fn start(&self) -> START_R {
31        START_R::new(((self.bits >> 17) & 1) != 0)
32    }
33}
34impl W {
35    #[doc = "Bits 0:15 - If bit\\[i\\] is set, the PWM i is selected as one channel of PWM Group\\[g\\]."]
36    #[inline(always)]
37    #[must_use]
38    pub fn cs(&mut self) -> CS_W<PGR_SPEC> {
39        CS_W::new(self, 0)
40    }
41    #[doc = "Bit 16 - PWM Group Enable."]
42    #[inline(always)]
43    #[must_use]
44    pub fn en(&mut self) -> EN_W<PGR_SPEC> {
45        EN_W::new(self, 16)
46    }
47    #[doc = "Bit 17 - The PWM channels selected in CS start to output PWM waveform at the same time."]
48    #[inline(always)]
49    #[must_use]
50    pub fn start(&mut self) -> START_W<PGR_SPEC> {
51        START_W::new(self, 17)
52    }
53    #[doc = r" Writes raw bits to the register."]
54    #[doc = r""]
55    #[doc = r" # Safety"]
56    #[doc = r""]
57    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
58    #[inline(always)]
59    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
60        self.bits = bits;
61        self
62    }
63}
64#[doc = "PWM Group\\[g\\] Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pgr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pgr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
65pub struct PGR_SPEC;
66impl crate::RegisterSpec for PGR_SPEC {
67    type Ux = u32;
68}
69#[doc = "`read()` method returns [`pgr::R`](R) reader structure"]
70impl crate::Readable for PGR_SPEC {}
71#[doc = "`write(|w| ..)` method takes [`pgr::W`](W) writer structure"]
72impl crate::Writable for PGR_SPEC {
73    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
74    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
75}
76#[doc = "`reset()` method sets pgr%s to value 0"]
77impl crate::Resettable for PGR_SPEC {
78    const RESET_VALUE: Self::Ux = 0;
79}
d1_pac/pwm/pgr.rs

d1_pac/pwm/
pgr.rs
