1#[doc = "Register `pdzcr45` reader"]
2pub type R = crate::R<PDZCR45_SPEC>;
3#[doc = "Register `pdzcr45` writer"]
4pub type W = crate::W<PDZCR45_SPEC>;
5#[doc = "Field `pwm45_dz_en` reader - PWM45 Dead Zone Enable"]
6pub type PWM45_DZ_EN_R = crate::BitReader<PWM45_DZ_EN_A>;
7#[doc = "PWM45 Dead Zone Enable\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum PWM45_DZ_EN_A {
10 #[doc = "0: Dead Zone disable"]
11 DISABLE = 0,
12 #[doc = "1: Dead Zone enable"]
13 ENABLE = 1,
14}
15impl From<PWM45_DZ_EN_A> for bool {
16 #[inline(always)]
17 fn from(variant: PWM45_DZ_EN_A) -> Self {
18 variant as u8 != 0
19 }
20}
21impl PWM45_DZ_EN_R {
22 #[doc = "Get enumerated values variant"]
23 #[inline(always)]
24 pub const fn variant(&self) -> PWM45_DZ_EN_A {
25 match self.bits {
26 false => PWM45_DZ_EN_A::DISABLE,
27 true => PWM45_DZ_EN_A::ENABLE,
28 }
29 }
30 #[doc = "Dead Zone disable"]
31 #[inline(always)]
32 pub fn is_disable(&self) -> bool {
33 *self == PWM45_DZ_EN_A::DISABLE
34 }
35 #[doc = "Dead Zone enable"]
36 #[inline(always)]
37 pub fn is_enable(&self) -> bool {
38 *self == PWM45_DZ_EN_A::ENABLE
39 }
40}
41#[doc = "Field `pwm45_dz_en` writer - PWM45 Dead Zone Enable"]
42pub type PWM45_DZ_EN_W<'a, REG> = crate::BitWriter<'a, REG, PWM45_DZ_EN_A>;
43impl<'a, REG> PWM45_DZ_EN_W<'a, REG>
44where
45 REG: crate::Writable + crate::RegisterSpec,
46{
47 #[doc = "Dead Zone disable"]
48 #[inline(always)]
49 pub fn disable(self) -> &'a mut crate::W<REG> {
50 self.variant(PWM45_DZ_EN_A::DISABLE)
51 }
52 #[doc = "Dead Zone enable"]
53 #[inline(always)]
54 pub fn enable(self) -> &'a mut crate::W<REG> {
55 self.variant(PWM45_DZ_EN_A::ENABLE)
56 }
57}
58#[doc = "Field `pwm45_dz_intv` reader - PWM45 Dead Zone Interval Value"]
59pub type PWM45_DZ_INTV_R = crate::FieldReader;
60#[doc = "Field `pwm45_dz_intv` writer - PWM45 Dead Zone Interval Value"]
61pub type PWM45_DZ_INTV_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
62impl R {
63 #[doc = "Bit 0 - PWM45 Dead Zone Enable"]
64 #[inline(always)]
65 pub fn pwm45_dz_en(&self) -> PWM45_DZ_EN_R {
66 PWM45_DZ_EN_R::new((self.bits & 1) != 0)
67 }
68 #[doc = "Bits 8:15 - PWM45 Dead Zone Interval Value"]
69 #[inline(always)]
70 pub fn pwm45_dz_intv(&self) -> PWM45_DZ_INTV_R {
71 PWM45_DZ_INTV_R::new(((self.bits >> 8) & 0xff) as u8)
72 }
73}
74impl W {
75 #[doc = "Bit 0 - PWM45 Dead Zone Enable"]
76 #[inline(always)]
77 #[must_use]
78 pub fn pwm45_dz_en(&mut self) -> PWM45_DZ_EN_W<PDZCR45_SPEC> {
79 PWM45_DZ_EN_W::new(self, 0)
80 }
81 #[doc = "Bits 8:15 - PWM45 Dead Zone Interval Value"]
82 #[inline(always)]
83 #[must_use]
84 pub fn pwm45_dz_intv(&mut self) -> PWM45_DZ_INTV_W<PDZCR45_SPEC> {
85 PWM45_DZ_INTV_W::new(self, 8)
86 }
87 #[doc = r" Writes raw bits to the register."]
88 #[doc = r""]
89 #[doc = r" # Safety"]
90 #[doc = r""]
91 #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
92 #[inline(always)]
93 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
94 self.bits = bits;
95 self
96 }
97}
98#[doc = "PWM45 Dead Zone Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdzcr45::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdzcr45::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
99pub struct PDZCR45_SPEC;
100impl crate::RegisterSpec for PDZCR45_SPEC {
101 type Ux = u32;
102}
103#[doc = "`read()` method returns [`pdzcr45::R`](R) reader structure"]
104impl crate::Readable for PDZCR45_SPEC {}
105#[doc = "`write(|w| ..)` method takes [`pdzcr45::W`](W) writer structure"]
106impl crate::Writable for PDZCR45_SPEC {
107 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
108 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
109}
110#[doc = "`reset()` method sets pdzcr45 to value 0"]
111impl crate::Resettable for PDZCR45_SPEC {
112 const RESET_VALUE: Self::Ux = 0;
113}