1#[doc = "Register `pcr%s` reader"]
2pub type R = crate::R<PCR_SPEC>;
3#[doc = "Register `pcr%s` writer"]
4pub type W = crate::W<PCR_SPEC>;
5#[doc = "Field `pwm_prescal_k` reader - PWM pre-scale K, actual pre-scale is (K + 1)"]
6pub type PWM_PRESCAL_K_R = crate::FieldReader;
7#[doc = "Field `pwm_prescal_k` writer - PWM pre-scale K, actual pre-scale is (K + 1)"]
8pub type PWM_PRESCAL_K_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9#[doc = "Field `pwm_act_sta` reader - PWM Active State"]
10pub type PWM_ACT_STA_R = crate::BitReader<PWM_ACT_STA_A>;
11#[doc = "PWM Active State\n\nValue on reset: 0"]
12#[derive(Clone, Copy, Debug, PartialEq, Eq)]
13pub enum PWM_ACT_STA_A {
14 #[doc = "0: low level"]
15 LOW = 0,
16 #[doc = "1: high level"]
17 HIGH = 1,
18}
19impl From<PWM_ACT_STA_A> for bool {
20 #[inline(always)]
21 fn from(variant: PWM_ACT_STA_A) -> Self {
22 variant as u8 != 0
23 }
24}
25impl PWM_ACT_STA_R {
26 #[doc = "Get enumerated values variant"]
27 #[inline(always)]
28 pub const fn variant(&self) -> PWM_ACT_STA_A {
29 match self.bits {
30 false => PWM_ACT_STA_A::LOW,
31 true => PWM_ACT_STA_A::HIGH,
32 }
33 }
34 #[doc = "low level"]
35 #[inline(always)]
36 pub fn is_low(&self) -> bool {
37 *self == PWM_ACT_STA_A::LOW
38 }
39 #[doc = "high level"]
40 #[inline(always)]
41 pub fn is_high(&self) -> bool {
42 *self == PWM_ACT_STA_A::HIGH
43 }
44}
45#[doc = "Field `pwm_act_sta` writer - PWM Active State"]
46pub type PWM_ACT_STA_W<'a, REG> = crate::BitWriter<'a, REG, PWM_ACT_STA_A>;
47impl<'a, REG> PWM_ACT_STA_W<'a, REG>
48where
49 REG: crate::Writable + crate::RegisterSpec,
50{
51 #[doc = "low level"]
52 #[inline(always)]
53 pub fn low(self) -> &'a mut crate::W<REG> {
54 self.variant(PWM_ACT_STA_A::LOW)
55 }
56 #[doc = "high level"]
57 #[inline(always)]
58 pub fn high(self) -> &'a mut crate::W<REG> {
59 self.variant(PWM_ACT_STA_A::HIGH)
60 }
61}
62#[doc = "Field `pwm_mode` reader - PWM Output Mode Select"]
63pub type PWM_MODE_R = crate::BitReader<PWM_MODE_A>;
64#[doc = "PWM Output Mode Select\n\nValue on reset: 0"]
65#[derive(Clone, Copy, Debug, PartialEq, Eq)]
66pub enum PWM_MODE_A {
67 #[doc = "0: Cycle mode"]
68 CYCLE = 0,
69 #[doc = "1: Pulse mode"]
70 PULSE = 1,
71}
72impl From<PWM_MODE_A> for bool {
73 #[inline(always)]
74 fn from(variant: PWM_MODE_A) -> Self {
75 variant as u8 != 0
76 }
77}
78impl PWM_MODE_R {
79 #[doc = "Get enumerated values variant"]
80 #[inline(always)]
81 pub const fn variant(&self) -> PWM_MODE_A {
82 match self.bits {
83 false => PWM_MODE_A::CYCLE,
84 true => PWM_MODE_A::PULSE,
85 }
86 }
87 #[doc = "Cycle mode"]
88 #[inline(always)]
89 pub fn is_cycle(&self) -> bool {
90 *self == PWM_MODE_A::CYCLE
91 }
92 #[doc = "Pulse mode"]
93 #[inline(always)]
94 pub fn is_pulse(&self) -> bool {
95 *self == PWM_MODE_A::PULSE
96 }
97}
98#[doc = "Field `pwm_mode` writer - PWM Output Mode Select"]
99pub type PWM_MODE_W<'a, REG> = crate::BitWriter<'a, REG, PWM_MODE_A>;
100impl<'a, REG> PWM_MODE_W<'a, REG>
101where
102 REG: crate::Writable + crate::RegisterSpec,
103{
104 #[doc = "Cycle mode"]
105 #[inline(always)]
106 pub fn cycle(self) -> &'a mut crate::W<REG> {
107 self.variant(PWM_MODE_A::CYCLE)
108 }
109 #[doc = "Pulse mode"]
110 #[inline(always)]
111 pub fn pulse(self) -> &'a mut crate::W<REG> {
112 self.variant(PWM_MODE_A::PULSE)
113 }
114}
115#[doc = "Field `pwm_pul_start` reader - PWM Pulse Output Start"]
116pub type PWM_PUL_START_R = crate::BitReader<PWM_PUL_START_A>;
117#[doc = "PWM Pulse Output Start\n\nValue on reset: 0"]
118#[derive(Clone, Copy, Debug, PartialEq, Eq)]
119pub enum PWM_PUL_START_A {
120 #[doc = "0: `0`"]
121 NO_EFFECT = 0,
122 #[doc = "1: Output pulse for PWM_CYCLE_NM + 1"]
123 START = 1,
124}
125impl From<PWM_PUL_START_A> for bool {
126 #[inline(always)]
127 fn from(variant: PWM_PUL_START_A) -> Self {
128 variant as u8 != 0
129 }
130}
131impl PWM_PUL_START_R {
132 #[doc = "Get enumerated values variant"]
133 #[inline(always)]
134 pub const fn variant(&self) -> PWM_PUL_START_A {
135 match self.bits {
136 false => PWM_PUL_START_A::NO_EFFECT,
137 true => PWM_PUL_START_A::START,
138 }
139 }
140 #[doc = "`0`"]
141 #[inline(always)]
142 pub fn is_no_effect(&self) -> bool {
143 *self == PWM_PUL_START_A::NO_EFFECT
144 }
145 #[doc = "Output pulse for PWM_CYCLE_NM + 1"]
146 #[inline(always)]
147 pub fn is_start(&self) -> bool {
148 *self == PWM_PUL_START_A::START
149 }
150}
151#[doc = "Field `pwm_pul_start` writer - PWM Pulse Output Start"]
152pub type PWM_PUL_START_W<'a, REG> = crate::BitWriter<'a, REG, PWM_PUL_START_A>;
153impl<'a, REG> PWM_PUL_START_W<'a, REG>
154where
155 REG: crate::Writable + crate::RegisterSpec,
156{
157 #[doc = "`0`"]
158 #[inline(always)]
159 pub fn no_effect(self) -> &'a mut crate::W<REG> {
160 self.variant(PWM_PUL_START_A::NO_EFFECT)
161 }
162 #[doc = "Output pulse for PWM_CYCLE_NM + 1"]
163 #[inline(always)]
164 pub fn start(self) -> &'a mut crate::W<REG> {
165 self.variant(PWM_PUL_START_A::START)
166 }
167}
168#[doc = "Field `pwm_period_rdy` reader - PWM Period Register Ready"]
169pub type PWM_PERIOD_RDY_R = crate::BitReader<PWM_PERIOD_RDY_A>;
170#[doc = "PWM Period Register Ready\n\nValue on reset: 0"]
171#[derive(Clone, Copy, Debug, PartialEq, Eq)]
172pub enum PWM_PERIOD_RDY_A {
173 #[doc = "0: PWM period register is ready to write"]
174 READY = 0,
175 #[doc = "1: PWM period register is busy"]
176 BUSY = 1,
177}
178impl From<PWM_PERIOD_RDY_A> for bool {
179 #[inline(always)]
180 fn from(variant: PWM_PERIOD_RDY_A) -> Self {
181 variant as u8 != 0
182 }
183}
184impl PWM_PERIOD_RDY_R {
185 #[doc = "Get enumerated values variant"]
186 #[inline(always)]
187 pub const fn variant(&self) -> PWM_PERIOD_RDY_A {
188 match self.bits {
189 false => PWM_PERIOD_RDY_A::READY,
190 true => PWM_PERIOD_RDY_A::BUSY,
191 }
192 }
193 #[doc = "PWM period register is ready to write"]
194 #[inline(always)]
195 pub fn is_ready(&self) -> bool {
196 *self == PWM_PERIOD_RDY_A::READY
197 }
198 #[doc = "PWM period register is busy"]
199 #[inline(always)]
200 pub fn is_busy(&self) -> bool {
201 *self == PWM_PERIOD_RDY_A::BUSY
202 }
203}
204#[doc = "Field `pwm_pul_num` reader - In pulse mode, the PWM outputs pulse for PWM_CYCLE_NUM + 1 times and then stops"]
205pub type PWM_PUL_NUM_R = crate::FieldReader<u16>;
206#[doc = "Field `pwm_pul_num` writer - In pulse mode, the PWM outputs pulse for PWM_CYCLE_NUM + 1 times and then stops"]
207pub type PWM_PUL_NUM_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>;
208impl R {
209 #[doc = "Bits 0:7 - PWM pre-scale K, actual pre-scale is (K + 1)"]
210 #[inline(always)]
211 pub fn pwm_prescal_k(&self) -> PWM_PRESCAL_K_R {
212 PWM_PRESCAL_K_R::new((self.bits & 0xff) as u8)
213 }
214 #[doc = "Bit 8 - PWM Active State"]
215 #[inline(always)]
216 pub fn pwm_act_sta(&self) -> PWM_ACT_STA_R {
217 PWM_ACT_STA_R::new(((self.bits >> 8) & 1) != 0)
218 }
219 #[doc = "Bit 9 - PWM Output Mode Select"]
220 #[inline(always)]
221 pub fn pwm_mode(&self) -> PWM_MODE_R {
222 PWM_MODE_R::new(((self.bits >> 9) & 1) != 0)
223 }
224 #[doc = "Bit 10 - PWM Pulse Output Start"]
225 #[inline(always)]
226 pub fn pwm_pul_start(&self) -> PWM_PUL_START_R {
227 PWM_PUL_START_R::new(((self.bits >> 10) & 1) != 0)
228 }
229 #[doc = "Bit 11 - PWM Period Register Ready"]
230 #[inline(always)]
231 pub fn pwm_period_rdy(&self) -> PWM_PERIOD_RDY_R {
232 PWM_PERIOD_RDY_R::new(((self.bits >> 11) & 1) != 0)
233 }
234 #[doc = "Bits 16:31 - In pulse mode, the PWM outputs pulse for PWM_CYCLE_NUM + 1 times and then stops"]
235 #[inline(always)]
236 pub fn pwm_pul_num(&self) -> PWM_PUL_NUM_R {
237 PWM_PUL_NUM_R::new(((self.bits >> 16) & 0xffff) as u16)
238 }
239}
240impl W {
241 #[doc = "Bits 0:7 - PWM pre-scale K, actual pre-scale is (K + 1)"]
242 #[inline(always)]
243 #[must_use]
244 pub fn pwm_prescal_k(&mut self) -> PWM_PRESCAL_K_W<PCR_SPEC> {
245 PWM_PRESCAL_K_W::new(self, 0)
246 }
247 #[doc = "Bit 8 - PWM Active State"]
248 #[inline(always)]
249 #[must_use]
250 pub fn pwm_act_sta(&mut self) -> PWM_ACT_STA_W<PCR_SPEC> {
251 PWM_ACT_STA_W::new(self, 8)
252 }
253 #[doc = "Bit 9 - PWM Output Mode Select"]
254 #[inline(always)]
255 #[must_use]
256 pub fn pwm_mode(&mut self) -> PWM_MODE_W<PCR_SPEC> {
257 PWM_MODE_W::new(self, 9)
258 }
259 #[doc = "Bit 10 - PWM Pulse Output Start"]
260 #[inline(always)]
261 #[must_use]
262 pub fn pwm_pul_start(&mut self) -> PWM_PUL_START_W<PCR_SPEC> {
263 PWM_PUL_START_W::new(self, 10)
264 }
265 #[doc = "Bits 16:31 - In pulse mode, the PWM outputs pulse for PWM_CYCLE_NUM + 1 times and then stops"]
266 #[inline(always)]
267 #[must_use]
268 pub fn pwm_pul_num(&mut self) -> PWM_PUL_NUM_W<PCR_SPEC> {
269 PWM_PUL_NUM_W::new(self, 16)
270 }
271 #[doc = r" Writes raw bits to the register."]
272 #[doc = r""]
273 #[doc = r" # Safety"]
274 #[doc = r""]
275 #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
276 #[inline(always)]
277 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
278 self.bits = bits;
279 self
280 }
281}
282#[doc = "PWM Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
283pub struct PCR_SPEC;
284impl crate::RegisterSpec for PCR_SPEC {
285 type Ux = u32;
286}
287#[doc = "`read()` method returns [`pcr::R`](R) reader structure"]
288impl crate::Readable for PCR_SPEC {}
289#[doc = "`write(|w| ..)` method takes [`pcr::W`](W) writer structure"]
290impl crate::Writable for PCR_SPEC {
291 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
292 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
293}
294#[doc = "`reset()` method sets pcr%s to value 0"]
295impl crate::Resettable for PCR_SPEC {
296 const RESET_VALUE: Self::Ux = 0;
297}