d1_pac/lradc/
lradc_ctrl.rs

1#[doc = "Register `lradc_ctrl` reader"]
2pub type R = crate::R<LRADC_CTRL_SPEC>;
3#[doc = "Register `lradc_ctrl` writer"]
4pub type W = crate::W<LRADC_CTRL_SPEC>;
5#[doc = "Field `lradc_en` reader - LRADC Enable"]
6pub type LRADC_EN_R = crate::BitReader<LRADC_EN_A>;
7#[doc = "LRADC Enable\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum LRADC_EN_A {
10    #[doc = "0: `0`"]
11    DISABLE = 0,
12    #[doc = "1: `1`"]
13    ENABLE = 1,
14}
15impl From<LRADC_EN_A> for bool {
16    #[inline(always)]
17    fn from(variant: LRADC_EN_A) -> Self {
18        variant as u8 != 0
19    }
20}
21impl LRADC_EN_R {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> LRADC_EN_A {
25        match self.bits {
26            false => LRADC_EN_A::DISABLE,
27            true => LRADC_EN_A::ENABLE,
28        }
29    }
30    #[doc = "`0`"]
31    #[inline(always)]
32    pub fn is_disable(&self) -> bool {
33        *self == LRADC_EN_A::DISABLE
34    }
35    #[doc = "`1`"]
36    #[inline(always)]
37    pub fn is_enable(&self) -> bool {
38        *self == LRADC_EN_A::ENABLE
39    }
40}
41#[doc = "Field `lradc_en` writer - LRADC Enable"]
42pub type LRADC_EN_W<'a, REG> = crate::BitWriter<'a, REG, LRADC_EN_A>;
43impl<'a, REG> LRADC_EN_W<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    #[doc = "`0`"]
48    #[inline(always)]
49    pub fn disable(self) -> &'a mut crate::W<REG> {
50        self.variant(LRADC_EN_A::DISABLE)
51    }
52    #[doc = "`1`"]
53    #[inline(always)]
54    pub fn enable(self) -> &'a mut crate::W<REG> {
55        self.variant(LRADC_EN_A::ENABLE)
56    }
57}
58#[doc = "Field `lradc_sample_rate` reader - LRADC Sample Rate"]
59pub type LRADC_SAMPLE_RATE_R = crate::FieldReader<LRADC_SAMPLE_RATE_A>;
60#[doc = "LRADC Sample Rate\n\nValue on reset: 0"]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62#[repr(u8)]
63pub enum LRADC_SAMPLE_RATE_A {
64    #[doc = "0: 2kHz"]
65    R2K = 0,
66    #[doc = "1: 1kHz"]
67    R1K = 1,
68    #[doc = "2: 500Hz"]
69    R500 = 2,
70    #[doc = "3: 250Hz"]
71    R250 = 3,
72}
73impl From<LRADC_SAMPLE_RATE_A> for u8 {
74    #[inline(always)]
75    fn from(variant: LRADC_SAMPLE_RATE_A) -> Self {
76        variant as _
77    }
78}
79impl crate::FieldSpec for LRADC_SAMPLE_RATE_A {
80    type Ux = u8;
81}
82impl LRADC_SAMPLE_RATE_R {
83    #[doc = "Get enumerated values variant"]
84    #[inline(always)]
85    pub const fn variant(&self) -> LRADC_SAMPLE_RATE_A {
86        match self.bits {
87            0 => LRADC_SAMPLE_RATE_A::R2K,
88            1 => LRADC_SAMPLE_RATE_A::R1K,
89            2 => LRADC_SAMPLE_RATE_A::R500,
90            3 => LRADC_SAMPLE_RATE_A::R250,
91            _ => unreachable!(),
92        }
93    }
94    #[doc = "2kHz"]
95    #[inline(always)]
96    pub fn is_r2k(&self) -> bool {
97        *self == LRADC_SAMPLE_RATE_A::R2K
98    }
99    #[doc = "1kHz"]
100    #[inline(always)]
101    pub fn is_r1k(&self) -> bool {
102        *self == LRADC_SAMPLE_RATE_A::R1K
103    }
104    #[doc = "500Hz"]
105    #[inline(always)]
106    pub fn is_r500(&self) -> bool {
107        *self == LRADC_SAMPLE_RATE_A::R500
108    }
109    #[doc = "250Hz"]
110    #[inline(always)]
111    pub fn is_r250(&self) -> bool {
112        *self == LRADC_SAMPLE_RATE_A::R250
113    }
114}
115#[doc = "Field `lradc_sample_rate` writer - LRADC Sample Rate"]
116pub type LRADC_SAMPLE_RATE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, LRADC_SAMPLE_RATE_A>;
117impl<'a, REG> LRADC_SAMPLE_RATE_W<'a, REG>
118where
119    REG: crate::Writable + crate::RegisterSpec,
120    REG::Ux: From<u8>,
121{
122    #[doc = "2kHz"]
123    #[inline(always)]
124    pub fn r2k(self) -> &'a mut crate::W<REG> {
125        self.variant(LRADC_SAMPLE_RATE_A::R2K)
126    }
127    #[doc = "1kHz"]
128    #[inline(always)]
129    pub fn r1k(self) -> &'a mut crate::W<REG> {
130        self.variant(LRADC_SAMPLE_RATE_A::R1K)
131    }
132    #[doc = "500Hz"]
133    #[inline(always)]
134    pub fn r500(self) -> &'a mut crate::W<REG> {
135        self.variant(LRADC_SAMPLE_RATE_A::R500)
136    }
137    #[doc = "250Hz"]
138    #[inline(always)]
139    pub fn r250(self) -> &'a mut crate::W<REG> {
140        self.variant(LRADC_SAMPLE_RATE_A::R250)
141    }
142}
143#[doc = "Field `levelb_vol` reader - Level B Corresponding Data Value Setting (the real voltage value)"]
144pub type LEVELB_VOL_R = crate::FieldReader<LEVELB_VOL_A>;
145#[doc = "Level B Corresponding Data Value Setting (the real voltage value)\n\nValue on reset: 0"]
146#[derive(Clone, Copy, Debug, PartialEq, Eq)]
147#[repr(u8)]
148pub enum LEVELB_VOL_A {
149    #[doc = "1: 1.221 V"]
150    V39 = 1,
151    #[doc = "2: 1.157 V"]
152    V36 = 2,
153    #[doc = "3: 1.093 V"]
154    V33 = 3,
155}
156impl From<LEVELB_VOL_A> for u8 {
157    #[inline(always)]
158    fn from(variant: LEVELB_VOL_A) -> Self {
159        variant as _
160    }
161}
162impl crate::FieldSpec for LEVELB_VOL_A {
163    type Ux = u8;
164}
165impl LEVELB_VOL_R {
166    #[doc = "Get enumerated values variant"]
167    #[inline(always)]
168    pub const fn variant(&self) -> Option<LEVELB_VOL_A> {
169        match self.bits {
170            1 => Some(LEVELB_VOL_A::V39),
171            2 => Some(LEVELB_VOL_A::V36),
172            3 => Some(LEVELB_VOL_A::V33),
173            _ => None,
174        }
175    }
176    #[doc = "1.221 V"]
177    #[inline(always)]
178    pub fn is_v39(&self) -> bool {
179        *self == LEVELB_VOL_A::V39
180    }
181    #[doc = "1.157 V"]
182    #[inline(always)]
183    pub fn is_v36(&self) -> bool {
184        *self == LEVELB_VOL_A::V36
185    }
186    #[doc = "1.093 V"]
187    #[inline(always)]
188    pub fn is_v33(&self) -> bool {
189        *self == LEVELB_VOL_A::V33
190    }
191}
192#[doc = "Field `levelb_vol` writer - Level B Corresponding Data Value Setting (the real voltage value)"]
193pub type LEVELB_VOL_W<'a, REG> = crate::FieldWriter<'a, REG, 2, LEVELB_VOL_A>;
194impl<'a, REG> LEVELB_VOL_W<'a, REG>
195where
196    REG: crate::Writable + crate::RegisterSpec,
197    REG::Ux: From<u8>,
198{
199    #[doc = "1.221 V"]
200    #[inline(always)]
201    pub fn v39(self) -> &'a mut crate::W<REG> {
202        self.variant(LEVELB_VOL_A::V39)
203    }
204    #[doc = "1.157 V"]
205    #[inline(always)]
206    pub fn v36(self) -> &'a mut crate::W<REG> {
207        self.variant(LEVELB_VOL_A::V36)
208    }
209    #[doc = "1.093 V"]
210    #[inline(always)]
211    pub fn v33(self) -> &'a mut crate::W<REG> {
212        self.variant(LEVELB_VOL_A::V33)
213    }
214}
215#[doc = "Field `lradc_channel_en` reader - LRADC Channel Enable"]
216pub type LRADC_CHANNEL_EN_R = crate::BitReader<LRADC_CHANNEL_EN_A>;
217#[doc = "LRADC Channel Enable\n\nValue on reset: 0"]
218#[derive(Clone, Copy, Debug, PartialEq, Eq)]
219pub enum LRADC_CHANNEL_EN_A {
220    #[doc = "0: `0`"]
221    DISABLE = 0,
222    #[doc = "1: `1`"]
223    ENABLE = 1,
224}
225impl From<LRADC_CHANNEL_EN_A> for bool {
226    #[inline(always)]
227    fn from(variant: LRADC_CHANNEL_EN_A) -> Self {
228        variant as u8 != 0
229    }
230}
231impl LRADC_CHANNEL_EN_R {
232    #[doc = "Get enumerated values variant"]
233    #[inline(always)]
234    pub const fn variant(&self) -> LRADC_CHANNEL_EN_A {
235        match self.bits {
236            false => LRADC_CHANNEL_EN_A::DISABLE,
237            true => LRADC_CHANNEL_EN_A::ENABLE,
238        }
239    }
240    #[doc = "`0`"]
241    #[inline(always)]
242    pub fn is_disable(&self) -> bool {
243        *self == LRADC_CHANNEL_EN_A::DISABLE
244    }
245    #[doc = "`1`"]
246    #[inline(always)]
247    pub fn is_enable(&self) -> bool {
248        *self == LRADC_CHANNEL_EN_A::ENABLE
249    }
250}
251#[doc = "Field `lradc_channel_en` writer - LRADC Channel Enable"]
252pub type LRADC_CHANNEL_EN_W<'a, REG> = crate::BitWriter<'a, REG, LRADC_CHANNEL_EN_A>;
253impl<'a, REG> LRADC_CHANNEL_EN_W<'a, REG>
254where
255    REG: crate::Writable + crate::RegisterSpec,
256{
257    #[doc = "`0`"]
258    #[inline(always)]
259    pub fn disable(self) -> &'a mut crate::W<REG> {
260        self.variant(LRADC_CHANNEL_EN_A::DISABLE)
261    }
262    #[doc = "`1`"]
263    #[inline(always)]
264    pub fn enable(self) -> &'a mut crate::W<REG> {
265        self.variant(LRADC_CHANNEL_EN_A::ENABLE)
266    }
267}
268#[doc = "Field `lradc_hold_key_en` reader - LRADC Hold Key Enable"]
269pub type LRADC_HOLD_KEY_EN_R = crate::BitReader<LRADC_HOLD_KEY_EN_A>;
270#[doc = "LRADC Hold Key Enable\n\nValue on reset: 0"]
271#[derive(Clone, Copy, Debug, PartialEq, Eq)]
272pub enum LRADC_HOLD_KEY_EN_A {
273    #[doc = "0: `0`"]
274    DISABLE = 0,
275    #[doc = "1: `1`"]
276    ENABLE = 1,
277}
278impl From<LRADC_HOLD_KEY_EN_A> for bool {
279    #[inline(always)]
280    fn from(variant: LRADC_HOLD_KEY_EN_A) -> Self {
281        variant as u8 != 0
282    }
283}
284impl LRADC_HOLD_KEY_EN_R {
285    #[doc = "Get enumerated values variant"]
286    #[inline(always)]
287    pub const fn variant(&self) -> LRADC_HOLD_KEY_EN_A {
288        match self.bits {
289            false => LRADC_HOLD_KEY_EN_A::DISABLE,
290            true => LRADC_HOLD_KEY_EN_A::ENABLE,
291        }
292    }
293    #[doc = "`0`"]
294    #[inline(always)]
295    pub fn is_disable(&self) -> bool {
296        *self == LRADC_HOLD_KEY_EN_A::DISABLE
297    }
298    #[doc = "`1`"]
299    #[inline(always)]
300    pub fn is_enable(&self) -> bool {
301        *self == LRADC_HOLD_KEY_EN_A::ENABLE
302    }
303}
304#[doc = "Field `lradc_hold_key_en` writer - LRADC Hold Key Enable"]
305pub type LRADC_HOLD_KEY_EN_W<'a, REG> = crate::BitWriter<'a, REG, LRADC_HOLD_KEY_EN_A>;
306impl<'a, REG> LRADC_HOLD_KEY_EN_W<'a, REG>
307where
308    REG: crate::Writable + crate::RegisterSpec,
309{
310    #[doc = "`0`"]
311    #[inline(always)]
312    pub fn disable(self) -> &'a mut crate::W<REG> {
313        self.variant(LRADC_HOLD_KEY_EN_A::DISABLE)
314    }
315    #[doc = "`1`"]
316    #[inline(always)]
317    pub fn enable(self) -> &'a mut crate::W<REG> {
318        self.variant(LRADC_HOLD_KEY_EN_A::ENABLE)
319    }
320}
321#[doc = "Field `levela_b_cnt` reader - Level A to B time threshold select"]
322pub type LEVELA_B_CNT_R = crate::FieldReader;
323#[doc = "Field `levela_b_cnt` writer - Level A to B time threshold select"]
324pub type LEVELA_B_CNT_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
325#[doc = "Field `key_mode_select` reader - Key Mode Select"]
326pub type KEY_MODE_SELECT_R = crate::FieldReader<KEY_MODE_SELECT_A>;
327#[doc = "Key Mode Select\n\nValue on reset: 0"]
328#[derive(Clone, Copy, Debug, PartialEq, Eq)]
329#[repr(u8)]
330pub enum KEY_MODE_SELECT_A {
331    #[doc = "0: `0`"]
332    NORMAL = 0,
333    #[doc = "1: `1`"]
334    SINGLE = 1,
335    #[doc = "2: `10`"]
336    CONTINUOUS = 2,
337}
338impl From<KEY_MODE_SELECT_A> for u8 {
339    #[inline(always)]
340    fn from(variant: KEY_MODE_SELECT_A) -> Self {
341        variant as _
342    }
343}
344impl crate::FieldSpec for KEY_MODE_SELECT_A {
345    type Ux = u8;
346}
347impl KEY_MODE_SELECT_R {
348    #[doc = "Get enumerated values variant"]
349    #[inline(always)]
350    pub const fn variant(&self) -> Option<KEY_MODE_SELECT_A> {
351        match self.bits {
352            0 => Some(KEY_MODE_SELECT_A::NORMAL),
353            1 => Some(KEY_MODE_SELECT_A::SINGLE),
354            2 => Some(KEY_MODE_SELECT_A::CONTINUOUS),
355            _ => None,
356        }
357    }
358    #[doc = "`0`"]
359    #[inline(always)]
360    pub fn is_normal(&self) -> bool {
361        *self == KEY_MODE_SELECT_A::NORMAL
362    }
363    #[doc = "`1`"]
364    #[inline(always)]
365    pub fn is_single(&self) -> bool {
366        *self == KEY_MODE_SELECT_A::SINGLE
367    }
368    #[doc = "`10`"]
369    #[inline(always)]
370    pub fn is_continuous(&self) -> bool {
371        *self == KEY_MODE_SELECT_A::CONTINUOUS
372    }
373}
374#[doc = "Field `key_mode_select` writer - Key Mode Select"]
375pub type KEY_MODE_SELECT_W<'a, REG> = crate::FieldWriter<'a, REG, 2, KEY_MODE_SELECT_A>;
376impl<'a, REG> KEY_MODE_SELECT_W<'a, REG>
377where
378    REG: crate::Writable + crate::RegisterSpec,
379    REG::Ux: From<u8>,
380{
381    #[doc = "`0`"]
382    #[inline(always)]
383    pub fn normal(self) -> &'a mut crate::W<REG> {
384        self.variant(KEY_MODE_SELECT_A::NORMAL)
385    }
386    #[doc = "`1`"]
387    #[inline(always)]
388    pub fn single(self) -> &'a mut crate::W<REG> {
389        self.variant(KEY_MODE_SELECT_A::SINGLE)
390    }
391    #[doc = "`10`"]
392    #[inline(always)]
393    pub fn continuous(self) -> &'a mut crate::W<REG> {
394        self.variant(KEY_MODE_SELECT_A::CONTINUOUS)
395    }
396}
397#[doc = "Field `continue_time_select` reader - Continuous Mode Time Select"]
398pub type CONTINUE_TIME_SELECT_R = crate::FieldReader;
399#[doc = "Field `continue_time_select` writer - Continuous Mode Time Select"]
400pub type CONTINUE_TIME_SELECT_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
401#[doc = "Field `first_convert_dly` reader - ADC First Convert Delay Setting"]
402pub type FIRST_CONVERT_DLY_R = crate::FieldReader;
403#[doc = "Field `first_convert_dly` writer - ADC First Convert Delay Setting"]
404pub type FIRST_CONVERT_DLY_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
405impl R {
406    #[doc = "Bit 0 - LRADC Enable"]
407    #[inline(always)]
408    pub fn lradc_en(&self) -> LRADC_EN_R {
409        LRADC_EN_R::new((self.bits & 1) != 0)
410    }
411    #[doc = "Bits 2:3 - LRADC Sample Rate"]
412    #[inline(always)]
413    pub fn lradc_sample_rate(&self) -> LRADC_SAMPLE_RATE_R {
414        LRADC_SAMPLE_RATE_R::new(((self.bits >> 2) & 3) as u8)
415    }
416    #[doc = "Bits 4:5 - Level B Corresponding Data Value Setting (the real voltage value)"]
417    #[inline(always)]
418    pub fn levelb_vol(&self) -> LEVELB_VOL_R {
419        LEVELB_VOL_R::new(((self.bits >> 4) & 3) as u8)
420    }
421    #[doc = "Bit 6 - LRADC Channel Enable"]
422    #[inline(always)]
423    pub fn lradc_channel_en(&self) -> LRADC_CHANNEL_EN_R {
424        LRADC_CHANNEL_EN_R::new(((self.bits >> 6) & 1) != 0)
425    }
426    #[doc = "Bit 7 - LRADC Hold Key Enable"]
427    #[inline(always)]
428    pub fn lradc_hold_key_en(&self) -> LRADC_HOLD_KEY_EN_R {
429        LRADC_HOLD_KEY_EN_R::new(((self.bits >> 7) & 1) != 0)
430    }
431    #[doc = "Bits 8:11 - Level A to B time threshold select"]
432    #[inline(always)]
433    pub fn levela_b_cnt(&self) -> LEVELA_B_CNT_R {
434        LEVELA_B_CNT_R::new(((self.bits >> 8) & 0x0f) as u8)
435    }
436    #[doc = "Bits 12:13 - Key Mode Select"]
437    #[inline(always)]
438    pub fn key_mode_select(&self) -> KEY_MODE_SELECT_R {
439        KEY_MODE_SELECT_R::new(((self.bits >> 12) & 3) as u8)
440    }
441    #[doc = "Bits 16:19 - Continuous Mode Time Select"]
442    #[inline(always)]
443    pub fn continue_time_select(&self) -> CONTINUE_TIME_SELECT_R {
444        CONTINUE_TIME_SELECT_R::new(((self.bits >> 16) & 0x0f) as u8)
445    }
446    #[doc = "Bits 24:31 - ADC First Convert Delay Setting"]
447    #[inline(always)]
448    pub fn first_convert_dly(&self) -> FIRST_CONVERT_DLY_R {
449        FIRST_CONVERT_DLY_R::new(((self.bits >> 24) & 0xff) as u8)
450    }
451}
452impl W {
453    #[doc = "Bit 0 - LRADC Enable"]
454    #[inline(always)]
455    #[must_use]
456    pub fn lradc_en(&mut self) -> LRADC_EN_W<LRADC_CTRL_SPEC> {
457        LRADC_EN_W::new(self, 0)
458    }
459    #[doc = "Bits 2:3 - LRADC Sample Rate"]
460    #[inline(always)]
461    #[must_use]
462    pub fn lradc_sample_rate(&mut self) -> LRADC_SAMPLE_RATE_W<LRADC_CTRL_SPEC> {
463        LRADC_SAMPLE_RATE_W::new(self, 2)
464    }
465    #[doc = "Bits 4:5 - Level B Corresponding Data Value Setting (the real voltage value)"]
466    #[inline(always)]
467    #[must_use]
468    pub fn levelb_vol(&mut self) -> LEVELB_VOL_W<LRADC_CTRL_SPEC> {
469        LEVELB_VOL_W::new(self, 4)
470    }
471    #[doc = "Bit 6 - LRADC Channel Enable"]
472    #[inline(always)]
473    #[must_use]
474    pub fn lradc_channel_en(&mut self) -> LRADC_CHANNEL_EN_W<LRADC_CTRL_SPEC> {
475        LRADC_CHANNEL_EN_W::new(self, 6)
476    }
477    #[doc = "Bit 7 - LRADC Hold Key Enable"]
478    #[inline(always)]
479    #[must_use]
480    pub fn lradc_hold_key_en(&mut self) -> LRADC_HOLD_KEY_EN_W<LRADC_CTRL_SPEC> {
481        LRADC_HOLD_KEY_EN_W::new(self, 7)
482    }
483    #[doc = "Bits 8:11 - Level A to B time threshold select"]
484    #[inline(always)]
485    #[must_use]
486    pub fn levela_b_cnt(&mut self) -> LEVELA_B_CNT_W<LRADC_CTRL_SPEC> {
487        LEVELA_B_CNT_W::new(self, 8)
488    }
489    #[doc = "Bits 12:13 - Key Mode Select"]
490    #[inline(always)]
491    #[must_use]
492    pub fn key_mode_select(&mut self) -> KEY_MODE_SELECT_W<LRADC_CTRL_SPEC> {
493        KEY_MODE_SELECT_W::new(self, 12)
494    }
495    #[doc = "Bits 16:19 - Continuous Mode Time Select"]
496    #[inline(always)]
497    #[must_use]
498    pub fn continue_time_select(&mut self) -> CONTINUE_TIME_SELECT_W<LRADC_CTRL_SPEC> {
499        CONTINUE_TIME_SELECT_W::new(self, 16)
500    }
501    #[doc = "Bits 24:31 - ADC First Convert Delay Setting"]
502    #[inline(always)]
503    #[must_use]
504    pub fn first_convert_dly(&mut self) -> FIRST_CONVERT_DLY_W<LRADC_CTRL_SPEC> {
505        FIRST_CONVERT_DLY_W::new(self, 24)
506    }
507    #[doc = r" Writes raw bits to the register."]
508    #[doc = r""]
509    #[doc = r" # Safety"]
510    #[doc = r""]
511    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
512    #[inline(always)]
513    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
514        self.bits = bits;
515        self
516    }
517}
518#[doc = "LRADC Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lradc_ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lradc_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
519pub struct LRADC_CTRL_SPEC;
520impl crate::RegisterSpec for LRADC_CTRL_SPEC {
521    type Ux = u32;
522}
523#[doc = "`read()` method returns [`lradc_ctrl::R`](R) reader structure"]
524impl crate::Readable for LRADC_CTRL_SPEC {}
525#[doc = "`write(|w| ..)` method takes [`lradc_ctrl::W`](W) writer structure"]
526impl crate::Writable for LRADC_CTRL_SPEC {
527    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
528    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
529}
530#[doc = "`reset()` method sets lradc_ctrl to value 0"]
531impl crate::Resettable for LRADC_CTRL_SPEC {
532    const RESET_VALUE: Self::Ux = 0;
533}
d1_pac/lradc/lradc_ctrl.rs

d1_pac/lradc/
lradc_ctrl.rs
