d1_pac/iommu/
iommu_dm_aut_ovwt.rs1#[doc = "Register `iommu_dm_aut_ovwt` reader"]
2pub type R = crate::R<IOMMU_DM_AUT_OVWT_SPEC>;
3#[doc = "Register `iommu_dm_aut_ovwt` writer"]
4pub type W = crate::W<IOMMU_DM_AUT_OVWT_SPEC>;
5#[doc = "Field `m_rd_aut_ovwt_ctrl[0-6]` reader - Master\\[i\\] read permission overwrite control"]
6pub type M_RD_AUT_OVWT_CTRL_R = crate::BitReader<M_RD_AUT_OVWT_CTRL_A>;
7#[doc = "Master\\[i\\] read permission overwrite control\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum M_RD_AUT_OVWT_CTRL_A {
10 #[doc = "0: The read-operation is permitted"]
11 PERMITTED = 0,
12 #[doc = "1: The read-operation is prohibited"]
13 PROHIBITED = 1,
14}
15impl From<M_RD_AUT_OVWT_CTRL_A> for bool {
16 #[inline(always)]
17 fn from(variant: M_RD_AUT_OVWT_CTRL_A) -> Self {
18 variant as u8 != 0
19 }
20}
21impl M_RD_AUT_OVWT_CTRL_R {
22 #[doc = "Get enumerated values variant"]
23 #[inline(always)]
24 pub const fn variant(&self) -> M_RD_AUT_OVWT_CTRL_A {
25 match self.bits {
26 false => M_RD_AUT_OVWT_CTRL_A::PERMITTED,
27 true => M_RD_AUT_OVWT_CTRL_A::PROHIBITED,
28 }
29 }
30 #[doc = "The read-operation is permitted"]
31 #[inline(always)]
32 pub fn is_permitted(&self) -> bool {
33 *self == M_RD_AUT_OVWT_CTRL_A::PERMITTED
34 }
35 #[doc = "The read-operation is prohibited"]
36 #[inline(always)]
37 pub fn is_prohibited(&self) -> bool {
38 *self == M_RD_AUT_OVWT_CTRL_A::PROHIBITED
39 }
40}
41#[doc = "Field `m_rd_aut_ovwt_ctrl[0-6]` writer - Master\\[i\\] read permission overwrite control"]
42pub type M_RD_AUT_OVWT_CTRL_W<'a, REG> = crate::BitWriter<'a, REG, M_RD_AUT_OVWT_CTRL_A>;
43impl<'a, REG> M_RD_AUT_OVWT_CTRL_W<'a, REG>
44where
45 REG: crate::Writable + crate::RegisterSpec,
46{
47 #[doc = "The read-operation is permitted"]
48 #[inline(always)]
49 pub fn permitted(self) -> &'a mut crate::W<REG> {
50 self.variant(M_RD_AUT_OVWT_CTRL_A::PERMITTED)
51 }
52 #[doc = "The read-operation is prohibited"]
53 #[inline(always)]
54 pub fn prohibited(self) -> &'a mut crate::W<REG> {
55 self.variant(M_RD_AUT_OVWT_CTRL_A::PROHIBITED)
56 }
57}
58#[doc = "Field `m_wt_aut_ovwt_ctrl[0-6]` reader - Master\\[i\\] write permission overwrite control"]
59pub type M_WT_AUT_OVWT_CTRL_R = crate::BitReader<M_WT_AUT_OVWT_CTRL_A>;
60#[doc = "Master\\[i\\] write permission overwrite control\n\nValue on reset: 0"]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum M_WT_AUT_OVWT_CTRL_A {
63 #[doc = "0: The write-operation is permitted"]
64 PERMITTED = 0,
65 #[doc = "1: The write-operation is prohibited"]
66 PROHIBITED = 1,
67}
68impl From<M_WT_AUT_OVWT_CTRL_A> for bool {
69 #[inline(always)]
70 fn from(variant: M_WT_AUT_OVWT_CTRL_A) -> Self {
71 variant as u8 != 0
72 }
73}
74impl M_WT_AUT_OVWT_CTRL_R {
75 #[doc = "Get enumerated values variant"]
76 #[inline(always)]
77 pub const fn variant(&self) -> M_WT_AUT_OVWT_CTRL_A {
78 match self.bits {
79 false => M_WT_AUT_OVWT_CTRL_A::PERMITTED,
80 true => M_WT_AUT_OVWT_CTRL_A::PROHIBITED,
81 }
82 }
83 #[doc = "The write-operation is permitted"]
84 #[inline(always)]
85 pub fn is_permitted(&self) -> bool {
86 *self == M_WT_AUT_OVWT_CTRL_A::PERMITTED
87 }
88 #[doc = "The write-operation is prohibited"]
89 #[inline(always)]
90 pub fn is_prohibited(&self) -> bool {
91 *self == M_WT_AUT_OVWT_CTRL_A::PROHIBITED
92 }
93}
94#[doc = "Field `m_wt_aut_ovwt_ctrl[0-6]` writer - Master\\[i\\] write permission overwrite control"]
95pub type M_WT_AUT_OVWT_CTRL_W<'a, REG> = crate::BitWriter<'a, REG, M_WT_AUT_OVWT_CTRL_A>;
96impl<'a, REG> M_WT_AUT_OVWT_CTRL_W<'a, REG>
97where
98 REG: crate::Writable + crate::RegisterSpec,
99{
100 #[doc = "The write-operation is permitted"]
101 #[inline(always)]
102 pub fn permitted(self) -> &'a mut crate::W<REG> {
103 self.variant(M_WT_AUT_OVWT_CTRL_A::PERMITTED)
104 }
105 #[doc = "The write-operation is prohibited"]
106 #[inline(always)]
107 pub fn prohibited(self) -> &'a mut crate::W<REG> {
108 self.variant(M_WT_AUT_OVWT_CTRL_A::PROHIBITED)
109 }
110}
111#[doc = "Field `dm_aut_ovwt_enable` reader - Domain write/read permission overwrite enable"]
112pub type DM_AUT_OVWT_ENABLE_R = crate::BitReader<DM_AUT_OVWT_ENABLE_A>;
113#[doc = "Domain write/read permission overwrite enable\n\nValue on reset: 0"]
114#[derive(Clone, Copy, Debug, PartialEq, Eq)]
115pub enum DM_AUT_OVWT_ENABLE_A {
116 #[doc = "0: Disable"]
117 DISABLE = 0,
118 #[doc = "1: Enable"]
119 ENABLE = 1,
120}
121impl From<DM_AUT_OVWT_ENABLE_A> for bool {
122 #[inline(always)]
123 fn from(variant: DM_AUT_OVWT_ENABLE_A) -> Self {
124 variant as u8 != 0
125 }
126}
127impl DM_AUT_OVWT_ENABLE_R {
128 #[doc = "Get enumerated values variant"]
129 #[inline(always)]
130 pub const fn variant(&self) -> DM_AUT_OVWT_ENABLE_A {
131 match self.bits {
132 false => DM_AUT_OVWT_ENABLE_A::DISABLE,
133 true => DM_AUT_OVWT_ENABLE_A::ENABLE,
134 }
135 }
136 #[doc = "Disable"]
137 #[inline(always)]
138 pub fn is_disable(&self) -> bool {
139 *self == DM_AUT_OVWT_ENABLE_A::DISABLE
140 }
141 #[doc = "Enable"]
142 #[inline(always)]
143 pub fn is_enable(&self) -> bool {
144 *self == DM_AUT_OVWT_ENABLE_A::ENABLE
145 }
146}
147#[doc = "Field `dm_aut_ovwt_enable` writer - Domain write/read permission overwrite enable"]
148pub type DM_AUT_OVWT_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG, DM_AUT_OVWT_ENABLE_A>;
149impl<'a, REG> DM_AUT_OVWT_ENABLE_W<'a, REG>
150where
151 REG: crate::Writable + crate::RegisterSpec,
152{
153 #[doc = "Disable"]
154 #[inline(always)]
155 pub fn disable(self) -> &'a mut crate::W<REG> {
156 self.variant(DM_AUT_OVWT_ENABLE_A::DISABLE)
157 }
158 #[doc = "Enable"]
159 #[inline(always)]
160 pub fn enable(self) -> &'a mut crate::W<REG> {
161 self.variant(DM_AUT_OVWT_ENABLE_A::ENABLE)
162 }
163}
164impl R {
165 #[doc = "Master\\[i\\] read permission overwrite control\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `m0_rd_aut_ovwt_ctrl` field"]
166 #[inline(always)]
167 pub fn m_rd_aut_ovwt_ctrl(&self, n: u8) -> M_RD_AUT_OVWT_CTRL_R {
168 #[allow(clippy::no_effect)]
169 [(); 7][n as usize];
170 M_RD_AUT_OVWT_CTRL_R::new(((self.bits >> (n * 2)) & 1) != 0)
171 }
172 #[doc = "Bit 0 - Master\\[i\\] read permission overwrite control"]
173 #[inline(always)]
174 pub fn m0_rd_aut_ovwt_ctrl(&self) -> M_RD_AUT_OVWT_CTRL_R {
175 M_RD_AUT_OVWT_CTRL_R::new((self.bits & 1) != 0)
176 }
177 #[doc = "Bit 2 - Master\\[i\\] read permission overwrite control"]
178 #[inline(always)]
179 pub fn m1_rd_aut_ovwt_ctrl(&self) -> M_RD_AUT_OVWT_CTRL_R {
180 M_RD_AUT_OVWT_CTRL_R::new(((self.bits >> 2) & 1) != 0)
181 }
182 #[doc = "Bit 4 - Master\\[i\\] read permission overwrite control"]
183 #[inline(always)]
184 pub fn m2_rd_aut_ovwt_ctrl(&self) -> M_RD_AUT_OVWT_CTRL_R {
185 M_RD_AUT_OVWT_CTRL_R::new(((self.bits >> 4) & 1) != 0)
186 }
187 #[doc = "Bit 6 - Master\\[i\\] read permission overwrite control"]
188 #[inline(always)]
189 pub fn m3_rd_aut_ovwt_ctrl(&self) -> M_RD_AUT_OVWT_CTRL_R {
190 M_RD_AUT_OVWT_CTRL_R::new(((self.bits >> 6) & 1) != 0)
191 }
192 #[doc = "Bit 8 - Master\\[i\\] read permission overwrite control"]
193 #[inline(always)]
194 pub fn m4_rd_aut_ovwt_ctrl(&self) -> M_RD_AUT_OVWT_CTRL_R {
195 M_RD_AUT_OVWT_CTRL_R::new(((self.bits >> 8) & 1) != 0)
196 }
197 #[doc = "Bit 10 - Master\\[i\\] read permission overwrite control"]
198 #[inline(always)]
199 pub fn m5_rd_aut_ovwt_ctrl(&self) -> M_RD_AUT_OVWT_CTRL_R {
200 M_RD_AUT_OVWT_CTRL_R::new(((self.bits >> 10) & 1) != 0)
201 }
202 #[doc = "Bit 12 - Master\\[i\\] read permission overwrite control"]
203 #[inline(always)]
204 pub fn m6_rd_aut_ovwt_ctrl(&self) -> M_RD_AUT_OVWT_CTRL_R {
205 M_RD_AUT_OVWT_CTRL_R::new(((self.bits >> 12) & 1) != 0)
206 }
207 #[doc = "Master\\[i\\] write permission overwrite control\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `m0_wt_aut_ovwt_ctrl` field"]
208 #[inline(always)]
209 pub fn m_wt_aut_ovwt_ctrl(&self, n: u8) -> M_WT_AUT_OVWT_CTRL_R {
210 #[allow(clippy::no_effect)]
211 [(); 7][n as usize];
212 M_WT_AUT_OVWT_CTRL_R::new(((self.bits >> (n * 2 + 1)) & 1) != 0)
213 }
214 #[doc = "Bit 1 - Master\\[i\\] write permission overwrite control"]
215 #[inline(always)]
216 pub fn m0_wt_aut_ovwt_ctrl(&self) -> M_WT_AUT_OVWT_CTRL_R {
217 M_WT_AUT_OVWT_CTRL_R::new(((self.bits >> 1) & 1) != 0)
218 }
219 #[doc = "Bit 3 - Master\\[i\\] write permission overwrite control"]
220 #[inline(always)]
221 pub fn m1_wt_aut_ovwt_ctrl(&self) -> M_WT_AUT_OVWT_CTRL_R {
222 M_WT_AUT_OVWT_CTRL_R::new(((self.bits >> 3) & 1) != 0)
223 }
224 #[doc = "Bit 5 - Master\\[i\\] write permission overwrite control"]
225 #[inline(always)]
226 pub fn m2_wt_aut_ovwt_ctrl(&self) -> M_WT_AUT_OVWT_CTRL_R {
227 M_WT_AUT_OVWT_CTRL_R::new(((self.bits >> 5) & 1) != 0)
228 }
229 #[doc = "Bit 7 - Master\\[i\\] write permission overwrite control"]
230 #[inline(always)]
231 pub fn m3_wt_aut_ovwt_ctrl(&self) -> M_WT_AUT_OVWT_CTRL_R {
232 M_WT_AUT_OVWT_CTRL_R::new(((self.bits >> 7) & 1) != 0)
233 }
234 #[doc = "Bit 9 - Master\\[i\\] write permission overwrite control"]
235 #[inline(always)]
236 pub fn m4_wt_aut_ovwt_ctrl(&self) -> M_WT_AUT_OVWT_CTRL_R {
237 M_WT_AUT_OVWT_CTRL_R::new(((self.bits >> 9) & 1) != 0)
238 }
239 #[doc = "Bit 11 - Master\\[i\\] write permission overwrite control"]
240 #[inline(always)]
241 pub fn m5_wt_aut_ovwt_ctrl(&self) -> M_WT_AUT_OVWT_CTRL_R {
242 M_WT_AUT_OVWT_CTRL_R::new(((self.bits >> 11) & 1) != 0)
243 }
244 #[doc = "Bit 13 - Master\\[i\\] write permission overwrite control"]
245 #[inline(always)]
246 pub fn m6_wt_aut_ovwt_ctrl(&self) -> M_WT_AUT_OVWT_CTRL_R {
247 M_WT_AUT_OVWT_CTRL_R::new(((self.bits >> 13) & 1) != 0)
248 }
249 #[doc = "Bit 31 - Domain write/read permission overwrite enable"]
250 #[inline(always)]
251 pub fn dm_aut_ovwt_enable(&self) -> DM_AUT_OVWT_ENABLE_R {
252 DM_AUT_OVWT_ENABLE_R::new(((self.bits >> 31) & 1) != 0)
253 }
254}
255impl W {
256 #[doc = "Master\\[i\\] read permission overwrite control\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `m0_rd_aut_ovwt_ctrl` field"]
257 #[inline(always)]
258 #[must_use]
259 pub fn m_rd_aut_ovwt_ctrl(&mut self, n: u8) -> M_RD_AUT_OVWT_CTRL_W<IOMMU_DM_AUT_OVWT_SPEC> {
260 #[allow(clippy::no_effect)]
261 [(); 7][n as usize];
262 M_RD_AUT_OVWT_CTRL_W::new(self, n * 2)
263 }
264 #[doc = "Bit 0 - Master\\[i\\] read permission overwrite control"]
265 #[inline(always)]
266 #[must_use]
267 pub fn m0_rd_aut_ovwt_ctrl(&mut self) -> M_RD_AUT_OVWT_CTRL_W<IOMMU_DM_AUT_OVWT_SPEC> {
268 M_RD_AUT_OVWT_CTRL_W::new(self, 0)
269 }
270 #[doc = "Bit 2 - Master\\[i\\] read permission overwrite control"]
271 #[inline(always)]
272 #[must_use]
273 pub fn m1_rd_aut_ovwt_ctrl(&mut self) -> M_RD_AUT_OVWT_CTRL_W<IOMMU_DM_AUT_OVWT_SPEC> {
274 M_RD_AUT_OVWT_CTRL_W::new(self, 2)
275 }
276 #[doc = "Bit 4 - Master\\[i\\] read permission overwrite control"]
277 #[inline(always)]
278 #[must_use]
279 pub fn m2_rd_aut_ovwt_ctrl(&mut self) -> M_RD_AUT_OVWT_CTRL_W<IOMMU_DM_AUT_OVWT_SPEC> {
280 M_RD_AUT_OVWT_CTRL_W::new(self, 4)
281 }
282 #[doc = "Bit 6 - Master\\[i\\] read permission overwrite control"]
283 #[inline(always)]
284 #[must_use]
285 pub fn m3_rd_aut_ovwt_ctrl(&mut self) -> M_RD_AUT_OVWT_CTRL_W<IOMMU_DM_AUT_OVWT_SPEC> {
286 M_RD_AUT_OVWT_CTRL_W::new(self, 6)
287 }
288 #[doc = "Bit 8 - Master\\[i\\] read permission overwrite control"]
289 #[inline(always)]
290 #[must_use]
291 pub fn m4_rd_aut_ovwt_ctrl(&mut self) -> M_RD_AUT_OVWT_CTRL_W<IOMMU_DM_AUT_OVWT_SPEC> {
292 M_RD_AUT_OVWT_CTRL_W::new(self, 8)
293 }
294 #[doc = "Bit 10 - Master\\[i\\] read permission overwrite control"]
295 #[inline(always)]
296 #[must_use]
297 pub fn m5_rd_aut_ovwt_ctrl(&mut self) -> M_RD_AUT_OVWT_CTRL_W<IOMMU_DM_AUT_OVWT_SPEC> {
298 M_RD_AUT_OVWT_CTRL_W::new(self, 10)
299 }
300 #[doc = "Bit 12 - Master\\[i\\] read permission overwrite control"]
301 #[inline(always)]
302 #[must_use]
303 pub fn m6_rd_aut_ovwt_ctrl(&mut self) -> M_RD_AUT_OVWT_CTRL_W<IOMMU_DM_AUT_OVWT_SPEC> {
304 M_RD_AUT_OVWT_CTRL_W::new(self, 12)
305 }
306 #[doc = "Master\\[i\\] write permission overwrite control\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `m0_wt_aut_ovwt_ctrl` field"]
307 #[inline(always)]
308 #[must_use]
309 pub fn m_wt_aut_ovwt_ctrl(&mut self, n: u8) -> M_WT_AUT_OVWT_CTRL_W<IOMMU_DM_AUT_OVWT_SPEC> {
310 #[allow(clippy::no_effect)]
311 [(); 7][n as usize];
312 M_WT_AUT_OVWT_CTRL_W::new(self, n * 2 + 1)
313 }
314 #[doc = "Bit 1 - Master\\[i\\] write permission overwrite control"]
315 #[inline(always)]
316 #[must_use]
317 pub fn m0_wt_aut_ovwt_ctrl(&mut self) -> M_WT_AUT_OVWT_CTRL_W<IOMMU_DM_AUT_OVWT_SPEC> {
318 M_WT_AUT_OVWT_CTRL_W::new(self, 1)
319 }
320 #[doc = "Bit 3 - Master\\[i\\] write permission overwrite control"]
321 #[inline(always)]
322 #[must_use]
323 pub fn m1_wt_aut_ovwt_ctrl(&mut self) -> M_WT_AUT_OVWT_CTRL_W<IOMMU_DM_AUT_OVWT_SPEC> {
324 M_WT_AUT_OVWT_CTRL_W::new(self, 3)
325 }
326 #[doc = "Bit 5 - Master\\[i\\] write permission overwrite control"]
327 #[inline(always)]
328 #[must_use]
329 pub fn m2_wt_aut_ovwt_ctrl(&mut self) -> M_WT_AUT_OVWT_CTRL_W<IOMMU_DM_AUT_OVWT_SPEC> {
330 M_WT_AUT_OVWT_CTRL_W::new(self, 5)
331 }
332 #[doc = "Bit 7 - Master\\[i\\] write permission overwrite control"]
333 #[inline(always)]
334 #[must_use]
335 pub fn m3_wt_aut_ovwt_ctrl(&mut self) -> M_WT_AUT_OVWT_CTRL_W<IOMMU_DM_AUT_OVWT_SPEC> {
336 M_WT_AUT_OVWT_CTRL_W::new(self, 7)
337 }
338 #[doc = "Bit 9 - Master\\[i\\] write permission overwrite control"]
339 #[inline(always)]
340 #[must_use]
341 pub fn m4_wt_aut_ovwt_ctrl(&mut self) -> M_WT_AUT_OVWT_CTRL_W<IOMMU_DM_AUT_OVWT_SPEC> {
342 M_WT_AUT_OVWT_CTRL_W::new(self, 9)
343 }
344 #[doc = "Bit 11 - Master\\[i\\] write permission overwrite control"]
345 #[inline(always)]
346 #[must_use]
347 pub fn m5_wt_aut_ovwt_ctrl(&mut self) -> M_WT_AUT_OVWT_CTRL_W<IOMMU_DM_AUT_OVWT_SPEC> {
348 M_WT_AUT_OVWT_CTRL_W::new(self, 11)
349 }
350 #[doc = "Bit 13 - Master\\[i\\] write permission overwrite control"]
351 #[inline(always)]
352 #[must_use]
353 pub fn m6_wt_aut_ovwt_ctrl(&mut self) -> M_WT_AUT_OVWT_CTRL_W<IOMMU_DM_AUT_OVWT_SPEC> {
354 M_WT_AUT_OVWT_CTRL_W::new(self, 13)
355 }
356 #[doc = "Bit 31 - Domain write/read permission overwrite enable"]
357 #[inline(always)]
358 #[must_use]
359 pub fn dm_aut_ovwt_enable(&mut self) -> DM_AUT_OVWT_ENABLE_W<IOMMU_DM_AUT_OVWT_SPEC> {
360 DM_AUT_OVWT_ENABLE_W::new(self, 31)
361 }
362 #[doc = r" Writes raw bits to the register."]
363 #[doc = r""]
364 #[doc = r" # Safety"]
365 #[doc = r""]
366 #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
367 #[inline(always)]
368 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
369 self.bits = bits;
370 self
371 }
372}
373#[doc = "IOMMU Domain Authority Overwrite Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iommu_dm_aut_ovwt::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iommu_dm_aut_ovwt::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
374pub struct IOMMU_DM_AUT_OVWT_SPEC;
375impl crate::RegisterSpec for IOMMU_DM_AUT_OVWT_SPEC {
376 type Ux = u32;
377}
378#[doc = "`read()` method returns [`iommu_dm_aut_ovwt::R`](R) reader structure"]
379impl crate::Readable for IOMMU_DM_AUT_OVWT_SPEC {}
380#[doc = "`write(|w| ..)` method takes [`iommu_dm_aut_ovwt::W`](W) writer structure"]
381impl crate::Writable for IOMMU_DM_AUT_OVWT_SPEC {
382 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
383 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
384}
385#[doc = "`reset()` method sets iommu_dm_aut_ovwt to value 0"]
386impl crate::Resettable for IOMMU_DM_AUT_OVWT_SPEC {
387 const RESET_VALUE: Self::Ux = 0;
388}