d1_pac/i2s_pcm/
i2s_pcm_rxchmap2.rs1#[doc = "Register `i2s_pcm_rxchmap2` reader"]
2pub type R = crate::R<I2S_PCM_RXCHMAP2_SPEC>;
3#[doc = "Register `i2s_pcm_rxchmap2` writer"]
4pub type W = crate::W<I2S_PCM_RXCHMAP2_SPEC>;
5#[doc = "Field `ch_map[4-7]` reader - RX Channel %s mapping\n\n0000: The first sample\n\n...\n\n1111: The sixteenth sample"]
6pub type CH_MAP_R = crate::FieldReader;
7#[doc = "Field `ch_map[4-7]` writer - RX Channel %s mapping\n\n0000: The first sample\n\n...\n\n1111: The sixteenth sample"]
8pub type CH_MAP_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
9#[doc = "Field `ch_select[4-7]` reader - RX Channel %s Select"]
10pub type CH_SELECT_R = crate::FieldReader<CH_SELECT_A>;
11#[doc = "RX Channel %s Select\n\nValue on reset: 0"]
12#[derive(Clone, Copy, Debug, PartialEq, Eq)]
13#[repr(u8)]
14pub enum CH_SELECT_A {
15 #[doc = "0: `0`"]
16 SDI0 = 0,
17 #[doc = "1: `1`"]
18 SDI1 = 1,
19 #[doc = "2: `10`"]
20 SDI2 = 2,
21 #[doc = "3: `11`"]
22 SDI3 = 3,
23}
24impl From<CH_SELECT_A> for u8 {
25 #[inline(always)]
26 fn from(variant: CH_SELECT_A) -> Self {
27 variant as _
28 }
29}
30impl crate::FieldSpec for CH_SELECT_A {
31 type Ux = u8;
32}
33impl CH_SELECT_R {
34 #[doc = "Get enumerated values variant"]
35 #[inline(always)]
36 pub const fn variant(&self) -> CH_SELECT_A {
37 match self.bits {
38 0 => CH_SELECT_A::SDI0,
39 1 => CH_SELECT_A::SDI1,
40 2 => CH_SELECT_A::SDI2,
41 3 => CH_SELECT_A::SDI3,
42 _ => unreachable!(),
43 }
44 }
45 #[doc = "`0`"]
46 #[inline(always)]
47 pub fn is_sdi0(&self) -> bool {
48 *self == CH_SELECT_A::SDI0
49 }
50 #[doc = "`1`"]
51 #[inline(always)]
52 pub fn is_sdi1(&self) -> bool {
53 *self == CH_SELECT_A::SDI1
54 }
55 #[doc = "`10`"]
56 #[inline(always)]
57 pub fn is_sdi2(&self) -> bool {
58 *self == CH_SELECT_A::SDI2
59 }
60 #[doc = "`11`"]
61 #[inline(always)]
62 pub fn is_sdi3(&self) -> bool {
63 *self == CH_SELECT_A::SDI3
64 }
65}
66#[doc = "Field `ch_select[4-7]` writer - RX Channel %s Select"]
67pub type CH_SELECT_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CH_SELECT_A>;
68impl<'a, REG> CH_SELECT_W<'a, REG>
69where
70 REG: crate::Writable + crate::RegisterSpec,
71 REG::Ux: From<u8>,
72{
73 #[doc = "`0`"]
74 #[inline(always)]
75 pub fn sdi0(self) -> &'a mut crate::W<REG> {
76 self.variant(CH_SELECT_A::SDI0)
77 }
78 #[doc = "`1`"]
79 #[inline(always)]
80 pub fn sdi1(self) -> &'a mut crate::W<REG> {
81 self.variant(CH_SELECT_A::SDI1)
82 }
83 #[doc = "`10`"]
84 #[inline(always)]
85 pub fn sdi2(self) -> &'a mut crate::W<REG> {
86 self.variant(CH_SELECT_A::SDI2)
87 }
88 #[doc = "`11`"]
89 #[inline(always)]
90 pub fn sdi3(self) -> &'a mut crate::W<REG> {
91 self.variant(CH_SELECT_A::SDI3)
92 }
93}
94impl R {
95 #[doc = "RX Channel [4-7] mapping\n\n0000: The first sample\n\n...\n\n1111: The sixteenth sample\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `ch4_map` field"]
96 #[inline(always)]
97 pub fn ch_map(&self, n: u8) -> CH_MAP_R {
98 #[allow(clippy::no_effect)]
99 [(); 4][n as usize];
100 CH_MAP_R::new(((self.bits >> (n * 8)) & 0x0f) as u8)
101 }
102 #[doc = "Bits 0:3 - RX Channel 4 mapping\n\n0000: The first sample\n\n...\n\n1111: The sixteenth sample"]
103 #[inline(always)]
104 pub fn ch4_map(&self) -> CH_MAP_R {
105 CH_MAP_R::new((self.bits & 0x0f) as u8)
106 }
107 #[doc = "Bits 8:11 - RX Channel 5 mapping\n\n0000: The first sample\n\n...\n\n1111: The sixteenth sample"]
108 #[inline(always)]
109 pub fn ch5_map(&self) -> CH_MAP_R {
110 CH_MAP_R::new(((self.bits >> 8) & 0x0f) as u8)
111 }
112 #[doc = "Bits 16:19 - RX Channel 6 mapping\n\n0000: The first sample\n\n...\n\n1111: The sixteenth sample"]
113 #[inline(always)]
114 pub fn ch6_map(&self) -> CH_MAP_R {
115 CH_MAP_R::new(((self.bits >> 16) & 0x0f) as u8)
116 }
117 #[doc = "Bits 24:27 - RX Channel 7 mapping\n\n0000: The first sample\n\n...\n\n1111: The sixteenth sample"]
118 #[inline(always)]
119 pub fn ch7_map(&self) -> CH_MAP_R {
120 CH_MAP_R::new(((self.bits >> 24) & 0x0f) as u8)
121 }
122 #[doc = "RX Channel [4-7] Select\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `ch4_select` field"]
123 #[inline(always)]
124 pub fn ch_select(&self, n: u8) -> CH_SELECT_R {
125 #[allow(clippy::no_effect)]
126 [(); 4][n as usize];
127 CH_SELECT_R::new(((self.bits >> (n * 8 + 4)) & 3) as u8)
128 }
129 #[doc = "Bits 4:5 - RX Channel 4 Select"]
130 #[inline(always)]
131 pub fn ch4_select(&self) -> CH_SELECT_R {
132 CH_SELECT_R::new(((self.bits >> 4) & 3) as u8)
133 }
134 #[doc = "Bits 12:13 - RX Channel 5 Select"]
135 #[inline(always)]
136 pub fn ch5_select(&self) -> CH_SELECT_R {
137 CH_SELECT_R::new(((self.bits >> 12) & 3) as u8)
138 }
139 #[doc = "Bits 20:21 - RX Channel 6 Select"]
140 #[inline(always)]
141 pub fn ch6_select(&self) -> CH_SELECT_R {
142 CH_SELECT_R::new(((self.bits >> 20) & 3) as u8)
143 }
144 #[doc = "Bits 28:29 - RX Channel 7 Select"]
145 #[inline(always)]
146 pub fn ch7_select(&self) -> CH_SELECT_R {
147 CH_SELECT_R::new(((self.bits >> 28) & 3) as u8)
148 }
149}
150impl W {
151 #[doc = "RX Channel [4-7] mapping\n\n0000: The first sample\n\n...\n\n1111: The sixteenth sample\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `ch4_map` field"]
152 #[inline(always)]
153 #[must_use]
154 pub fn ch_map(&mut self, n: u8) -> CH_MAP_W<I2S_PCM_RXCHMAP2_SPEC> {
155 #[allow(clippy::no_effect)]
156 [(); 4][n as usize];
157 CH_MAP_W::new(self, n * 8)
158 }
159 #[doc = "Bits 0:3 - RX Channel 4 mapping\n\n0000: The first sample\n\n...\n\n1111: The sixteenth sample"]
160 #[inline(always)]
161 #[must_use]
162 pub fn ch4_map(&mut self) -> CH_MAP_W<I2S_PCM_RXCHMAP2_SPEC> {
163 CH_MAP_W::new(self, 0)
164 }
165 #[doc = "Bits 8:11 - RX Channel 5 mapping\n\n0000: The first sample\n\n...\n\n1111: The sixteenth sample"]
166 #[inline(always)]
167 #[must_use]
168 pub fn ch5_map(&mut self) -> CH_MAP_W<I2S_PCM_RXCHMAP2_SPEC> {
169 CH_MAP_W::new(self, 8)
170 }
171 #[doc = "Bits 16:19 - RX Channel 6 mapping\n\n0000: The first sample\n\n...\n\n1111: The sixteenth sample"]
172 #[inline(always)]
173 #[must_use]
174 pub fn ch6_map(&mut self) -> CH_MAP_W<I2S_PCM_RXCHMAP2_SPEC> {
175 CH_MAP_W::new(self, 16)
176 }
177 #[doc = "Bits 24:27 - RX Channel 7 mapping\n\n0000: The first sample\n\n...\n\n1111: The sixteenth sample"]
178 #[inline(always)]
179 #[must_use]
180 pub fn ch7_map(&mut self) -> CH_MAP_W<I2S_PCM_RXCHMAP2_SPEC> {
181 CH_MAP_W::new(self, 24)
182 }
183 #[doc = "RX Channel [4-7] Select\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `ch4_select` field"]
184 #[inline(always)]
185 #[must_use]
186 pub fn ch_select(&mut self, n: u8) -> CH_SELECT_W<I2S_PCM_RXCHMAP2_SPEC> {
187 #[allow(clippy::no_effect)]
188 [(); 4][n as usize];
189 CH_SELECT_W::new(self, n * 8 + 4)
190 }
191 #[doc = "Bits 4:5 - RX Channel 4 Select"]
192 #[inline(always)]
193 #[must_use]
194 pub fn ch4_select(&mut self) -> CH_SELECT_W<I2S_PCM_RXCHMAP2_SPEC> {
195 CH_SELECT_W::new(self, 4)
196 }
197 #[doc = "Bits 12:13 - RX Channel 5 Select"]
198 #[inline(always)]
199 #[must_use]
200 pub fn ch5_select(&mut self) -> CH_SELECT_W<I2S_PCM_RXCHMAP2_SPEC> {
201 CH_SELECT_W::new(self, 12)
202 }
203 #[doc = "Bits 20:21 - RX Channel 6 Select"]
204 #[inline(always)]
205 #[must_use]
206 pub fn ch6_select(&mut self) -> CH_SELECT_W<I2S_PCM_RXCHMAP2_SPEC> {
207 CH_SELECT_W::new(self, 20)
208 }
209 #[doc = "Bits 28:29 - RX Channel 7 Select"]
210 #[inline(always)]
211 #[must_use]
212 pub fn ch7_select(&mut self) -> CH_SELECT_W<I2S_PCM_RXCHMAP2_SPEC> {
213 CH_SELECT_W::new(self, 28)
214 }
215 #[doc = r" Writes raw bits to the register."]
216 #[doc = r""]
217 #[doc = r" # Safety"]
218 #[doc = r""]
219 #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
220 #[inline(always)]
221 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
222 self.bits = bits;
223 self
224 }
225}
226#[doc = "I2S/PCM RX Channel Mapping Register2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`i2s_pcm_rxchmap2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`i2s_pcm_rxchmap2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
227pub struct I2S_PCM_RXCHMAP2_SPEC;
228impl crate::RegisterSpec for I2S_PCM_RXCHMAP2_SPEC {
229 type Ux = u32;
230}
231#[doc = "`read()` method returns [`i2s_pcm_rxchmap2::R`](R) reader structure"]
232impl crate::Readable for I2S_PCM_RXCHMAP2_SPEC {}
233#[doc = "`write(|w| ..)` method takes [`i2s_pcm_rxchmap2::W`](W) writer structure"]
234impl crate::Writable for I2S_PCM_RXCHMAP2_SPEC {
235 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
236 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
237}
238#[doc = "`reset()` method sets i2s_pcm_rxchmap2 to value 0"]
239impl crate::Resettable for I2S_PCM_RXCHMAP2_SPEC {
240 const RESET_VALUE: Self::Ux = 0;
241}