1#[doc = "Register `pb_drv1` reader"]
2pub type R = crate::R<PB_DRV1_SPEC>;
3#[doc = "Register `pb_drv1` writer"]
4pub type W = crate::W<PB_DRV1_SPEC>;
5#[doc = "Field `pb_drv[8-12]` reader - PB Multi_Driving Select"]
6pub type PB_DRV_R = crate::FieldReader<PB_DRV_A>;
7#[doc = "PB Multi_Driving Select\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9#[repr(u8)]
10pub enum PB_DRV_A {
11 #[doc = "0: `0`"]
12 L0 = 0,
13 #[doc = "1: `1`"]
14 L1 = 1,
15 #[doc = "2: `10`"]
16 L2 = 2,
17 #[doc = "3: `11`"]
18 L3 = 3,
19}
20impl From<PB_DRV_A> for u8 {
21 #[inline(always)]
22 fn from(variant: PB_DRV_A) -> Self {
23 variant as _
24 }
25}
26impl crate::FieldSpec for PB_DRV_A {
27 type Ux = u8;
28}
29impl PB_DRV_R {
30 #[doc = "Get enumerated values variant"]
31 #[inline(always)]
32 pub const fn variant(&self) -> PB_DRV_A {
33 match self.bits {
34 0 => PB_DRV_A::L0,
35 1 => PB_DRV_A::L1,
36 2 => PB_DRV_A::L2,
37 3 => PB_DRV_A::L3,
38 _ => unreachable!(),
39 }
40 }
41 #[doc = "`0`"]
42 #[inline(always)]
43 pub fn is_l0(&self) -> bool {
44 *self == PB_DRV_A::L0
45 }
46 #[doc = "`1`"]
47 #[inline(always)]
48 pub fn is_l1(&self) -> bool {
49 *self == PB_DRV_A::L1
50 }
51 #[doc = "`10`"]
52 #[inline(always)]
53 pub fn is_l2(&self) -> bool {
54 *self == PB_DRV_A::L2
55 }
56 #[doc = "`11`"]
57 #[inline(always)]
58 pub fn is_l3(&self) -> bool {
59 *self == PB_DRV_A::L3
60 }
61}
62#[doc = "Field `pb_drv[8-12]` writer - PB Multi_Driving Select"]
63pub type PB_DRV_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, PB_DRV_A>;
64impl<'a, REG> PB_DRV_W<'a, REG>
65where
66 REG: crate::Writable + crate::RegisterSpec,
67 REG::Ux: From<u8>,
68{
69 #[doc = "`0`"]
70 #[inline(always)]
71 pub fn l0(self) -> &'a mut crate::W<REG> {
72 self.variant(PB_DRV_A::L0)
73 }
74 #[doc = "`1`"]
75 #[inline(always)]
76 pub fn l1(self) -> &'a mut crate::W<REG> {
77 self.variant(PB_DRV_A::L1)
78 }
79 #[doc = "`10`"]
80 #[inline(always)]
81 pub fn l2(self) -> &'a mut crate::W<REG> {
82 self.variant(PB_DRV_A::L2)
83 }
84 #[doc = "`11`"]
85 #[inline(always)]
86 pub fn l3(self) -> &'a mut crate::W<REG> {
87 self.variant(PB_DRV_A::L3)
88 }
89}
90impl R {
91 #[doc = "PB Multi_Driving Select\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `pb8_drv` field"]
92 #[inline(always)]
93 pub fn pb_drv(&self, n: u8) -> PB_DRV_R {
94 #[allow(clippy::no_effect)]
95 [(); 5][n as usize];
96 PB_DRV_R::new(((self.bits >> (n * 4)) & 3) as u8)
97 }
98 #[doc = "Bits 0:1 - PB Multi_Driving Select"]
99 #[inline(always)]
100 pub fn pb8_drv(&self) -> PB_DRV_R {
101 PB_DRV_R::new((self.bits & 3) as u8)
102 }
103 #[doc = "Bits 4:5 - PB Multi_Driving Select"]
104 #[inline(always)]
105 pub fn pb9_drv(&self) -> PB_DRV_R {
106 PB_DRV_R::new(((self.bits >> 4) & 3) as u8)
107 }
108 #[doc = "Bits 8:9 - PB Multi_Driving Select"]
109 #[inline(always)]
110 pub fn pb10_drv(&self) -> PB_DRV_R {
111 PB_DRV_R::new(((self.bits >> 8) & 3) as u8)
112 }
113 #[doc = "Bits 12:13 - PB Multi_Driving Select"]
114 #[inline(always)]
115 pub fn pb11_drv(&self) -> PB_DRV_R {
116 PB_DRV_R::new(((self.bits >> 12) & 3) as u8)
117 }
118 #[doc = "Bits 16:17 - PB Multi_Driving Select"]
119 #[inline(always)]
120 pub fn pb12_drv(&self) -> PB_DRV_R {
121 PB_DRV_R::new(((self.bits >> 16) & 3) as u8)
122 }
123}
124impl W {
125 #[doc = "PB Multi_Driving Select\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `pb8_drv` field"]
126 #[inline(always)]
127 #[must_use]
128 pub fn pb_drv(&mut self, n: u8) -> PB_DRV_W<PB_DRV1_SPEC> {
129 #[allow(clippy::no_effect)]
130 [(); 5][n as usize];
131 PB_DRV_W::new(self, n * 4)
132 }
133 #[doc = "Bits 0:1 - PB Multi_Driving Select"]
134 #[inline(always)]
135 #[must_use]
136 pub fn pb8_drv(&mut self) -> PB_DRV_W<PB_DRV1_SPEC> {
137 PB_DRV_W::new(self, 0)
138 }
139 #[doc = "Bits 4:5 - PB Multi_Driving Select"]
140 #[inline(always)]
141 #[must_use]
142 pub fn pb9_drv(&mut self) -> PB_DRV_W<PB_DRV1_SPEC> {
143 PB_DRV_W::new(self, 4)
144 }
145 #[doc = "Bits 8:9 - PB Multi_Driving Select"]
146 #[inline(always)]
147 #[must_use]
148 pub fn pb10_drv(&mut self) -> PB_DRV_W<PB_DRV1_SPEC> {
149 PB_DRV_W::new(self, 8)
150 }
151 #[doc = "Bits 12:13 - PB Multi_Driving Select"]
152 #[inline(always)]
153 #[must_use]
154 pub fn pb11_drv(&mut self) -> PB_DRV_W<PB_DRV1_SPEC> {
155 PB_DRV_W::new(self, 12)
156 }
157 #[doc = "Bits 16:17 - PB Multi_Driving Select"]
158 #[inline(always)]
159 #[must_use]
160 pub fn pb12_drv(&mut self) -> PB_DRV_W<PB_DRV1_SPEC> {
161 PB_DRV_W::new(self, 16)
162 }
163 #[doc = r" Writes raw bits to the register."]
164 #[doc = r""]
165 #[doc = r" # Safety"]
166 #[doc = r""]
167 #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
168 #[inline(always)]
169 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
170 self.bits = bits;
171 self
172 }
173}
174#[doc = "PB Multi_Driving Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pb_drv1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pb_drv1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
175pub struct PB_DRV1_SPEC;
176impl crate::RegisterSpec for PB_DRV1_SPEC {
177 type Ux = u32;
178}
179#[doc = "`read()` method returns [`pb_drv1::R`](R) reader structure"]
180impl crate::Readable for PB_DRV1_SPEC {}
181#[doc = "`write(|w| ..)` method takes [`pb_drv1::W`](W) writer structure"]
182impl crate::Writable for PB_DRV1_SPEC {
183 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
184 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
185}
186#[doc = "`reset()` method sets pb_drv1 to value 0"]
187impl crate::Resettable for PB_DRV1_SPEC {
188 const RESET_VALUE: Self::Ux = 0;
189}