d1_pac/gpadc/
gp_fifo_ints.rs

1#[doc = "Register `gp_fifo_ints` reader"]
2pub type R = crate::R<GP_FIFO_INTS_SPEC>;
3#[doc = "Register `gp_fifo_ints` writer"]
4pub type W = crate::W<GP_FIFO_INTS_SPEC>;
5#[doc = "Field `rxa_cnt` reader - ADC FIFO available sample word counter"]
6pub type RXA_CNT_R = crate::FieldReader;
7#[doc = "Field `fifo_data_pending` reader - ADC FIFO Data Available Pending Bit"]
8pub type FIFO_DATA_PENDING_R = crate::BitReader<FIFO_DATA_PENDING_A>;
9#[doc = "ADC FIFO Data Available Pending Bit\n\nValue on reset: 0"]
10#[derive(Clone, Copy, Debug, PartialEq, Eq)]
11pub enum FIFO_DATA_PENDING_A {
12    #[doc = "0: NO Pending IRQ"]
13    NO_PENDING = 0,
14    #[doc = "1: FIFO Available Pending IRQ"]
15    PENDING = 1,
16}
17impl From<FIFO_DATA_PENDING_A> for bool {
18    #[inline(always)]
19    fn from(variant: FIFO_DATA_PENDING_A) -> Self {
20        variant as u8 != 0
21    }
22}
23impl FIFO_DATA_PENDING_R {
24    #[doc = "Get enumerated values variant"]
25    #[inline(always)]
26    pub const fn variant(&self) -> FIFO_DATA_PENDING_A {
27        match self.bits {
28            false => FIFO_DATA_PENDING_A::NO_PENDING,
29            true => FIFO_DATA_PENDING_A::PENDING,
30        }
31    }
32    #[doc = "NO Pending IRQ"]
33    #[inline(always)]
34    pub fn is_no_pending(&self) -> bool {
35        *self == FIFO_DATA_PENDING_A::NO_PENDING
36    }
37    #[doc = "FIFO Available Pending IRQ"]
38    #[inline(always)]
39    pub fn is_pending(&self) -> bool {
40        *self == FIFO_DATA_PENDING_A::PENDING
41    }
42}
43#[doc = "Field `fifo_data_pending` writer - ADC FIFO Data Available Pending Bit"]
44pub type FIFO_DATA_PENDING_W<'a, REG> = crate::BitWriter1C<'a, REG, FIFO_DATA_PENDING_A>;
45impl<'a, REG> FIFO_DATA_PENDING_W<'a, REG>
46where
47    REG: crate::Writable + crate::RegisterSpec,
48{
49    #[doc = "NO Pending IRQ"]
50    #[inline(always)]
51    pub fn no_pending(self) -> &'a mut crate::W<REG> {
52        self.variant(FIFO_DATA_PENDING_A::NO_PENDING)
53    }
54    #[doc = "FIFO Available Pending IRQ"]
55    #[inline(always)]
56    pub fn pending(self) -> &'a mut crate::W<REG> {
57        self.variant(FIFO_DATA_PENDING_A::PENDING)
58    }
59}
60#[doc = "Field `fifo_overrun_pending` reader - ADC FIFO Overrun IRQ Pending"]
61pub type FIFO_OVERRUN_PENDING_R = crate::BitReader<FIFO_OVERRUN_PENDING_A>;
62#[doc = "ADC FIFO Overrun IRQ Pending\n\nValue on reset: 0"]
63#[derive(Clone, Copy, Debug, PartialEq, Eq)]
64pub enum FIFO_OVERRUN_PENDING_A {
65    #[doc = "0: No Pending IRQ"]
66    NP_PENDING = 0,
67    #[doc = "1: FIFO Overrun Pending IRQ"]
68    PENDING = 1,
69}
70impl From<FIFO_OVERRUN_PENDING_A> for bool {
71    #[inline(always)]
72    fn from(variant: FIFO_OVERRUN_PENDING_A) -> Self {
73        variant as u8 != 0
74    }
75}
76impl FIFO_OVERRUN_PENDING_R {
77    #[doc = "Get enumerated values variant"]
78    #[inline(always)]
79    pub const fn variant(&self) -> FIFO_OVERRUN_PENDING_A {
80        match self.bits {
81            false => FIFO_OVERRUN_PENDING_A::NP_PENDING,
82            true => FIFO_OVERRUN_PENDING_A::PENDING,
83        }
84    }
85    #[doc = "No Pending IRQ"]
86    #[inline(always)]
87    pub fn is_np_pending(&self) -> bool {
88        *self == FIFO_OVERRUN_PENDING_A::NP_PENDING
89    }
90    #[doc = "FIFO Overrun Pending IRQ"]
91    #[inline(always)]
92    pub fn is_pending(&self) -> bool {
93        *self == FIFO_OVERRUN_PENDING_A::PENDING
94    }
95}
96#[doc = "Field `fifo_overrun_pending` writer - ADC FIFO Overrun IRQ Pending"]
97pub type FIFO_OVERRUN_PENDING_W<'a, REG> = crate::BitWriter1C<'a, REG, FIFO_OVERRUN_PENDING_A>;
98impl<'a, REG> FIFO_OVERRUN_PENDING_W<'a, REG>
99where
100    REG: crate::Writable + crate::RegisterSpec,
101{
102    #[doc = "No Pending IRQ"]
103    #[inline(always)]
104    pub fn np_pending(self) -> &'a mut crate::W<REG> {
105        self.variant(FIFO_OVERRUN_PENDING_A::NP_PENDING)
106    }
107    #[doc = "FIFO Overrun Pending IRQ"]
108    #[inline(always)]
109    pub fn pending(self) -> &'a mut crate::W<REG> {
110        self.variant(FIFO_OVERRUN_PENDING_A::PENDING)
111    }
112}
113impl R {
114    #[doc = "Bits 8:13 - ADC FIFO available sample word counter"]
115    #[inline(always)]
116    pub fn rxa_cnt(&self) -> RXA_CNT_R {
117        RXA_CNT_R::new(((self.bits >> 8) & 0x3f) as u8)
118    }
119    #[doc = "Bit 16 - ADC FIFO Data Available Pending Bit"]
120    #[inline(always)]
121    pub fn fifo_data_pending(&self) -> FIFO_DATA_PENDING_R {
122        FIFO_DATA_PENDING_R::new(((self.bits >> 16) & 1) != 0)
123    }
124    #[doc = "Bit 17 - ADC FIFO Overrun IRQ Pending"]
125    #[inline(always)]
126    pub fn fifo_overrun_pending(&self) -> FIFO_OVERRUN_PENDING_R {
127        FIFO_OVERRUN_PENDING_R::new(((self.bits >> 17) & 1) != 0)
128    }
129}
130impl W {
131    #[doc = "Bit 16 - ADC FIFO Data Available Pending Bit"]
132    #[inline(always)]
133    #[must_use]
134    pub fn fifo_data_pending(&mut self) -> FIFO_DATA_PENDING_W<GP_FIFO_INTS_SPEC> {
135        FIFO_DATA_PENDING_W::new(self, 16)
136    }
137    #[doc = "Bit 17 - ADC FIFO Overrun IRQ Pending"]
138    #[inline(always)]
139    #[must_use]
140    pub fn fifo_overrun_pending(&mut self) -> FIFO_OVERRUN_PENDING_W<GP_FIFO_INTS_SPEC> {
141        FIFO_OVERRUN_PENDING_W::new(self, 17)
142    }
143    #[doc = r" Writes raw bits to the register."]
144    #[doc = r""]
145    #[doc = r" # Safety"]
146    #[doc = r""]
147    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
148    #[inline(always)]
149    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
150        self.bits = bits;
151        self
152    }
153}
154#[doc = "GPADC FIFO Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gp_fifo_ints::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gp_fifo_ints::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
155pub struct GP_FIFO_INTS_SPEC;
156impl crate::RegisterSpec for GP_FIFO_INTS_SPEC {
157    type Ux = u32;
158}
159#[doc = "`read()` method returns [`gp_fifo_ints::R`](R) reader structure"]
160impl crate::Readable for GP_FIFO_INTS_SPEC {}
161#[doc = "`write(|w| ..)` method takes [`gp_fifo_ints::W`](W) writer structure"]
162impl crate::Writable for GP_FIFO_INTS_SPEC {
163    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
164    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0x0003_0000;
165}
166#[doc = "`reset()` method sets gp_fifo_ints to value 0"]
167impl crate::Resettable for GP_FIFO_INTS_SPEC {
168    const RESET_VALUE: Self::Ux = 0;
169}
d1_pac/gpadc/gp_fifo_ints.rs

d1_pac/gpadc/
gp_fifo_ints.rs
