d1_pac/gpadc/
gp_ctrl.rs

1#[doc = "Register `gp_ctrl` reader"]
2pub type R = crate::R<GP_CTRL_SPEC>;
3#[doc = "Register `gp_ctrl` writer"]
4pub type W = crate::W<GP_CTRL_SPEC>;
5#[doc = "Field `adc_en` reader - ADC Function Enable\n\nBefore the bit is enabled, configure ADC parameters including the work mode and channel number, etc."]
6pub type ADC_EN_R = crate::BitReader<ADC_EN_A>;
7#[doc = "ADC Function Enable\n\nBefore the bit is enabled, configure ADC parameters including the work mode and channel number, etc.\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum ADC_EN_A {
10    #[doc = "0: Disable"]
11    DISABLE = 0,
12    #[doc = "1: Enable"]
13    ENABLE = 1,
14}
15impl From<ADC_EN_A> for bool {
16    #[inline(always)]
17    fn from(variant: ADC_EN_A) -> Self {
18        variant as u8 != 0
19    }
20}
21impl ADC_EN_R {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> ADC_EN_A {
25        match self.bits {
26            false => ADC_EN_A::DISABLE,
27            true => ADC_EN_A::ENABLE,
28        }
29    }
30    #[doc = "Disable"]
31    #[inline(always)]
32    pub fn is_disable(&self) -> bool {
33        *self == ADC_EN_A::DISABLE
34    }
35    #[doc = "Enable"]
36    #[inline(always)]
37    pub fn is_enable(&self) -> bool {
38        *self == ADC_EN_A::ENABLE
39    }
40}
41#[doc = "Field `adc_en` writer - ADC Function Enable\n\nBefore the bit is enabled, configure ADC parameters including the work mode and channel number, etc."]
42pub type ADC_EN_W<'a, REG> = crate::BitWriter<'a, REG, ADC_EN_A>;
43impl<'a, REG> ADC_EN_W<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    #[doc = "Disable"]
48    #[inline(always)]
49    pub fn disable(self) -> &'a mut crate::W<REG> {
50        self.variant(ADC_EN_A::DISABLE)
51    }
52    #[doc = "Enable"]
53    #[inline(always)]
54    pub fn enable(self) -> &'a mut crate::W<REG> {
55        self.variant(ADC_EN_A::ENABLE)
56    }
57}
58#[doc = "Field `adc_cali_en` reader - ADC Calibration"]
59pub type ADC_CALI_EN_R = crate::BitReader<ADC_CALI_EN_A>;
60#[doc = "ADC Calibration\n\nValue on reset: 0"]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum ADC_CALI_EN_A {
63    #[doc = "1: Start Calibration, it is cleared to 0 after calibration"]
64    START = 1,
65}
66impl From<ADC_CALI_EN_A> for bool {
67    #[inline(always)]
68    fn from(variant: ADC_CALI_EN_A) -> Self {
69        variant as u8 != 0
70    }
71}
72impl ADC_CALI_EN_R {
73    #[doc = "Get enumerated values variant"]
74    #[inline(always)]
75    pub const fn variant(&self) -> Option<ADC_CALI_EN_A> {
76        match self.bits {
77            true => Some(ADC_CALI_EN_A::START),
78            _ => None,
79        }
80    }
81    #[doc = "Start Calibration, it is cleared to 0 after calibration"]
82    #[inline(always)]
83    pub fn is_start(&self) -> bool {
84        *self == ADC_CALI_EN_A::START
85    }
86}
87#[doc = "Field `adc_cali_en` writer - ADC Calibration"]
88pub type ADC_CALI_EN_W<'a, REG> = crate::BitWriter<'a, REG, ADC_CALI_EN_A>;
89impl<'a, REG> ADC_CALI_EN_W<'a, REG>
90where
91    REG: crate::Writable + crate::RegisterSpec,
92{
93    #[doc = "Start Calibration, it is cleared to 0 after calibration"]
94    #[inline(always)]
95    pub fn start(self) -> &'a mut crate::W<REG> {
96        self.variant(ADC_CALI_EN_A::START)
97    }
98}
99#[doc = "Field `gpadc_work_mode` reader - GPADC Work Mode"]
100pub type GPADC_WORK_MODE_R = crate::FieldReader<GPADC_WORK_MODE_A>;
101#[doc = "GPADC Work Mode\n\nValue on reset: 0"]
102#[derive(Clone, Copy, Debug, PartialEq, Eq)]
103#[repr(u8)]
104pub enum GPADC_WORK_MODE_A {
105    #[doc = "0: Single conversion mode"]
106    SINGLE = 0,
107    #[doc = "2: Continuous conversion mode"]
108    CONTINUOUS = 2,
109    #[doc = "3: Burst conversion mode"]
110    BURST = 3,
111}
112impl From<GPADC_WORK_MODE_A> for u8 {
113    #[inline(always)]
114    fn from(variant: GPADC_WORK_MODE_A) -> Self {
115        variant as _
116    }
117}
118impl crate::FieldSpec for GPADC_WORK_MODE_A {
119    type Ux = u8;
120}
121impl GPADC_WORK_MODE_R {
122    #[doc = "Get enumerated values variant"]
123    #[inline(always)]
124    pub const fn variant(&self) -> Option<GPADC_WORK_MODE_A> {
125        match self.bits {
126            0 => Some(GPADC_WORK_MODE_A::SINGLE),
127            2 => Some(GPADC_WORK_MODE_A::CONTINUOUS),
128            3 => Some(GPADC_WORK_MODE_A::BURST),
129            _ => None,
130        }
131    }
132    #[doc = "Single conversion mode"]
133    #[inline(always)]
134    pub fn is_single(&self) -> bool {
135        *self == GPADC_WORK_MODE_A::SINGLE
136    }
137    #[doc = "Continuous conversion mode"]
138    #[inline(always)]
139    pub fn is_continuous(&self) -> bool {
140        *self == GPADC_WORK_MODE_A::CONTINUOUS
141    }
142    #[doc = "Burst conversion mode"]
143    #[inline(always)]
144    pub fn is_burst(&self) -> bool {
145        *self == GPADC_WORK_MODE_A::BURST
146    }
147}
148#[doc = "Field `gpadc_work_mode` writer - GPADC Work Mode"]
149pub type GPADC_WORK_MODE_W<'a, REG> = crate::FieldWriter<'a, REG, 2, GPADC_WORK_MODE_A>;
150impl<'a, REG> GPADC_WORK_MODE_W<'a, REG>
151where
152    REG: crate::Writable + crate::RegisterSpec,
153    REG::Ux: From<u8>,
154{
155    #[doc = "Single conversion mode"]
156    #[inline(always)]
157    pub fn single(self) -> &'a mut crate::W<REG> {
158        self.variant(GPADC_WORK_MODE_A::SINGLE)
159    }
160    #[doc = "Continuous conversion mode"]
161    #[inline(always)]
162    pub fn continuous(self) -> &'a mut crate::W<REG> {
163        self.variant(GPADC_WORK_MODE_A::CONTINUOUS)
164    }
165    #[doc = "Burst conversion mode"]
166    #[inline(always)]
167    pub fn burst(self) -> &'a mut crate::W<REG> {
168        self.variant(GPADC_WORK_MODE_A::BURST)
169    }
170}
171#[doc = "Field `adc_op_bias` reader - ADC OP Bias\n\nAdjust the bandwidth of the ADC amplifier"]
172pub type ADC_OP_BIAS_R = crate::FieldReader;
173#[doc = "Field `adc_op_bias` writer - ADC OP Bias\n\nAdjust the bandwidth of the ADC amplifier"]
174pub type ADC_OP_BIAS_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
175#[doc = "Field `adc_autocali_en` reader - ADC Auto Calibration"]
176pub type ADC_AUTOCALI_EN_R = crate::BitReader;
177#[doc = "Field `adc_autocali_en` writer - ADC Auto Calibration"]
178pub type ADC_AUTOCALI_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
179#[doc = "Field `adc_first_dly` reader - ADC First Convert Delay Setting\n\nADC conversion of each channel is delayed by N samples"]
180pub type ADC_FIRST_DLY_R = crate::FieldReader;
181#[doc = "Field `adc_first_dly` writer - ADC First Convert Delay Setting\n\nADC conversion of each channel is delayed by N samples"]
182pub type ADC_FIRST_DLY_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
183impl R {
184    #[doc = "Bit 16 - ADC Function Enable\n\nBefore the bit is enabled, configure ADC parameters including the work mode and channel number, etc."]
185    #[inline(always)]
186    pub fn adc_en(&self) -> ADC_EN_R {
187        ADC_EN_R::new(((self.bits >> 16) & 1) != 0)
188    }
189    #[doc = "Bit 17 - ADC Calibration"]
190    #[inline(always)]
191    pub fn adc_cali_en(&self) -> ADC_CALI_EN_R {
192        ADC_CALI_EN_R::new(((self.bits >> 17) & 1) != 0)
193    }
194    #[doc = "Bits 18:19 - GPADC Work Mode"]
195    #[inline(always)]
196    pub fn gpadc_work_mode(&self) -> GPADC_WORK_MODE_R {
197        GPADC_WORK_MODE_R::new(((self.bits >> 18) & 3) as u8)
198    }
199    #[doc = "Bits 20:21 - ADC OP Bias\n\nAdjust the bandwidth of the ADC amplifier"]
200    #[inline(always)]
201    pub fn adc_op_bias(&self) -> ADC_OP_BIAS_R {
202        ADC_OP_BIAS_R::new(((self.bits >> 20) & 3) as u8)
203    }
204    #[doc = "Bit 23 - ADC Auto Calibration"]
205    #[inline(always)]
206    pub fn adc_autocali_en(&self) -> ADC_AUTOCALI_EN_R {
207        ADC_AUTOCALI_EN_R::new(((self.bits >> 23) & 1) != 0)
208    }
209    #[doc = "Bits 24:31 - ADC First Convert Delay Setting\n\nADC conversion of each channel is delayed by N samples"]
210    #[inline(always)]
211    pub fn adc_first_dly(&self) -> ADC_FIRST_DLY_R {
212        ADC_FIRST_DLY_R::new(((self.bits >> 24) & 0xff) as u8)
213    }
214}
215impl W {
216    #[doc = "Bit 16 - ADC Function Enable\n\nBefore the bit is enabled, configure ADC parameters including the work mode and channel number, etc."]
217    #[inline(always)]
218    #[must_use]
219    pub fn adc_en(&mut self) -> ADC_EN_W<GP_CTRL_SPEC> {
220        ADC_EN_W::new(self, 16)
221    }
222    #[doc = "Bit 17 - ADC Calibration"]
223    #[inline(always)]
224    #[must_use]
225    pub fn adc_cali_en(&mut self) -> ADC_CALI_EN_W<GP_CTRL_SPEC> {
226        ADC_CALI_EN_W::new(self, 17)
227    }
228    #[doc = "Bits 18:19 - GPADC Work Mode"]
229    #[inline(always)]
230    #[must_use]
231    pub fn gpadc_work_mode(&mut self) -> GPADC_WORK_MODE_W<GP_CTRL_SPEC> {
232        GPADC_WORK_MODE_W::new(self, 18)
233    }
234    #[doc = "Bits 20:21 - ADC OP Bias\n\nAdjust the bandwidth of the ADC amplifier"]
235    #[inline(always)]
236    #[must_use]
237    pub fn adc_op_bias(&mut self) -> ADC_OP_BIAS_W<GP_CTRL_SPEC> {
238        ADC_OP_BIAS_W::new(self, 20)
239    }
240    #[doc = "Bit 23 - ADC Auto Calibration"]
241    #[inline(always)]
242    #[must_use]
243    pub fn adc_autocali_en(&mut self) -> ADC_AUTOCALI_EN_W<GP_CTRL_SPEC> {
244        ADC_AUTOCALI_EN_W::new(self, 23)
245    }
246    #[doc = "Bits 24:31 - ADC First Convert Delay Setting\n\nADC conversion of each channel is delayed by N samples"]
247    #[inline(always)]
248    #[must_use]
249    pub fn adc_first_dly(&mut self) -> ADC_FIRST_DLY_W<GP_CTRL_SPEC> {
250        ADC_FIRST_DLY_W::new(self, 24)
251    }
252    #[doc = r" Writes raw bits to the register."]
253    #[doc = r""]
254    #[doc = r" # Safety"]
255    #[doc = r""]
256    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
257    #[inline(always)]
258    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
259        self.bits = bits;
260        self
261    }
262}
263#[doc = "GPADC Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gp_ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gp_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
264pub struct GP_CTRL_SPEC;
265impl crate::RegisterSpec for GP_CTRL_SPEC {
266    type Ux = u32;
267}
268#[doc = "`read()` method returns [`gp_ctrl::R`](R) reader structure"]
269impl crate::Readable for GP_CTRL_SPEC {}
270#[doc = "`write(|w| ..)` method takes [`gp_ctrl::W`](W) writer structure"]
271impl crate::Writable for GP_CTRL_SPEC {
272    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
273    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
274}
275#[doc = "`reset()` method sets gp_ctrl to value 0x0080_0000"]
276impl crate::Resettable for GP_CTRL_SPEC {
277    const RESET_VALUE: Self::Ux = 0x0080_0000;
278}
d1_pac/gpadc/gp_ctrl.rs

d1_pac/gpadc/
gp_ctrl.rs
