d1_pac/emac/
emac_tx_dma_sta.rs1#[doc = "Register `emac_tx_dma_sta` reader"]
2pub type R = crate::R<EMAC_TX_DMA_STA_SPEC>;
3#[doc = "Field `tx_dma_sta` reader - The State of Transmit DMA FSM"]
4pub type TX_DMA_STA_R = crate::FieldReader<TX_DMA_STA_A>;
5#[doc = "The State of Transmit DMA FSM\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7#[repr(u8)]
8pub enum TX_DMA_STA_A {
9 #[doc = "0: `0`"]
10 STOP = 0,
11 #[doc = "1: `1`"]
12 RUN_FETCH_DESC = 1,
13 #[doc = "2: `10`"]
14 RUN_WAIT_STA = 2,
15 #[doc = "3: `11`"]
16 RUN_TRANS_DATA = 3,
17 #[doc = "6: `110`"]
18 SUSPEND = 6,
19 #[doc = "7: `111`"]
20 RUN_CLOSE_DESC = 7,
21}
22impl From<TX_DMA_STA_A> for u8 {
23 #[inline(always)]
24 fn from(variant: TX_DMA_STA_A) -> Self {
25 variant as _
26 }
27}
28impl crate::FieldSpec for TX_DMA_STA_A {
29 type Ux = u8;
30}
31impl TX_DMA_STA_R {
32 #[doc = "Get enumerated values variant"]
33 #[inline(always)]
34 pub const fn variant(&self) -> Option<TX_DMA_STA_A> {
35 match self.bits {
36 0 => Some(TX_DMA_STA_A::STOP),
37 1 => Some(TX_DMA_STA_A::RUN_FETCH_DESC),
38 2 => Some(TX_DMA_STA_A::RUN_WAIT_STA),
39 3 => Some(TX_DMA_STA_A::RUN_TRANS_DATA),
40 6 => Some(TX_DMA_STA_A::SUSPEND),
41 7 => Some(TX_DMA_STA_A::RUN_CLOSE_DESC),
42 _ => None,
43 }
44 }
45 #[doc = "`0`"]
46 #[inline(always)]
47 pub fn is_stop(&self) -> bool {
48 *self == TX_DMA_STA_A::STOP
49 }
50 #[doc = "`1`"]
51 #[inline(always)]
52 pub fn is_run_fetch_desc(&self) -> bool {
53 *self == TX_DMA_STA_A::RUN_FETCH_DESC
54 }
55 #[doc = "`10`"]
56 #[inline(always)]
57 pub fn is_run_wait_sta(&self) -> bool {
58 *self == TX_DMA_STA_A::RUN_WAIT_STA
59 }
60 #[doc = "`11`"]
61 #[inline(always)]
62 pub fn is_run_trans_data(&self) -> bool {
63 *self == TX_DMA_STA_A::RUN_TRANS_DATA
64 }
65 #[doc = "`110`"]
66 #[inline(always)]
67 pub fn is_suspend(&self) -> bool {
68 *self == TX_DMA_STA_A::SUSPEND
69 }
70 #[doc = "`111`"]
71 #[inline(always)]
72 pub fn is_run_close_desc(&self) -> bool {
73 *self == TX_DMA_STA_A::RUN_CLOSE_DESC
74 }
75}
76impl R {
77 #[doc = "Bits 0:2 - The State of Transmit DMA FSM"]
78 #[inline(always)]
79 pub fn tx_dma_sta(&self) -> TX_DMA_STA_R {
80 TX_DMA_STA_R::new((self.bits & 7) as u8)
81 }
82}
83#[doc = "EMAC Transmit DMA Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`emac_tx_dma_sta::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
84pub struct EMAC_TX_DMA_STA_SPEC;
85impl crate::RegisterSpec for EMAC_TX_DMA_STA_SPEC {
86 type Ux = u32;
87}
88#[doc = "`read()` method returns [`emac_tx_dma_sta::R`](R) reader structure"]
89impl crate::Readable for EMAC_TX_DMA_STA_SPEC {}
90#[doc = "`reset()` method sets emac_tx_dma_sta to value 0"]
91impl crate::Resettable for EMAC_TX_DMA_STA_SPEC {
92 const RESET_VALUE: Self::Ux = 0;
93}