d1_pac/emac/
emac_rx_ctl0.rs

1#[doc = "Register `emac_rx_ctl0` reader"]
2pub type R = crate::R<EMAC_RX_CTL0_SPEC>;
3#[doc = "Register `emac_rx_ctl0` writer"]
4pub type W = crate::W<EMAC_RX_CTL0_SPEC>;
5#[doc = "Field `rx_flow_ctl_en` reader - "]
6pub type RX_FLOW_CTL_EN_R = crate::BitReader;
7#[doc = "Field `rx_flow_ctl_en` writer - "]
8pub type RX_FLOW_CTL_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `rx_pause_frm_md` reader - "]
10pub type RX_PAUSE_FRM_MD_R = crate::BitReader<RX_PAUSE_FRM_MD_A>;
11#[doc = "\n\nValue on reset: 0"]
12#[derive(Clone, Copy, Debug, PartialEq, Eq)]
13pub enum RX_PAUSE_FRM_MD_A {
14    #[doc = "0: `0`"]
15    ONLY_MULTICAST = 0,
16    #[doc = "1: `1`"]
17    ALSO_UNICAST_MAC0 = 1,
18}
19impl From<RX_PAUSE_FRM_MD_A> for bool {
20    #[inline(always)]
21    fn from(variant: RX_PAUSE_FRM_MD_A) -> Self {
22        variant as u8 != 0
23    }
24}
25impl RX_PAUSE_FRM_MD_R {
26    #[doc = "Get enumerated values variant"]
27    #[inline(always)]
28    pub const fn variant(&self) -> RX_PAUSE_FRM_MD_A {
29        match self.bits {
30            false => RX_PAUSE_FRM_MD_A::ONLY_MULTICAST,
31            true => RX_PAUSE_FRM_MD_A::ALSO_UNICAST_MAC0,
32        }
33    }
34    #[doc = "`0`"]
35    #[inline(always)]
36    pub fn is_only_multicast(&self) -> bool {
37        *self == RX_PAUSE_FRM_MD_A::ONLY_MULTICAST
38    }
39    #[doc = "`1`"]
40    #[inline(always)]
41    pub fn is_also_unicast_mac0(&self) -> bool {
42        *self == RX_PAUSE_FRM_MD_A::ALSO_UNICAST_MAC0
43    }
44}
45#[doc = "Field `rx_pause_frm_md` writer - "]
46pub type RX_PAUSE_FRM_MD_W<'a, REG> = crate::BitWriter<'a, REG, RX_PAUSE_FRM_MD_A>;
47impl<'a, REG> RX_PAUSE_FRM_MD_W<'a, REG>
48where
49    REG: crate::Writable + crate::RegisterSpec,
50{
51    #[doc = "`0`"]
52    #[inline(always)]
53    pub fn only_multicast(self) -> &'a mut crate::W<REG> {
54        self.variant(RX_PAUSE_FRM_MD_A::ONLY_MULTICAST)
55    }
56    #[doc = "`1`"]
57    #[inline(always)]
58    pub fn also_unicast_mac0(self) -> &'a mut crate::W<REG> {
59        self.variant(RX_PAUSE_FRM_MD_A::ALSO_UNICAST_MAC0)
60    }
61}
62#[doc = "Field `check_crc` reader - Check CRC Enable"]
63pub type CHECK_CRC_R = crate::BitReader<CHECK_CRC_A>;
64#[doc = "Check CRC Enable\n\nValue on reset: 0"]
65#[derive(Clone, Copy, Debug, PartialEq, Eq)]
66pub enum CHECK_CRC_A {
67    #[doc = "0: `0`"]
68    DISABLE = 0,
69    #[doc = "1: `1`"]
70    CHECK = 1,
71}
72impl From<CHECK_CRC_A> for bool {
73    #[inline(always)]
74    fn from(variant: CHECK_CRC_A) -> Self {
75        variant as u8 != 0
76    }
77}
78impl CHECK_CRC_R {
79    #[doc = "Get enumerated values variant"]
80    #[inline(always)]
81    pub const fn variant(&self) -> CHECK_CRC_A {
82        match self.bits {
83            false => CHECK_CRC_A::DISABLE,
84            true => CHECK_CRC_A::CHECK,
85        }
86    }
87    #[doc = "`0`"]
88    #[inline(always)]
89    pub fn is_disable(&self) -> bool {
90        *self == CHECK_CRC_A::DISABLE
91    }
92    #[doc = "`1`"]
93    #[inline(always)]
94    pub fn is_check(&self) -> bool {
95        *self == CHECK_CRC_A::CHECK
96    }
97}
98#[doc = "Field `check_crc` writer - Check CRC Enable"]
99pub type CHECK_CRC_W<'a, REG> = crate::BitWriter<'a, REG, CHECK_CRC_A>;
100impl<'a, REG> CHECK_CRC_W<'a, REG>
101where
102    REG: crate::Writable + crate::RegisterSpec,
103{
104    #[doc = "`0`"]
105    #[inline(always)]
106    pub fn disable(self) -> &'a mut crate::W<REG> {
107        self.variant(CHECK_CRC_A::DISABLE)
108    }
109    #[doc = "`1`"]
110    #[inline(always)]
111    pub fn check(self) -> &'a mut crate::W<REG> {
112        self.variant(CHECK_CRC_A::CHECK)
113    }
114}
115#[doc = "Field `strip_fcs` reader - "]
116pub type STRIP_FCS_R = crate::BitReader;
117#[doc = "Field `strip_fcs` writer - "]
118pub type STRIP_FCS_W<'a, REG> = crate::BitWriter<'a, REG>;
119#[doc = "Field `jumbo_frm_en` reader - Jumbo Frame Enable"]
120pub type JUMBO_FRM_EN_R = crate::BitReader<JUMBO_FRM_EN_A>;
121#[doc = "Jumbo Frame Enable\n\nValue on reset: 0"]
122#[derive(Clone, Copy, Debug, PartialEq, Eq)]
123pub enum JUMBO_FRM_EN_A {
124    #[doc = "0: `0`"]
125    DISABLE = 0,
126    #[doc = "1: `1`"]
127    ENABLE = 1,
128}
129impl From<JUMBO_FRM_EN_A> for bool {
130    #[inline(always)]
131    fn from(variant: JUMBO_FRM_EN_A) -> Self {
132        variant as u8 != 0
133    }
134}
135impl JUMBO_FRM_EN_R {
136    #[doc = "Get enumerated values variant"]
137    #[inline(always)]
138    pub const fn variant(&self) -> JUMBO_FRM_EN_A {
139        match self.bits {
140            false => JUMBO_FRM_EN_A::DISABLE,
141            true => JUMBO_FRM_EN_A::ENABLE,
142        }
143    }
144    #[doc = "`0`"]
145    #[inline(always)]
146    pub fn is_disable(&self) -> bool {
147        *self == JUMBO_FRM_EN_A::DISABLE
148    }
149    #[doc = "`1`"]
150    #[inline(always)]
151    pub fn is_enable(&self) -> bool {
152        *self == JUMBO_FRM_EN_A::ENABLE
153    }
154}
155#[doc = "Field `jumbo_frm_en` writer - Jumbo Frame Enable"]
156pub type JUMBO_FRM_EN_W<'a, REG> = crate::BitWriter<'a, REG, JUMBO_FRM_EN_A>;
157impl<'a, REG> JUMBO_FRM_EN_W<'a, REG>
158where
159    REG: crate::Writable + crate::RegisterSpec,
160{
161    #[doc = "`0`"]
162    #[inline(always)]
163    pub fn disable(self) -> &'a mut crate::W<REG> {
164        self.variant(JUMBO_FRM_EN_A::DISABLE)
165    }
166    #[doc = "`1`"]
167    #[inline(always)]
168    pub fn enable(self) -> &'a mut crate::W<REG> {
169        self.variant(JUMBO_FRM_EN_A::ENABLE)
170    }
171}
172#[doc = "Field `rx_frm_len_ctl` reader - Frame Receive Length Control"]
173pub type RX_FRM_LEN_CTL_R = crate::BitReader<RX_FRM_LEN_CTL_A>;
174#[doc = "Frame Receive Length Control\n\nValue on reset: 0"]
175#[derive(Clone, Copy, Debug, PartialEq, Eq)]
176pub enum RX_FRM_LEN_CTL_A {
177    #[doc = "0: `0`"]
178    B2048 = 0,
179    #[doc = "1: `1`"]
180    B16384 = 1,
181}
182impl From<RX_FRM_LEN_CTL_A> for bool {
183    #[inline(always)]
184    fn from(variant: RX_FRM_LEN_CTL_A) -> Self {
185        variant as u8 != 0
186    }
187}
188impl RX_FRM_LEN_CTL_R {
189    #[doc = "Get enumerated values variant"]
190    #[inline(always)]
191    pub const fn variant(&self) -> RX_FRM_LEN_CTL_A {
192        match self.bits {
193            false => RX_FRM_LEN_CTL_A::B2048,
194            true => RX_FRM_LEN_CTL_A::B16384,
195        }
196    }
197    #[doc = "`0`"]
198    #[inline(always)]
199    pub fn is_b2048(&self) -> bool {
200        *self == RX_FRM_LEN_CTL_A::B2048
201    }
202    #[doc = "`1`"]
203    #[inline(always)]
204    pub fn is_b16384(&self) -> bool {
205        *self == RX_FRM_LEN_CTL_A::B16384
206    }
207}
208#[doc = "Field `rx_frm_len_ctl` writer - Frame Receive Length Control"]
209pub type RX_FRM_LEN_CTL_W<'a, REG> = crate::BitWriter<'a, REG, RX_FRM_LEN_CTL_A>;
210impl<'a, REG> RX_FRM_LEN_CTL_W<'a, REG>
211where
212    REG: crate::Writable + crate::RegisterSpec,
213{
214    #[doc = "`0`"]
215    #[inline(always)]
216    pub fn b2048(self) -> &'a mut crate::W<REG> {
217        self.variant(RX_FRM_LEN_CTL_A::B2048)
218    }
219    #[doc = "`1`"]
220    #[inline(always)]
221    pub fn b16384(self) -> &'a mut crate::W<REG> {
222        self.variant(RX_FRM_LEN_CTL_A::B16384)
223    }
224}
225#[doc = "Field `rx_en` reader - Enable Receiver"]
226pub type RX_EN_R = crate::BitReader<RX_EN_A>;
227#[doc = "Enable Receiver\n\nValue on reset: 0"]
228#[derive(Clone, Copy, Debug, PartialEq, Eq)]
229pub enum RX_EN_A {
230    #[doc = "0: `0`"]
231    DISABLE = 0,
232    #[doc = "1: `1`"]
233    ENABLE = 1,
234}
235impl From<RX_EN_A> for bool {
236    #[inline(always)]
237    fn from(variant: RX_EN_A) -> Self {
238        variant as u8 != 0
239    }
240}
241impl RX_EN_R {
242    #[doc = "Get enumerated values variant"]
243    #[inline(always)]
244    pub const fn variant(&self) -> RX_EN_A {
245        match self.bits {
246            false => RX_EN_A::DISABLE,
247            true => RX_EN_A::ENABLE,
248        }
249    }
250    #[doc = "`0`"]
251    #[inline(always)]
252    pub fn is_disable(&self) -> bool {
253        *self == RX_EN_A::DISABLE
254    }
255    #[doc = "`1`"]
256    #[inline(always)]
257    pub fn is_enable(&self) -> bool {
258        *self == RX_EN_A::ENABLE
259    }
260}
261#[doc = "Field `rx_en` writer - Enable Receiver"]
262pub type RX_EN_W<'a, REG> = crate::BitWriter<'a, REG, RX_EN_A>;
263impl<'a, REG> RX_EN_W<'a, REG>
264where
265    REG: crate::Writable + crate::RegisterSpec,
266{
267    #[doc = "`0`"]
268    #[inline(always)]
269    pub fn disable(self) -> &'a mut crate::W<REG> {
270        self.variant(RX_EN_A::DISABLE)
271    }
272    #[doc = "`1`"]
273    #[inline(always)]
274    pub fn enable(self) -> &'a mut crate::W<REG> {
275        self.variant(RX_EN_A::ENABLE)
276    }
277}
278impl R {
279    #[doc = "Bit 16"]
280    #[inline(always)]
281    pub fn rx_flow_ctl_en(&self) -> RX_FLOW_CTL_EN_R {
282        RX_FLOW_CTL_EN_R::new(((self.bits >> 16) & 1) != 0)
283    }
284    #[doc = "Bit 17"]
285    #[inline(always)]
286    pub fn rx_pause_frm_md(&self) -> RX_PAUSE_FRM_MD_R {
287        RX_PAUSE_FRM_MD_R::new(((self.bits >> 17) & 1) != 0)
288    }
289    #[doc = "Bit 27 - Check CRC Enable"]
290    #[inline(always)]
291    pub fn check_crc(&self) -> CHECK_CRC_R {
292        CHECK_CRC_R::new(((self.bits >> 27) & 1) != 0)
293    }
294    #[doc = "Bit 28"]
295    #[inline(always)]
296    pub fn strip_fcs(&self) -> STRIP_FCS_R {
297        STRIP_FCS_R::new(((self.bits >> 28) & 1) != 0)
298    }
299    #[doc = "Bit 29 - Jumbo Frame Enable"]
300    #[inline(always)]
301    pub fn jumbo_frm_en(&self) -> JUMBO_FRM_EN_R {
302        JUMBO_FRM_EN_R::new(((self.bits >> 29) & 1) != 0)
303    }
304    #[doc = "Bit 30 - Frame Receive Length Control"]
305    #[inline(always)]
306    pub fn rx_frm_len_ctl(&self) -> RX_FRM_LEN_CTL_R {
307        RX_FRM_LEN_CTL_R::new(((self.bits >> 30) & 1) != 0)
308    }
309    #[doc = "Bit 31 - Enable Receiver"]
310    #[inline(always)]
311    pub fn rx_en(&self) -> RX_EN_R {
312        RX_EN_R::new(((self.bits >> 31) & 1) != 0)
313    }
314}
315impl W {
316    #[doc = "Bit 16"]
317    #[inline(always)]
318    #[must_use]
319    pub fn rx_flow_ctl_en(&mut self) -> RX_FLOW_CTL_EN_W<EMAC_RX_CTL0_SPEC> {
320        RX_FLOW_CTL_EN_W::new(self, 16)
321    }
322    #[doc = "Bit 17"]
323    #[inline(always)]
324    #[must_use]
325    pub fn rx_pause_frm_md(&mut self) -> RX_PAUSE_FRM_MD_W<EMAC_RX_CTL0_SPEC> {
326        RX_PAUSE_FRM_MD_W::new(self, 17)
327    }
328    #[doc = "Bit 27 - Check CRC Enable"]
329    #[inline(always)]
330    #[must_use]
331    pub fn check_crc(&mut self) -> CHECK_CRC_W<EMAC_RX_CTL0_SPEC> {
332        CHECK_CRC_W::new(self, 27)
333    }
334    #[doc = "Bit 28"]
335    #[inline(always)]
336    #[must_use]
337    pub fn strip_fcs(&mut self) -> STRIP_FCS_W<EMAC_RX_CTL0_SPEC> {
338        STRIP_FCS_W::new(self, 28)
339    }
340    #[doc = "Bit 29 - Jumbo Frame Enable"]
341    #[inline(always)]
342    #[must_use]
343    pub fn jumbo_frm_en(&mut self) -> JUMBO_FRM_EN_W<EMAC_RX_CTL0_SPEC> {
344        JUMBO_FRM_EN_W::new(self, 29)
345    }
346    #[doc = "Bit 30 - Frame Receive Length Control"]
347    #[inline(always)]
348    #[must_use]
349    pub fn rx_frm_len_ctl(&mut self) -> RX_FRM_LEN_CTL_W<EMAC_RX_CTL0_SPEC> {
350        RX_FRM_LEN_CTL_W::new(self, 30)
351    }
352    #[doc = "Bit 31 - Enable Receiver"]
353    #[inline(always)]
354    #[must_use]
355    pub fn rx_en(&mut self) -> RX_EN_W<EMAC_RX_CTL0_SPEC> {
356        RX_EN_W::new(self, 31)
357    }
358    #[doc = r" Writes raw bits to the register."]
359    #[doc = r""]
360    #[doc = r" # Safety"]
361    #[doc = r""]
362    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
363    #[inline(always)]
364    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
365        self.bits = bits;
366        self
367    }
368}
369#[doc = "EMAC Receive Control Register0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`emac_rx_ctl0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`emac_rx_ctl0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
370pub struct EMAC_RX_CTL0_SPEC;
371impl crate::RegisterSpec for EMAC_RX_CTL0_SPEC {
372    type Ux = u32;
373}
374#[doc = "`read()` method returns [`emac_rx_ctl0::R`](R) reader structure"]
375impl crate::Readable for EMAC_RX_CTL0_SPEC {}
376#[doc = "`write(|w| ..)` method takes [`emac_rx_ctl0::W`](W) writer structure"]
377impl crate::Writable for EMAC_RX_CTL0_SPEC {
378    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
379    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
380}
381#[doc = "`reset()` method sets emac_rx_ctl0 to value 0"]
382impl crate::Resettable for EMAC_RX_CTL0_SPEC {
383    const RESET_VALUE: Self::Ux = 0;
384}
d1_pac/emac/emac_rx_ctl0.rs

d1_pac/emac/
emac_rx_ctl0.rs
