d1_pac/emac/
emac_rgmii_sta.rs

1#[doc = "Register `emac_rgmii_sta` reader"]
2pub type R = crate::R<EMAC_RGMII_STA_SPEC>;
3#[doc = "Register `emac_rgmii_sta` writer"]
4pub type W = crate::W<EMAC_RGMII_STA_SPEC>;
5#[doc = "Field `rgmii_link_md` reader - The link mode of the RGMII interface"]
6pub type RGMII_LINK_MD_R = crate::BitReader<RGMII_LINK_MD_A>;
7#[doc = "The link mode of the RGMII interface\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum RGMII_LINK_MD_A {
10    #[doc = "0: `0`"]
11    HALF_DUPLEX = 0,
12    #[doc = "1: `1`"]
13    FULL_DUPLEX = 1,
14}
15impl From<RGMII_LINK_MD_A> for bool {
16    #[inline(always)]
17    fn from(variant: RGMII_LINK_MD_A) -> Self {
18        variant as u8 != 0
19    }
20}
21impl RGMII_LINK_MD_R {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> RGMII_LINK_MD_A {
25        match self.bits {
26            false => RGMII_LINK_MD_A::HALF_DUPLEX,
27            true => RGMII_LINK_MD_A::FULL_DUPLEX,
28        }
29    }
30    #[doc = "`0`"]
31    #[inline(always)]
32    pub fn is_half_duplex(&self) -> bool {
33        *self == RGMII_LINK_MD_A::HALF_DUPLEX
34    }
35    #[doc = "`1`"]
36    #[inline(always)]
37    pub fn is_full_duplex(&self) -> bool {
38        *self == RGMII_LINK_MD_A::FULL_DUPLEX
39    }
40}
41#[doc = "Field `rgmii_link_md` writer - The link mode of the RGMII interface"]
42pub type RGMII_LINK_MD_W<'a, REG> = crate::BitWriter<'a, REG, RGMII_LINK_MD_A>;
43impl<'a, REG> RGMII_LINK_MD_W<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    #[doc = "`0`"]
48    #[inline(always)]
49    pub fn half_duplex(self) -> &'a mut crate::W<REG> {
50        self.variant(RGMII_LINK_MD_A::HALF_DUPLEX)
51    }
52    #[doc = "`1`"]
53    #[inline(always)]
54    pub fn full_duplex(self) -> &'a mut crate::W<REG> {
55        self.variant(RGMII_LINK_MD_A::FULL_DUPLEX)
56    }
57}
58#[doc = "Field `rgmii_link_spd` reader - The link speed of the RGMII interface"]
59pub type RGMII_LINK_SPD_R = crate::FieldReader<RGMII_LINK_SPD_A>;
60#[doc = "The link speed of the RGMII interface\n\nValue on reset: 0"]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62#[repr(u8)]
63pub enum RGMII_LINK_SPD_A {
64    #[doc = "0: `0`"]
65    S2_5 = 0,
66    #[doc = "1: `1`"]
67    S25 = 1,
68    #[doc = "2: `10`"]
69    S125 = 2,
70}
71impl From<RGMII_LINK_SPD_A> for u8 {
72    #[inline(always)]
73    fn from(variant: RGMII_LINK_SPD_A) -> Self {
74        variant as _
75    }
76}
77impl crate::FieldSpec for RGMII_LINK_SPD_A {
78    type Ux = u8;
79}
80impl RGMII_LINK_SPD_R {
81    #[doc = "Get enumerated values variant"]
82    #[inline(always)]
83    pub const fn variant(&self) -> Option<RGMII_LINK_SPD_A> {
84        match self.bits {
85            0 => Some(RGMII_LINK_SPD_A::S2_5),
86            1 => Some(RGMII_LINK_SPD_A::S25),
87            2 => Some(RGMII_LINK_SPD_A::S125),
88            _ => None,
89        }
90    }
91    #[doc = "`0`"]
92    #[inline(always)]
93    pub fn is_s2_5(&self) -> bool {
94        *self == RGMII_LINK_SPD_A::S2_5
95    }
96    #[doc = "`1`"]
97    #[inline(always)]
98    pub fn is_s25(&self) -> bool {
99        *self == RGMII_LINK_SPD_A::S25
100    }
101    #[doc = "`10`"]
102    #[inline(always)]
103    pub fn is_s125(&self) -> bool {
104        *self == RGMII_LINK_SPD_A::S125
105    }
106}
107#[doc = "Field `rgmii_link_spd` writer - The link speed of the RGMII interface"]
108pub type RGMII_LINK_SPD_W<'a, REG> = crate::FieldWriter<'a, REG, 2, RGMII_LINK_SPD_A>;
109impl<'a, REG> RGMII_LINK_SPD_W<'a, REG>
110where
111    REG: crate::Writable + crate::RegisterSpec,
112    REG::Ux: From<u8>,
113{
114    #[doc = "`0`"]
115    #[inline(always)]
116    pub fn s2_5(self) -> &'a mut crate::W<REG> {
117        self.variant(RGMII_LINK_SPD_A::S2_5)
118    }
119    #[doc = "`1`"]
120    #[inline(always)]
121    pub fn s25(self) -> &'a mut crate::W<REG> {
122        self.variant(RGMII_LINK_SPD_A::S25)
123    }
124    #[doc = "`10`"]
125    #[inline(always)]
126    pub fn s125(self) -> &'a mut crate::W<REG> {
127        self.variant(RGMII_LINK_SPD_A::S125)
128    }
129}
130#[doc = "Field `rgmii_link` reader - The link status of the RGMII interface"]
131pub type RGMII_LINK_R = crate::BitReader<RGMII_LINK_A>;
132#[doc = "The link status of the RGMII interface\n\nValue on reset: 0"]
133#[derive(Clone, Copy, Debug, PartialEq, Eq)]
134pub enum RGMII_LINK_A {
135    #[doc = "0: `0`"]
136    DOWN = 0,
137    #[doc = "1: `1`"]
138    UP = 1,
139}
140impl From<RGMII_LINK_A> for bool {
141    #[inline(always)]
142    fn from(variant: RGMII_LINK_A) -> Self {
143        variant as u8 != 0
144    }
145}
146impl RGMII_LINK_R {
147    #[doc = "Get enumerated values variant"]
148    #[inline(always)]
149    pub const fn variant(&self) -> RGMII_LINK_A {
150        match self.bits {
151            false => RGMII_LINK_A::DOWN,
152            true => RGMII_LINK_A::UP,
153        }
154    }
155    #[doc = "`0`"]
156    #[inline(always)]
157    pub fn is_down(&self) -> bool {
158        *self == RGMII_LINK_A::DOWN
159    }
160    #[doc = "`1`"]
161    #[inline(always)]
162    pub fn is_up(&self) -> bool {
163        *self == RGMII_LINK_A::UP
164    }
165}
166#[doc = "Field `rgmii_link` writer - The link status of the RGMII interface"]
167pub type RGMII_LINK_W<'a, REG> = crate::BitWriter<'a, REG, RGMII_LINK_A>;
168impl<'a, REG> RGMII_LINK_W<'a, REG>
169where
170    REG: crate::Writable + crate::RegisterSpec,
171{
172    #[doc = "`0`"]
173    #[inline(always)]
174    pub fn down(self) -> &'a mut crate::W<REG> {
175        self.variant(RGMII_LINK_A::DOWN)
176    }
177    #[doc = "`1`"]
178    #[inline(always)]
179    pub fn up(self) -> &'a mut crate::W<REG> {
180        self.variant(RGMII_LINK_A::UP)
181    }
182}
183impl R {
184    #[doc = "Bit 0 - The link mode of the RGMII interface"]
185    #[inline(always)]
186    pub fn rgmii_link_md(&self) -> RGMII_LINK_MD_R {
187        RGMII_LINK_MD_R::new((self.bits & 1) != 0)
188    }
189    #[doc = "Bits 1:2 - The link speed of the RGMII interface"]
190    #[inline(always)]
191    pub fn rgmii_link_spd(&self) -> RGMII_LINK_SPD_R {
192        RGMII_LINK_SPD_R::new(((self.bits >> 1) & 3) as u8)
193    }
194    #[doc = "Bit 3 - The link status of the RGMII interface"]
195    #[inline(always)]
196    pub fn rgmii_link(&self) -> RGMII_LINK_R {
197        RGMII_LINK_R::new(((self.bits >> 3) & 1) != 0)
198    }
199}
200impl W {
201    #[doc = "Bit 0 - The link mode of the RGMII interface"]
202    #[inline(always)]
203    #[must_use]
204    pub fn rgmii_link_md(&mut self) -> RGMII_LINK_MD_W<EMAC_RGMII_STA_SPEC> {
205        RGMII_LINK_MD_W::new(self, 0)
206    }
207    #[doc = "Bits 1:2 - The link speed of the RGMII interface"]
208    #[inline(always)]
209    #[must_use]
210    pub fn rgmii_link_spd(&mut self) -> RGMII_LINK_SPD_W<EMAC_RGMII_STA_SPEC> {
211        RGMII_LINK_SPD_W::new(self, 1)
212    }
213    #[doc = "Bit 3 - The link status of the RGMII interface"]
214    #[inline(always)]
215    #[must_use]
216    pub fn rgmii_link(&mut self) -> RGMII_LINK_W<EMAC_RGMII_STA_SPEC> {
217        RGMII_LINK_W::new(self, 3)
218    }
219    #[doc = r" Writes raw bits to the register."]
220    #[doc = r""]
221    #[doc = r" # Safety"]
222    #[doc = r""]
223    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
224    #[inline(always)]
225    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
226        self.bits = bits;
227        self
228    }
229}
230#[doc = "EMAC RGMII Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`emac_rgmii_sta::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`emac_rgmii_sta::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
231pub struct EMAC_RGMII_STA_SPEC;
232impl crate::RegisterSpec for EMAC_RGMII_STA_SPEC {
233    type Ux = u32;
234}
235#[doc = "`read()` method returns [`emac_rgmii_sta::R`](R) reader structure"]
236impl crate::Readable for EMAC_RGMII_STA_SPEC {}
237#[doc = "`write(|w| ..)` method takes [`emac_rgmii_sta::W`](W) writer structure"]
238impl crate::Writable for EMAC_RGMII_STA_SPEC {
239    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
240    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
241}
242#[doc = "`reset()` method sets emac_rgmii_sta to value 0"]
243impl crate::Resettable for EMAC_RGMII_STA_SPEC {
244    const RESET_VALUE: Self::Ux = 0;
245}
d1_pac/emac/emac_rgmii_sta.rs

d1_pac/emac/
emac_rgmii_sta.rs
