d1_pac/emac/
emac_basic_ctl1.rs

1#[doc = "Register `emac_basic_ctl1` reader"]
2pub type R = crate::R<EMAC_BASIC_CTL1_SPEC>;
3#[doc = "Register `emac_basic_ctl1` writer"]
4pub type W = crate::W<EMAC_BASIC_CTL1_SPEC>;
5#[doc = "Field `soft_rst` reader - Soft Reset all Registers and Logic"]
6pub type SOFT_RST_R = crate::BitReader<SOFT_RST_A>;
7#[doc = "Soft Reset all Registers and Logic\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum SOFT_RST_A {
10    #[doc = "0: `0`"]
11    NO_VALID = 0,
12    #[doc = "1: `1`"]
13    RESET = 1,
14}
15impl From<SOFT_RST_A> for bool {
16    #[inline(always)]
17    fn from(variant: SOFT_RST_A) -> Self {
18        variant as u8 != 0
19    }
20}
21impl SOFT_RST_R {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> SOFT_RST_A {
25        match self.bits {
26            false => SOFT_RST_A::NO_VALID,
27            true => SOFT_RST_A::RESET,
28        }
29    }
30    #[doc = "`0`"]
31    #[inline(always)]
32    pub fn is_no_valid(&self) -> bool {
33        *self == SOFT_RST_A::NO_VALID
34    }
35    #[doc = "`1`"]
36    #[inline(always)]
37    pub fn is_reset(&self) -> bool {
38        *self == SOFT_RST_A::RESET
39    }
40}
41#[doc = "Field `soft_rst` writer - Soft Reset all Registers and Logic"]
42pub type SOFT_RST_W<'a, REG> = crate::BitWriter<'a, REG, SOFT_RST_A>;
43impl<'a, REG> SOFT_RST_W<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    #[doc = "`0`"]
48    #[inline(always)]
49    pub fn no_valid(self) -> &'a mut crate::W<REG> {
50        self.variant(SOFT_RST_A::NO_VALID)
51    }
52    #[doc = "`1`"]
53    #[inline(always)]
54    pub fn reset(self) -> &'a mut crate::W<REG> {
55        self.variant(SOFT_RST_A::RESET)
56    }
57}
58#[doc = "Field `rx_tx_pri` reader - RX TX DMA Priority"]
59pub type RX_TX_PRI_R = crate::BitReader<RX_TX_PRI_A>;
60#[doc = "RX TX DMA Priority\n\nValue on reset: 0"]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum RX_TX_PRI_A {
63    #[doc = "0: `0`"]
64    SAME = 0,
65    #[doc = "1: `1`"]
66    RO_T = 1,
67}
68impl From<RX_TX_PRI_A> for bool {
69    #[inline(always)]
70    fn from(variant: RX_TX_PRI_A) -> Self {
71        variant as u8 != 0
72    }
73}
74impl RX_TX_PRI_R {
75    #[doc = "Get enumerated values variant"]
76    #[inline(always)]
77    pub const fn variant(&self) -> RX_TX_PRI_A {
78        match self.bits {
79            false => RX_TX_PRI_A::SAME,
80            true => RX_TX_PRI_A::RO_T,
81        }
82    }
83    #[doc = "`0`"]
84    #[inline(always)]
85    pub fn is_same(&self) -> bool {
86        *self == RX_TX_PRI_A::SAME
87    }
88    #[doc = "`1`"]
89    #[inline(always)]
90    pub fn is_ro_t(&self) -> bool {
91        *self == RX_TX_PRI_A::RO_T
92    }
93}
94#[doc = "Field `rx_tx_pri` writer - RX TX DMA Priority"]
95pub type RX_TX_PRI_W<'a, REG> = crate::BitWriter<'a, REG, RX_TX_PRI_A>;
96impl<'a, REG> RX_TX_PRI_W<'a, REG>
97where
98    REG: crate::Writable + crate::RegisterSpec,
99{
100    #[doc = "`0`"]
101    #[inline(always)]
102    pub fn same(self) -> &'a mut crate::W<REG> {
103        self.variant(RX_TX_PRI_A::SAME)
104    }
105    #[doc = "`1`"]
106    #[inline(always)]
107    pub fn ro_t(self) -> &'a mut crate::W<REG> {
108        self.variant(RX_TX_PRI_A::RO_T)
109    }
110}
111#[doc = "Field `burst_len` reader - The burst length of RX and TX DMA transfer"]
112pub type BURST_LEN_R = crate::FieldReader;
113#[doc = "Field `burst_len` writer - The burst length of RX and TX DMA transfer"]
114pub type BURST_LEN_W<'a, REG> = crate::FieldWriter<'a, REG, 6>;
115impl R {
116    #[doc = "Bit 0 - Soft Reset all Registers and Logic"]
117    #[inline(always)]
118    pub fn soft_rst(&self) -> SOFT_RST_R {
119        SOFT_RST_R::new((self.bits & 1) != 0)
120    }
121    #[doc = "Bit 1 - RX TX DMA Priority"]
122    #[inline(always)]
123    pub fn rx_tx_pri(&self) -> RX_TX_PRI_R {
124        RX_TX_PRI_R::new(((self.bits >> 1) & 1) != 0)
125    }
126    #[doc = "Bits 24:29 - The burst length of RX and TX DMA transfer"]
127    #[inline(always)]
128    pub fn burst_len(&self) -> BURST_LEN_R {
129        BURST_LEN_R::new(((self.bits >> 24) & 0x3f) as u8)
130    }
131}
132impl W {
133    #[doc = "Bit 0 - Soft Reset all Registers and Logic"]
134    #[inline(always)]
135    #[must_use]
136    pub fn soft_rst(&mut self) -> SOFT_RST_W<EMAC_BASIC_CTL1_SPEC> {
137        SOFT_RST_W::new(self, 0)
138    }
139    #[doc = "Bit 1 - RX TX DMA Priority"]
140    #[inline(always)]
141    #[must_use]
142    pub fn rx_tx_pri(&mut self) -> RX_TX_PRI_W<EMAC_BASIC_CTL1_SPEC> {
143        RX_TX_PRI_W::new(self, 1)
144    }
145    #[doc = "Bits 24:29 - The burst length of RX and TX DMA transfer"]
146    #[inline(always)]
147    #[must_use]
148    pub fn burst_len(&mut self) -> BURST_LEN_W<EMAC_BASIC_CTL1_SPEC> {
149        BURST_LEN_W::new(self, 24)
150    }
151    #[doc = r" Writes raw bits to the register."]
152    #[doc = r""]
153    #[doc = r" # Safety"]
154    #[doc = r""]
155    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
156    #[inline(always)]
157    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
158        self.bits = bits;
159        self
160    }
161}
162#[doc = "EMAC Basic Control Register1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`emac_basic_ctl1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`emac_basic_ctl1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
163pub struct EMAC_BASIC_CTL1_SPEC;
164impl crate::RegisterSpec for EMAC_BASIC_CTL1_SPEC {
165    type Ux = u32;
166}
167#[doc = "`read()` method returns [`emac_basic_ctl1::R`](R) reader structure"]
168impl crate::Readable for EMAC_BASIC_CTL1_SPEC {}
169#[doc = "`write(|w| ..)` method takes [`emac_basic_ctl1::W`](W) writer structure"]
170impl crate::Writable for EMAC_BASIC_CTL1_SPEC {
171    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
172    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
173}
174#[doc = "`reset()` method sets emac_basic_ctl1 to value 0"]
175impl crate::Resettable for EMAC_BASIC_CTL1_SPEC {
176    const RESET_VALUE: Self::Ux = 0;
177}
d1_pac/emac/emac_basic_ctl1.rs

d1_pac/emac/
emac_basic_ctl1.rs
