d1_pac/dsp_msgbox/msgbox/
msgbox_wr_int_threshold.rs

1#[doc = "Register `msgbox_wr_int_threshold%s` reader"]
2pub type R = crate::R<MSGBOX_WR_INT_THRESHOLD_SPEC>;
3#[doc = "Register `msgbox_wr_int_threshold%s` writer"]
4pub type W = crate::W<MSGBOX_WR_INT_THRESHOLD_SPEC>;
5#[doc = "Field `msg_wr_int_threshold_cfg` reader - Configure the FIFO empty level to trigger the write interrupt for user1"]
6pub type MSG_WR_INT_THRESHOLD_CFG_R = crate::FieldReader<MSG_WR_INT_THRESHOLD_CFG_A>;
7#[doc = "Configure the FIFO empty level to trigger the write interrupt for user1\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9#[repr(u8)]
10pub enum MSG_WR_INT_THRESHOLD_CFG_A {
11    #[doc = "0: `0`"]
12    T1 = 0,
13    #[doc = "1: `1`"]
14    T2 = 1,
15    #[doc = "2: `10`"]
16    T4 = 2,
17    #[doc = "3: `11`"]
18    T8 = 3,
19}
20impl From<MSG_WR_INT_THRESHOLD_CFG_A> for u8 {
21    #[inline(always)]
22    fn from(variant: MSG_WR_INT_THRESHOLD_CFG_A) -> Self {
23        variant as _
24    }
25}
26impl crate::FieldSpec for MSG_WR_INT_THRESHOLD_CFG_A {
27    type Ux = u8;
28}
29impl MSG_WR_INT_THRESHOLD_CFG_R {
30    #[doc = "Get enumerated values variant"]
31    #[inline(always)]
32    pub const fn variant(&self) -> MSG_WR_INT_THRESHOLD_CFG_A {
33        match self.bits {
34            0 => MSG_WR_INT_THRESHOLD_CFG_A::T1,
35            1 => MSG_WR_INT_THRESHOLD_CFG_A::T2,
36            2 => MSG_WR_INT_THRESHOLD_CFG_A::T4,
37            3 => MSG_WR_INT_THRESHOLD_CFG_A::T8,
38            _ => unreachable!(),
39        }
40    }
41    #[doc = "`0`"]
42    #[inline(always)]
43    pub fn is_t1(&self) -> bool {
44        *self == MSG_WR_INT_THRESHOLD_CFG_A::T1
45    }
46    #[doc = "`1`"]
47    #[inline(always)]
48    pub fn is_t2(&self) -> bool {
49        *self == MSG_WR_INT_THRESHOLD_CFG_A::T2
50    }
51    #[doc = "`10`"]
52    #[inline(always)]
53    pub fn is_t4(&self) -> bool {
54        *self == MSG_WR_INT_THRESHOLD_CFG_A::T4
55    }
56    #[doc = "`11`"]
57    #[inline(always)]
58    pub fn is_t8(&self) -> bool {
59        *self == MSG_WR_INT_THRESHOLD_CFG_A::T8
60    }
61}
62#[doc = "Field `msg_wr_int_threshold_cfg` writer - Configure the FIFO empty level to trigger the write interrupt for user1"]
63pub type MSG_WR_INT_THRESHOLD_CFG_W<'a, REG> =
64    crate::FieldWriterSafe<'a, REG, 2, MSG_WR_INT_THRESHOLD_CFG_A>;
65impl<'a, REG> MSG_WR_INT_THRESHOLD_CFG_W<'a, REG>
66where
67    REG: crate::Writable + crate::RegisterSpec,
68    REG::Ux: From<u8>,
69{
70    #[doc = "`0`"]
71    #[inline(always)]
72    pub fn t1(self) -> &'a mut crate::W<REG> {
73        self.variant(MSG_WR_INT_THRESHOLD_CFG_A::T1)
74    }
75    #[doc = "`1`"]
76    #[inline(always)]
77    pub fn t2(self) -> &'a mut crate::W<REG> {
78        self.variant(MSG_WR_INT_THRESHOLD_CFG_A::T2)
79    }
80    #[doc = "`10`"]
81    #[inline(always)]
82    pub fn t4(self) -> &'a mut crate::W<REG> {
83        self.variant(MSG_WR_INT_THRESHOLD_CFG_A::T4)
84    }
85    #[doc = "`11`"]
86    #[inline(always)]
87    pub fn t8(self) -> &'a mut crate::W<REG> {
88        self.variant(MSG_WR_INT_THRESHOLD_CFG_A::T8)
89    }
90}
91impl R {
92    #[doc = "Bits 0:1 - Configure the FIFO empty level to trigger the write interrupt for user1"]
93    #[inline(always)]
94    pub fn msg_wr_int_threshold_cfg(&self) -> MSG_WR_INT_THRESHOLD_CFG_R {
95        MSG_WR_INT_THRESHOLD_CFG_R::new((self.bits & 3) as u8)
96    }
97}
98impl W {
99    #[doc = "Bits 0:1 - Configure the FIFO empty level to trigger the write interrupt for user1"]
100    #[inline(always)]
101    #[must_use]
102    pub fn msg_wr_int_threshold_cfg(
103        &mut self,
104    ) -> MSG_WR_INT_THRESHOLD_CFG_W<MSGBOX_WR_INT_THRESHOLD_SPEC> {
105        MSG_WR_INT_THRESHOLD_CFG_W::new(self, 0)
106    }
107    #[doc = r" Writes raw bits to the register."]
108    #[doc = r""]
109    #[doc = r" # Safety"]
110    #[doc = r""]
111    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
112    #[inline(always)]
113    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
114        self.bits = bits;
115        self
116    }
117}
118#[doc = "Message Box Write Interrupt Threshold Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msgbox_wr_int_threshold::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msgbox_wr_int_threshold::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
119pub struct MSGBOX_WR_INT_THRESHOLD_SPEC;
120impl crate::RegisterSpec for MSGBOX_WR_INT_THRESHOLD_SPEC {
121    type Ux = u32;
122}
123#[doc = "`read()` method returns [`msgbox_wr_int_threshold::R`](R) reader structure"]
124impl crate::Readable for MSGBOX_WR_INT_THRESHOLD_SPEC {}
125#[doc = "`write(|w| ..)` method takes [`msgbox_wr_int_threshold::W`](W) writer structure"]
126impl crate::Writable for MSGBOX_WR_INT_THRESHOLD_SPEC {
127    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
128    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
129}
130#[doc = "`reset()` method sets msgbox_wr_int_threshold%s to value 0"]
131impl crate::Resettable for MSGBOX_WR_INT_THRESHOLD_SPEC {
132    const RESET_VALUE: Self::Ux = 0;
133}
d1_pac/dsp_msgbox/msgbox/msgbox_wr_int_threshold.rs

d1_pac/dsp_msgbox/msgbox/
msgbox_wr_int_threshold.rs
