d1_pac/csic/csic_top/
csic_mulf_mod.rs

1#[doc = "Register `csic_mulf_mod` reader"]
2pub type R = crate::R<CSIC_MULF_MOD_SPEC>;
3#[doc = "Register `csic_mulf_mod` writer"]
4pub type W = crate::W<CSIC_MULF_MOD_SPEC>;
5#[doc = "Field `mulf_en` reader - "]
6pub type MULF_EN_R = crate::BitReader;
7#[doc = "Field `mulf_en` writer - "]
8pub type MULF_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `mulf_cs` reader - "]
10pub type MULF_CS_R = crate::FieldReader;
11#[doc = "Field `mulf_cs` writer - "]
12pub type MULF_CS_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
13#[doc = "Field `mulf_status` reader - "]
14pub type MULF_STATUS_R = crate::FieldReader;
15impl R {
16    #[doc = "Bit 0"]
17    #[inline(always)]
18    pub fn mulf_en(&self) -> MULF_EN_R {
19        MULF_EN_R::new((self.bits & 1) != 0)
20    }
21    #[doc = "Bits 8:15"]
22    #[inline(always)]
23    pub fn mulf_cs(&self) -> MULF_CS_R {
24        MULF_CS_R::new(((self.bits >> 8) & 0xff) as u8)
25    }
26    #[doc = "Bits 24:31"]
27    #[inline(always)]
28    pub fn mulf_status(&self) -> MULF_STATUS_R {
29        MULF_STATUS_R::new(((self.bits >> 24) & 0xff) as u8)
30    }
31}
32impl W {
33    #[doc = "Bit 0"]
34    #[inline(always)]
35    #[must_use]
36    pub fn mulf_en(&mut self) -> MULF_EN_W<CSIC_MULF_MOD_SPEC> {
37        MULF_EN_W::new(self, 0)
38    }
39    #[doc = "Bits 8:15"]
40    #[inline(always)]
41    #[must_use]
42    pub fn mulf_cs(&mut self) -> MULF_CS_W<CSIC_MULF_MOD_SPEC> {
43        MULF_CS_W::new(self, 8)
44    }
45    #[doc = r" Writes raw bits to the register."]
46    #[doc = r""]
47    #[doc = r" # Safety"]
48    #[doc = r""]
49    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
50    #[inline(always)]
51    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
52        self.bits = bits;
53        self
54    }
55}
56#[doc = "CSIC Multi-Frame Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`csic_mulf_mod::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csic_mulf_mod::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
57pub struct CSIC_MULF_MOD_SPEC;
58impl crate::RegisterSpec for CSIC_MULF_MOD_SPEC {
59    type Ux = u32;
60}
61#[doc = "`read()` method returns [`csic_mulf_mod::R`](R) reader structure"]
62impl crate::Readable for CSIC_MULF_MOD_SPEC {}
63#[doc = "`write(|w| ..)` method takes [`csic_mulf_mod::W`](W) writer structure"]
64impl crate::Writable for CSIC_MULF_MOD_SPEC {
65    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
66    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
67}
68#[doc = "`reset()` method sets csic_mulf_mod to value 0"]
69impl crate::Resettable for CSIC_MULF_MOD_SPEC {
70    const RESET_VALUE: Self::Ux = 0;
71}
d1_pac/csic/csic_top/csic_mulf_mod.rs

d1_pac/csic/csic_top/
csic_mulf_mod.rs
