d1_pac/csic/csic_parser0/
prs_ch_infmt.rs

1#[doc = "Register `prs_ch%s_infmt` reader"]
2pub type R = crate::R<PRS_CH_INFMT_SPEC>;
3#[doc = "Register `prs_ch%s_infmt` writer"]
4pub type W = crate::W<PRS_CH_INFMT_SPEC>;
5#[doc = "Field `input_fmt` reader - input data format"]
6pub type INPUT_FMT_R = crate::FieldReader<INPUT_FMT_A>;
7#[doc = "input data format\n\nValue on reset: 3"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9#[repr(u8)]
10pub enum INPUT_FMT_A {
11    #[doc = "0: RAW stream"]
12    RAW = 0,
13    #[doc = "3: YUV422"]
14    YUV422 = 3,
15    #[doc = "4: YUV420"]
16    YUV420 = 4,
17}
18impl From<INPUT_FMT_A> for u8 {
19    #[inline(always)]
20    fn from(variant: INPUT_FMT_A) -> Self {
21        variant as _
22    }
23}
24impl crate::FieldSpec for INPUT_FMT_A {
25    type Ux = u8;
26}
27impl INPUT_FMT_R {
28    #[doc = "Get enumerated values variant"]
29    #[inline(always)]
30    pub const fn variant(&self) -> Option<INPUT_FMT_A> {
31        match self.bits {
32            0 => Some(INPUT_FMT_A::RAW),
33            3 => Some(INPUT_FMT_A::YUV422),
34            4 => Some(INPUT_FMT_A::YUV420),
35            _ => None,
36        }
37    }
38    #[doc = "RAW stream"]
39    #[inline(always)]
40    pub fn is_raw(&self) -> bool {
41        *self == INPUT_FMT_A::RAW
42    }
43    #[doc = "YUV422"]
44    #[inline(always)]
45    pub fn is_yuv422(&self) -> bool {
46        *self == INPUT_FMT_A::YUV422
47    }
48    #[doc = "YUV420"]
49    #[inline(always)]
50    pub fn is_yuv420(&self) -> bool {
51        *self == INPUT_FMT_A::YUV420
52    }
53}
54#[doc = "Field `input_fmt` writer - input data format"]
55pub type INPUT_FMT_W<'a, REG> = crate::FieldWriter<'a, REG, 4, INPUT_FMT_A>;
56impl<'a, REG> INPUT_FMT_W<'a, REG>
57where
58    REG: crate::Writable + crate::RegisterSpec,
59    REG::Ux: From<u8>,
60{
61    #[doc = "RAW stream"]
62    #[inline(always)]
63    pub fn raw(self) -> &'a mut crate::W<REG> {
64        self.variant(INPUT_FMT_A::RAW)
65    }
66    #[doc = "YUV422"]
67    #[inline(always)]
68    pub fn yuv422(self) -> &'a mut crate::W<REG> {
69        self.variant(INPUT_FMT_A::YUV422)
70    }
71    #[doc = "YUV420"]
72    #[inline(always)]
73    pub fn yuv420(self) -> &'a mut crate::W<REG> {
74        self.variant(INPUT_FMT_A::YUV420)
75    }
76}
77impl R {
78    #[doc = "Bits 0:3 - input data format"]
79    #[inline(always)]
80    pub fn input_fmt(&self) -> INPUT_FMT_R {
81        INPUT_FMT_R::new((self.bits & 0x0f) as u8)
82    }
83}
84impl W {
85    #[doc = "Bits 0:3 - input data format"]
86    #[inline(always)]
87    #[must_use]
88    pub fn input_fmt(&mut self) -> INPUT_FMT_W<PRS_CH_INFMT_SPEC> {
89        INPUT_FMT_W::new(self, 0)
90    }
91    #[doc = r" Writes raw bits to the register."]
92    #[doc = r""]
93    #[doc = r" # Safety"]
94    #[doc = r""]
95    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
96    #[inline(always)]
97    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
98        self.bits = bits;
99        self
100    }
101}
102#[doc = "Parser Channel\\[i\\] Input Format Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prs_ch_infmt::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prs_ch_infmt::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
103pub struct PRS_CH_INFMT_SPEC;
104impl crate::RegisterSpec for PRS_CH_INFMT_SPEC {
105    type Ux = u32;
106}
107#[doc = "`read()` method returns [`prs_ch_infmt::R`](R) reader structure"]
108impl crate::Readable for PRS_CH_INFMT_SPEC {}
109#[doc = "`write(|w| ..)` method takes [`prs_ch_infmt::W`](W) writer structure"]
110impl crate::Writable for PRS_CH_INFMT_SPEC {
111    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
112    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
113}
114#[doc = "`reset()` method sets prs_ch%s_infmt to value 0x03"]
115impl crate::Resettable for PRS_CH_INFMT_SPEC {
116    const RESET_VALUE: Self::Ux = 0x03;
117}
d1_pac/csic/csic_parser0/prs_ch_infmt.rs

d1_pac/csic/csic_parser0/
prs_ch_infmt.rs
