d1_pac/csic/csic_parser0/
prs_cap.rs1#[doc = "Register `prs_cap` reader"]
2pub type R = crate::R<PRS_CAP_SPEC>;
3#[doc = "Register `prs_cap` writer"]
4pub type W = crate::W<PRS_CAP_SPEC>;
5#[doc = "Field `ch_scap_on[0-3]` reader - Still capture control: Capture a single still image frame on channel \\[i\\].\n\nThe field is **cleared** (set to zero) following a read operation."]
6pub type CH_SCAP_ON_R = crate::BitReader<CH_SCAP_ON_A>;
7#[doc = "Still capture control: Capture a single still image frame on channel \\[i\\].\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum CH_SCAP_ON_A {
10 #[doc = "0: Disable still capture"]
11 DISABLE = 0,
12 #[doc = "1: Enable still capture\n\nThe CSI module starts capturing image data at the start of the next frame. The CSI module captures only one frame of image data. This bit is self cleared and always reads as a 0."]
13 ENABLE = 1,
14}
15impl From<CH_SCAP_ON_A> for bool {
16 #[inline(always)]
17 fn from(variant: CH_SCAP_ON_A) -> Self {
18 variant as u8 != 0
19 }
20}
21impl CH_SCAP_ON_R {
22 #[doc = "Get enumerated values variant"]
23 #[inline(always)]
24 pub const fn variant(&self) -> CH_SCAP_ON_A {
25 match self.bits {
26 false => CH_SCAP_ON_A::DISABLE,
27 true => CH_SCAP_ON_A::ENABLE,
28 }
29 }
30 #[doc = "Disable still capture"]
31 #[inline(always)]
32 pub fn is_disable(&self) -> bool {
33 *self == CH_SCAP_ON_A::DISABLE
34 }
35 #[doc = "Enable still capture\n\nThe CSI module starts capturing image data at the start of the next frame. The CSI module captures only one frame of image data. This bit is self cleared and always reads as a 0."]
36 #[inline(always)]
37 pub fn is_enable(&self) -> bool {
38 *self == CH_SCAP_ON_A::ENABLE
39 }
40}
41#[doc = "Field `ch_vcap_on[0-3]` reader - Video capture control: Capture the video image data stream on channel \\[i\\]."]
42pub type CH_VCAP_ON_R = crate::BitReader<CH_VCAP_ON_A>;
43#[doc = "Video capture control: Capture the video image data stream on channel \\[i\\].\n\nValue on reset: 0"]
44#[derive(Clone, Copy, Debug, PartialEq, Eq)]
45pub enum CH_VCAP_ON_A {
46 #[doc = "0: Disable video capture\n\nIf video capture is in progress, the CSI stops capturing image data at the end of the current frame, and all of the current frame data is written to output FIFO."]
47 DISABLE = 0,
48 #[doc = "1: Enable video capture\n\nThe CSI starts capturing image data at the start of the next frame."]
49 ENABLE = 1,
50}
51impl From<CH_VCAP_ON_A> for bool {
52 #[inline(always)]
53 fn from(variant: CH_VCAP_ON_A) -> Self {
54 variant as u8 != 0
55 }
56}
57impl CH_VCAP_ON_R {
58 #[doc = "Get enumerated values variant"]
59 #[inline(always)]
60 pub const fn variant(&self) -> CH_VCAP_ON_A {
61 match self.bits {
62 false => CH_VCAP_ON_A::DISABLE,
63 true => CH_VCAP_ON_A::ENABLE,
64 }
65 }
66 #[doc = "Disable video capture\n\nIf video capture is in progress, the CSI stops capturing image data at the end of the current frame, and all of the current frame data is written to output FIFO."]
67 #[inline(always)]
68 pub fn is_disable(&self) -> bool {
69 *self == CH_VCAP_ON_A::DISABLE
70 }
71 #[doc = "Enable video capture\n\nThe CSI starts capturing image data at the start of the next frame."]
72 #[inline(always)]
73 pub fn is_enable(&self) -> bool {
74 *self == CH_VCAP_ON_A::ENABLE
75 }
76}
77#[doc = "Field `ch_vcap_on[0-3]` writer - Video capture control: Capture the video image data stream on channel \\[i\\]."]
78pub type CH_VCAP_ON_W<'a, REG> = crate::BitWriter<'a, REG, CH_VCAP_ON_A>;
79impl<'a, REG> CH_VCAP_ON_W<'a, REG>
80where
81 REG: crate::Writable + crate::RegisterSpec,
82{
83 #[doc = "Disable video capture\n\nIf video capture is in progress, the CSI stops capturing image data at the end of the current frame, and all of the current frame data is written to output FIFO."]
84 #[inline(always)]
85 pub fn disable(self) -> &'a mut crate::W<REG> {
86 self.variant(CH_VCAP_ON_A::DISABLE)
87 }
88 #[doc = "Enable video capture\n\nThe CSI starts capturing image data at the start of the next frame."]
89 #[inline(always)]
90 pub fn enable(self) -> &'a mut crate::W<REG> {
91 self.variant(CH_VCAP_ON_A::ENABLE)
92 }
93}
94#[doc = "Field `ch_fps_ds[0-3]` reader - Fps down sample"]
95pub type CH_FPS_DS_R = crate::FieldReader<CH_FPS_DS_A>;
96#[doc = "Fps down sample\n\nValue on reset: 0"]
97#[derive(Clone, Copy, Debug, PartialEq, Eq)]
98#[repr(u8)]
99pub enum CH_FPS_DS_A {
100 #[doc = "0: no down sample"]
101 NO_DOWN_SAMPLE = 0,
102 #[doc = "2: 1/3 fps, only receives the first frame every 3 frames"]
103 _1_3 = 2,
104 #[doc = "3: 1/4 fps, only receives the first frame every 4 frames"]
105 _1_4 = 3,
106 #[doc = "4: 1/5 fps, only receives the first frame every 5 frames"]
107 _1_5 = 4,
108 #[doc = "5: 1/6 fps, only receives the first frame every 6 frames"]
109 _1_6 = 5,
110 #[doc = "6: 1/7 fps, only receives the first frame every 7 frames"]
111 _1_7 = 6,
112 #[doc = "7: 1/8 fps, only receives the first frame every 8 frames"]
113 _1_8 = 7,
114 #[doc = "8: 1/9 fps, only receives the first frame every 9 frames"]
115 _1_9 = 8,
116 #[doc = "9: 1/10 fps, only receives the first frame every 10 frames"]
117 _1_10 = 9,
118 #[doc = "10: 1/11 fps, only receives the first frame every 11 frames"]
119 _1_11 = 10,
120 #[doc = "11: 1/12 fps, only receives the first frame every 12 frames"]
121 _1_12 = 11,
122 #[doc = "12: 1/13 fps, only receives the first frame every 13 frames"]
123 _1_13 = 12,
124 #[doc = "13: 1/14 fps, only receives the first frame every 14 frames"]
125 _1_14 = 13,
126 #[doc = "14: 1/15 fps, only receives the first frame every 15 frames"]
127 _1_15 = 14,
128 #[doc = "15: 1/16 fps, only receives the first frame every 16 frames"]
129 _1_16 = 15,
130}
131impl From<CH_FPS_DS_A> for u8 {
132 #[inline(always)]
133 fn from(variant: CH_FPS_DS_A) -> Self {
134 variant as _
135 }
136}
137impl crate::FieldSpec for CH_FPS_DS_A {
138 type Ux = u8;
139}
140impl CH_FPS_DS_R {
141 #[doc = "Get enumerated values variant"]
142 #[inline(always)]
143 pub const fn variant(&self) -> Option<CH_FPS_DS_A> {
144 match self.bits {
145 0 => Some(CH_FPS_DS_A::NO_DOWN_SAMPLE),
146 2 => Some(CH_FPS_DS_A::_1_3),
147 3 => Some(CH_FPS_DS_A::_1_4),
148 4 => Some(CH_FPS_DS_A::_1_5),
149 5 => Some(CH_FPS_DS_A::_1_6),
150 6 => Some(CH_FPS_DS_A::_1_7),
151 7 => Some(CH_FPS_DS_A::_1_8),
152 8 => Some(CH_FPS_DS_A::_1_9),
153 9 => Some(CH_FPS_DS_A::_1_10),
154 10 => Some(CH_FPS_DS_A::_1_11),
155 11 => Some(CH_FPS_DS_A::_1_12),
156 12 => Some(CH_FPS_DS_A::_1_13),
157 13 => Some(CH_FPS_DS_A::_1_14),
158 14 => Some(CH_FPS_DS_A::_1_15),
159 15 => Some(CH_FPS_DS_A::_1_16),
160 _ => None,
161 }
162 }
163 #[doc = "no down sample"]
164 #[inline(always)]
165 pub fn is_no_down_sample(&self) -> bool {
166 *self == CH_FPS_DS_A::NO_DOWN_SAMPLE
167 }
168 #[doc = "1/3 fps, only receives the first frame every 3 frames"]
169 #[inline(always)]
170 pub fn is_1_3(&self) -> bool {
171 *self == CH_FPS_DS_A::_1_3
172 }
173 #[doc = "1/4 fps, only receives the first frame every 4 frames"]
174 #[inline(always)]
175 pub fn is_1_4(&self) -> bool {
176 *self == CH_FPS_DS_A::_1_4
177 }
178 #[doc = "1/5 fps, only receives the first frame every 5 frames"]
179 #[inline(always)]
180 pub fn is_1_5(&self) -> bool {
181 *self == CH_FPS_DS_A::_1_5
182 }
183 #[doc = "1/6 fps, only receives the first frame every 6 frames"]
184 #[inline(always)]
185 pub fn is_1_6(&self) -> bool {
186 *self == CH_FPS_DS_A::_1_6
187 }
188 #[doc = "1/7 fps, only receives the first frame every 7 frames"]
189 #[inline(always)]
190 pub fn is_1_7(&self) -> bool {
191 *self == CH_FPS_DS_A::_1_7
192 }
193 #[doc = "1/8 fps, only receives the first frame every 8 frames"]
194 #[inline(always)]
195 pub fn is_1_8(&self) -> bool {
196 *self == CH_FPS_DS_A::_1_8
197 }
198 #[doc = "1/9 fps, only receives the first frame every 9 frames"]
199 #[inline(always)]
200 pub fn is_1_9(&self) -> bool {
201 *self == CH_FPS_DS_A::_1_9
202 }
203 #[doc = "1/10 fps, only receives the first frame every 10 frames"]
204 #[inline(always)]
205 pub fn is_1_10(&self) -> bool {
206 *self == CH_FPS_DS_A::_1_10
207 }
208 #[doc = "1/11 fps, only receives the first frame every 11 frames"]
209 #[inline(always)]
210 pub fn is_1_11(&self) -> bool {
211 *self == CH_FPS_DS_A::_1_11
212 }
213 #[doc = "1/12 fps, only receives the first frame every 12 frames"]
214 #[inline(always)]
215 pub fn is_1_12(&self) -> bool {
216 *self == CH_FPS_DS_A::_1_12
217 }
218 #[doc = "1/13 fps, only receives the first frame every 13 frames"]
219 #[inline(always)]
220 pub fn is_1_13(&self) -> bool {
221 *self == CH_FPS_DS_A::_1_13
222 }
223 #[doc = "1/14 fps, only receives the first frame every 14 frames"]
224 #[inline(always)]
225 pub fn is_1_14(&self) -> bool {
226 *self == CH_FPS_DS_A::_1_14
227 }
228 #[doc = "1/15 fps, only receives the first frame every 15 frames"]
229 #[inline(always)]
230 pub fn is_1_15(&self) -> bool {
231 *self == CH_FPS_DS_A::_1_15
232 }
233 #[doc = "1/16 fps, only receives the first frame every 16 frames"]
234 #[inline(always)]
235 pub fn is_1_16(&self) -> bool {
236 *self == CH_FPS_DS_A::_1_16
237 }
238}
239#[doc = "Field `ch_fps_ds[0-3]` writer - Fps down sample"]
240pub type CH_FPS_DS_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CH_FPS_DS_A>;
241impl<'a, REG> CH_FPS_DS_W<'a, REG>
242where
243 REG: crate::Writable + crate::RegisterSpec,
244 REG::Ux: From<u8>,
245{
246 #[doc = "no down sample"]
247 #[inline(always)]
248 pub fn no_down_sample(self) -> &'a mut crate::W<REG> {
249 self.variant(CH_FPS_DS_A::NO_DOWN_SAMPLE)
250 }
251 #[doc = "1/3 fps, only receives the first frame every 3 frames"]
252 #[inline(always)]
253 pub fn _1_3(self) -> &'a mut crate::W<REG> {
254 self.variant(CH_FPS_DS_A::_1_3)
255 }
256 #[doc = "1/4 fps, only receives the first frame every 4 frames"]
257 #[inline(always)]
258 pub fn _1_4(self) -> &'a mut crate::W<REG> {
259 self.variant(CH_FPS_DS_A::_1_4)
260 }
261 #[doc = "1/5 fps, only receives the first frame every 5 frames"]
262 #[inline(always)]
263 pub fn _1_5(self) -> &'a mut crate::W<REG> {
264 self.variant(CH_FPS_DS_A::_1_5)
265 }
266 #[doc = "1/6 fps, only receives the first frame every 6 frames"]
267 #[inline(always)]
268 pub fn _1_6(self) -> &'a mut crate::W<REG> {
269 self.variant(CH_FPS_DS_A::_1_6)
270 }
271 #[doc = "1/7 fps, only receives the first frame every 7 frames"]
272 #[inline(always)]
273 pub fn _1_7(self) -> &'a mut crate::W<REG> {
274 self.variant(CH_FPS_DS_A::_1_7)
275 }
276 #[doc = "1/8 fps, only receives the first frame every 8 frames"]
277 #[inline(always)]
278 pub fn _1_8(self) -> &'a mut crate::W<REG> {
279 self.variant(CH_FPS_DS_A::_1_8)
280 }
281 #[doc = "1/9 fps, only receives the first frame every 9 frames"]
282 #[inline(always)]
283 pub fn _1_9(self) -> &'a mut crate::W<REG> {
284 self.variant(CH_FPS_DS_A::_1_9)
285 }
286 #[doc = "1/10 fps, only receives the first frame every 10 frames"]
287 #[inline(always)]
288 pub fn _1_10(self) -> &'a mut crate::W<REG> {
289 self.variant(CH_FPS_DS_A::_1_10)
290 }
291 #[doc = "1/11 fps, only receives the first frame every 11 frames"]
292 #[inline(always)]
293 pub fn _1_11(self) -> &'a mut crate::W<REG> {
294 self.variant(CH_FPS_DS_A::_1_11)
295 }
296 #[doc = "1/12 fps, only receives the first frame every 12 frames"]
297 #[inline(always)]
298 pub fn _1_12(self) -> &'a mut crate::W<REG> {
299 self.variant(CH_FPS_DS_A::_1_12)
300 }
301 #[doc = "1/13 fps, only receives the first frame every 13 frames"]
302 #[inline(always)]
303 pub fn _1_13(self) -> &'a mut crate::W<REG> {
304 self.variant(CH_FPS_DS_A::_1_13)
305 }
306 #[doc = "1/14 fps, only receives the first frame every 14 frames"]
307 #[inline(always)]
308 pub fn _1_14(self) -> &'a mut crate::W<REG> {
309 self.variant(CH_FPS_DS_A::_1_14)
310 }
311 #[doc = "1/15 fps, only receives the first frame every 15 frames"]
312 #[inline(always)]
313 pub fn _1_15(self) -> &'a mut crate::W<REG> {
314 self.variant(CH_FPS_DS_A::_1_15)
315 }
316 #[doc = "1/16 fps, only receives the first frame every 16 frames"]
317 #[inline(always)]
318 pub fn _1_16(self) -> &'a mut crate::W<REG> {
319 self.variant(CH_FPS_DS_A::_1_16)
320 }
321}
322impl R {
323 #[doc = "Still capture control: Capture a single still image frame on channel \\[i\\].\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `ch0_scap_on` field"]
324 #[inline(always)]
325 pub fn ch_scap_on(&self, n: u8) -> CH_SCAP_ON_R {
326 #[allow(clippy::no_effect)]
327 [(); 4][n as usize];
328 CH_SCAP_ON_R::new(((self.bits >> (n * 8)) & 1) != 0)
329 }
330 #[doc = "Bit 0 - Still capture control: Capture a single still image frame on channel \\[i\\]."]
331 #[inline(always)]
332 pub fn ch0_scap_on(&self) -> CH_SCAP_ON_R {
333 CH_SCAP_ON_R::new((self.bits & 1) != 0)
334 }
335 #[doc = "Bit 8 - Still capture control: Capture a single still image frame on channel \\[i\\]."]
336 #[inline(always)]
337 pub fn ch1_scap_on(&self) -> CH_SCAP_ON_R {
338 CH_SCAP_ON_R::new(((self.bits >> 8) & 1) != 0)
339 }
340 #[doc = "Bit 16 - Still capture control: Capture a single still image frame on channel \\[i\\]."]
341 #[inline(always)]
342 pub fn ch2_scap_on(&self) -> CH_SCAP_ON_R {
343 CH_SCAP_ON_R::new(((self.bits >> 16) & 1) != 0)
344 }
345 #[doc = "Bit 24 - Still capture control: Capture a single still image frame on channel \\[i\\]."]
346 #[inline(always)]
347 pub fn ch3_scap_on(&self) -> CH_SCAP_ON_R {
348 CH_SCAP_ON_R::new(((self.bits >> 24) & 1) != 0)
349 }
350 #[doc = "Video capture control: Capture the video image data stream on channel \\[i\\].\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `ch0_vcap_on` field"]
351 #[inline(always)]
352 pub fn ch_vcap_on(&self, n: u8) -> CH_VCAP_ON_R {
353 #[allow(clippy::no_effect)]
354 [(); 4][n as usize];
355 CH_VCAP_ON_R::new(((self.bits >> (n * 8 + 1)) & 1) != 0)
356 }
357 #[doc = "Bit 1 - Video capture control: Capture the video image data stream on channel \\[i\\]."]
358 #[inline(always)]
359 pub fn ch0_vcap_on(&self) -> CH_VCAP_ON_R {
360 CH_VCAP_ON_R::new(((self.bits >> 1) & 1) != 0)
361 }
362 #[doc = "Bit 9 - Video capture control: Capture the video image data stream on channel \\[i\\]."]
363 #[inline(always)]
364 pub fn ch1_vcap_on(&self) -> CH_VCAP_ON_R {
365 CH_VCAP_ON_R::new(((self.bits >> 9) & 1) != 0)
366 }
367 #[doc = "Bit 17 - Video capture control: Capture the video image data stream on channel \\[i\\]."]
368 #[inline(always)]
369 pub fn ch2_vcap_on(&self) -> CH_VCAP_ON_R {
370 CH_VCAP_ON_R::new(((self.bits >> 17) & 1) != 0)
371 }
372 #[doc = "Bit 25 - Video capture control: Capture the video image data stream on channel \\[i\\]."]
373 #[inline(always)]
374 pub fn ch3_vcap_on(&self) -> CH_VCAP_ON_R {
375 CH_VCAP_ON_R::new(((self.bits >> 25) & 1) != 0)
376 }
377 #[doc = "Fps down sample\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `ch0_fps_ds` field"]
378 #[inline(always)]
379 pub fn ch_fps_ds(&self, n: u8) -> CH_FPS_DS_R {
380 #[allow(clippy::no_effect)]
381 [(); 4][n as usize];
382 CH_FPS_DS_R::new(((self.bits >> (n * 8 + 2)) & 0x0f) as u8)
383 }
384 #[doc = "Bits 2:5 - Fps down sample"]
385 #[inline(always)]
386 pub fn ch0_fps_ds(&self) -> CH_FPS_DS_R {
387 CH_FPS_DS_R::new(((self.bits >> 2) & 0x0f) as u8)
388 }
389 #[doc = "Bits 10:13 - Fps down sample"]
390 #[inline(always)]
391 pub fn ch1_fps_ds(&self) -> CH_FPS_DS_R {
392 CH_FPS_DS_R::new(((self.bits >> 10) & 0x0f) as u8)
393 }
394 #[doc = "Bits 18:21 - Fps down sample"]
395 #[inline(always)]
396 pub fn ch2_fps_ds(&self) -> CH_FPS_DS_R {
397 CH_FPS_DS_R::new(((self.bits >> 18) & 0x0f) as u8)
398 }
399 #[doc = "Bits 26:29 - Fps down sample"]
400 #[inline(always)]
401 pub fn ch3_fps_ds(&self) -> CH_FPS_DS_R {
402 CH_FPS_DS_R::new(((self.bits >> 26) & 0x0f) as u8)
403 }
404}
405impl W {
406 #[doc = "Video capture control: Capture the video image data stream on channel \\[i\\].\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `ch0_vcap_on` field"]
407 #[inline(always)]
408 #[must_use]
409 pub fn ch_vcap_on(&mut self, n: u8) -> CH_VCAP_ON_W<PRS_CAP_SPEC> {
410 #[allow(clippy::no_effect)]
411 [(); 4][n as usize];
412 CH_VCAP_ON_W::new(self, n * 8 + 1)
413 }
414 #[doc = "Bit 1 - Video capture control: Capture the video image data stream on channel \\[i\\]."]
415 #[inline(always)]
416 #[must_use]
417 pub fn ch0_vcap_on(&mut self) -> CH_VCAP_ON_W<PRS_CAP_SPEC> {
418 CH_VCAP_ON_W::new(self, 1)
419 }
420 #[doc = "Bit 9 - Video capture control: Capture the video image data stream on channel \\[i\\]."]
421 #[inline(always)]
422 #[must_use]
423 pub fn ch1_vcap_on(&mut self) -> CH_VCAP_ON_W<PRS_CAP_SPEC> {
424 CH_VCAP_ON_W::new(self, 9)
425 }
426 #[doc = "Bit 17 - Video capture control: Capture the video image data stream on channel \\[i\\]."]
427 #[inline(always)]
428 #[must_use]
429 pub fn ch2_vcap_on(&mut self) -> CH_VCAP_ON_W<PRS_CAP_SPEC> {
430 CH_VCAP_ON_W::new(self, 17)
431 }
432 #[doc = "Bit 25 - Video capture control: Capture the video image data stream on channel \\[i\\]."]
433 #[inline(always)]
434 #[must_use]
435 pub fn ch3_vcap_on(&mut self) -> CH_VCAP_ON_W<PRS_CAP_SPEC> {
436 CH_VCAP_ON_W::new(self, 25)
437 }
438 #[doc = "Fps down sample\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `ch0_fps_ds` field"]
439 #[inline(always)]
440 #[must_use]
441 pub fn ch_fps_ds(&mut self, n: u8) -> CH_FPS_DS_W<PRS_CAP_SPEC> {
442 #[allow(clippy::no_effect)]
443 [(); 4][n as usize];
444 CH_FPS_DS_W::new(self, n * 8 + 2)
445 }
446 #[doc = "Bits 2:5 - Fps down sample"]
447 #[inline(always)]
448 #[must_use]
449 pub fn ch0_fps_ds(&mut self) -> CH_FPS_DS_W<PRS_CAP_SPEC> {
450 CH_FPS_DS_W::new(self, 2)
451 }
452 #[doc = "Bits 10:13 - Fps down sample"]
453 #[inline(always)]
454 #[must_use]
455 pub fn ch1_fps_ds(&mut self) -> CH_FPS_DS_W<PRS_CAP_SPEC> {
456 CH_FPS_DS_W::new(self, 10)
457 }
458 #[doc = "Bits 18:21 - Fps down sample"]
459 #[inline(always)]
460 #[must_use]
461 pub fn ch2_fps_ds(&mut self) -> CH_FPS_DS_W<PRS_CAP_SPEC> {
462 CH_FPS_DS_W::new(self, 18)
463 }
464 #[doc = "Bits 26:29 - Fps down sample"]
465 #[inline(always)]
466 #[must_use]
467 pub fn ch3_fps_ds(&mut self) -> CH_FPS_DS_W<PRS_CAP_SPEC> {
468 CH_FPS_DS_W::new(self, 26)
469 }
470 #[doc = r" Writes raw bits to the register."]
471 #[doc = r""]
472 #[doc = r" # Safety"]
473 #[doc = r""]
474 #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
475 #[inline(always)]
476 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
477 self.bits = bits;
478 self
479 }
480}
481#[doc = "Parser Capture Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prs_cap::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prs_cap::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
482pub struct PRS_CAP_SPEC;
483impl crate::RegisterSpec for PRS_CAP_SPEC {
484 type Ux = u32;
485}
486#[doc = "`read()` method returns [`prs_cap::R`](R) reader structure"]
487impl crate::Readable for PRS_CAP_SPEC {}
488#[doc = "`write(|w| ..)` method takes [`prs_cap::W`](W) writer structure"]
489impl crate::Writable for PRS_CAP_SPEC {
490 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
491 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
492}
493#[doc = "`reset()` method sets prs_cap to value 0"]
494impl crate::Resettable for PRS_CAP_SPEC {
495 const RESET_VALUE: Self::Ux = 0;
496}