d1_pac/csic/csic_dma/
csic_dma_frm_cnt.rs

1#[doc = "Register `csic_dma_frm_cnt` reader"]
2pub type R = crate::R<CSIC_DMA_FRM_CNT_SPEC>;
3#[doc = "Register `csic_dma_frm_cnt` writer"]
4pub type W = crate::W<CSIC_DMA_FRM_CNT_SPEC>;
5#[doc = "Field `frm_cnt` reader - Counter value of frame. When frame done comes, the internal counter value add 1, and when the reg full, it is cleared to 0 . When parser sent a sync signal, it is cleared to 0."]
6pub type FRM_CNT_R = crate::FieldReader<u16>;
7#[doc = "Field `pclk_dma_clr_distance` reader - Frame cnt clear cycle\n\nN*T_{SYNC}"]
8pub type PCLK_DMA_CLR_DISTANCE_R = crate::FieldReader<u16>;
9#[doc = "Field `pclk_dma_clr_distance` writer - Frame cnt clear cycle\n\nN*T_{SYNC}"]
10pub type PCLK_DMA_CLR_DISTANCE_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>;
11#[doc = "Field `frm_cnt_clr` reader - When the bit set to 1, Frame cnt is cleared to 0."]
12pub type FRM_CNT_CLR_R = crate::BitReader;
13#[doc = "Field `frm_cnt_clr` writer - When the bit set to 1, Frame cnt is cleared to 0."]
14pub type FRM_CNT_CLR_W<'a, REG> = crate::BitWriter1C<'a, REG>;
15impl R {
16    #[doc = "Bits 0:15 - Counter value of frame. When frame done comes, the internal counter value add 1, and when the reg full, it is cleared to 0 . When parser sent a sync signal, it is cleared to 0."]
17    #[inline(always)]
18    pub fn frm_cnt(&self) -> FRM_CNT_R {
19        FRM_CNT_R::new((self.bits & 0xffff) as u16)
20    }
21    #[doc = "Bits 16:30 - Frame cnt clear cycle\n\nN*T_{SYNC}"]
22    #[inline(always)]
23    pub fn pclk_dma_clr_distance(&self) -> PCLK_DMA_CLR_DISTANCE_R {
24        PCLK_DMA_CLR_DISTANCE_R::new(((self.bits >> 16) & 0x7fff) as u16)
25    }
26    #[doc = "Bit 31 - When the bit set to 1, Frame cnt is cleared to 0."]
27    #[inline(always)]
28    pub fn frm_cnt_clr(&self) -> FRM_CNT_CLR_R {
29        FRM_CNT_CLR_R::new(((self.bits >> 31) & 1) != 0)
30    }
31}
32impl W {
33    #[doc = "Bits 16:30 - Frame cnt clear cycle\n\nN*T_{SYNC}"]
34    #[inline(always)]
35    #[must_use]
36    pub fn pclk_dma_clr_distance(&mut self) -> PCLK_DMA_CLR_DISTANCE_W<CSIC_DMA_FRM_CNT_SPEC> {
37        PCLK_DMA_CLR_DISTANCE_W::new(self, 16)
38    }
39    #[doc = "Bit 31 - When the bit set to 1, Frame cnt is cleared to 0."]
40    #[inline(always)]
41    #[must_use]
42    pub fn frm_cnt_clr(&mut self) -> FRM_CNT_CLR_W<CSIC_DMA_FRM_CNT_SPEC> {
43        FRM_CNT_CLR_W::new(self, 31)
44    }
45    #[doc = r" Writes raw bits to the register."]
46    #[doc = r""]
47    #[doc = r" # Safety"]
48    #[doc = r""]
49    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
50    #[inline(always)]
51    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
52        self.bits = bits;
53        self
54    }
55}
56#[doc = "CSIC DMA Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`csic_dma_frm_cnt::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csic_dma_frm_cnt::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
57pub struct CSIC_DMA_FRM_CNT_SPEC;
58impl crate::RegisterSpec for CSIC_DMA_FRM_CNT_SPEC {
59    type Ux = u32;
60}
61#[doc = "`read()` method returns [`csic_dma_frm_cnt::R`](R) reader structure"]
62impl crate::Readable for CSIC_DMA_FRM_CNT_SPEC {}
63#[doc = "`write(|w| ..)` method takes [`csic_dma_frm_cnt::W`](W) writer structure"]
64impl crate::Writable for CSIC_DMA_FRM_CNT_SPEC {
65    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
66    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0x8000_0000;
67}
68#[doc = "`reset()` method sets csic_dma_frm_cnt to value 0x0001_0000"]
69impl crate::Resettable for CSIC_DMA_FRM_CNT_SPEC {
70    const RESET_VALUE: Self::Ux = 0x0001_0000;
71}
d1_pac/csic/csic_dma/csic_dma_frm_cnt.rs

d1_pac/csic/csic_dma/
csic_dma_frm_cnt.rs
