d1_pac/
cir_rx.rs

1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4    cir_ctl: CIR_CTL,
5    _reserved1: [u8; 0x0c],
6    cir_rxpcfg: CIR_RXPCFG,
7    _reserved2: [u8; 0x0c],
8    cir_rxfifo: CIR_RXFIFO,
9    _reserved3: [u8; 0x08],
10    cir_rxint: CIR_RXINT,
11    cir_rxsta: CIR_RXSTA,
12    cir_rxcfg: CIR_RXCFG,
13}
14impl RegisterBlock {
15    #[doc = "0x00 - CIR Control Register"]
16    #[inline(always)]
17    pub const fn cir_ctl(&self) -> &CIR_CTL {
18        &self.cir_ctl
19    }
20    #[doc = "0x10 - CIR Receiver Pulse Configure Register"]
21    #[inline(always)]
22    pub const fn cir_rxpcfg(&self) -> &CIR_RXPCFG {
23        &self.cir_rxpcfg
24    }
25    #[doc = "0x20 - CIR Receiver FIFO Register"]
26    #[inline(always)]
27    pub const fn cir_rxfifo(&self) -> &CIR_RXFIFO {
28        &self.cir_rxfifo
29    }
30    #[doc = "0x2c - CIR Receiver Interrupt Control Register"]
31    #[inline(always)]
32    pub const fn cir_rxint(&self) -> &CIR_RXINT {
33        &self.cir_rxint
34    }
35    #[doc = "0x30 - CIR Receiver Status Register"]
36    #[inline(always)]
37    pub const fn cir_rxsta(&self) -> &CIR_RXSTA {
38        &self.cir_rxsta
39    }
40    #[doc = "0x34 - CIR Receiver Configure Register"]
41    #[inline(always)]
42    pub const fn cir_rxcfg(&self) -> &CIR_RXCFG {
43        &self.cir_rxcfg
44    }
45}
46#[doc = "cir_ctl (rw) register accessor: CIR Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cir_ctl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cir_ctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cir_ctl`] module"]
47pub type CIR_CTL = crate::Reg<cir_ctl::CIR_CTL_SPEC>;
48#[doc = "CIR Control Register"]
49pub mod cir_ctl;
50#[doc = "cir_rxpcfg (rw) register accessor: CIR Receiver Pulse Configure Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cir_rxpcfg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cir_rxpcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cir_rxpcfg`] module"]
51pub type CIR_RXPCFG = crate::Reg<cir_rxpcfg::CIR_RXPCFG_SPEC>;
52#[doc = "CIR Receiver Pulse Configure Register"]
53pub mod cir_rxpcfg;
54#[doc = "cir_rxfifo (rw) register accessor: CIR Receiver FIFO Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cir_rxfifo::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cir_rxfifo::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cir_rxfifo`] module"]
55pub type CIR_RXFIFO = crate::Reg<cir_rxfifo::CIR_RXFIFO_SPEC>;
56#[doc = "CIR Receiver FIFO Register"]
57pub mod cir_rxfifo;
58#[doc = "cir_rxint (rw) register accessor: CIR Receiver Interrupt Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cir_rxint::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cir_rxint::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cir_rxint`] module"]
59pub type CIR_RXINT = crate::Reg<cir_rxint::CIR_RXINT_SPEC>;
60#[doc = "CIR Receiver Interrupt Control Register"]
61pub mod cir_rxint;
62#[doc = "cir_rxsta (rw) register accessor: CIR Receiver Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cir_rxsta::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cir_rxsta::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cir_rxsta`] module"]
63pub type CIR_RXSTA = crate::Reg<cir_rxsta::CIR_RXSTA_SPEC>;
64#[doc = "CIR Receiver Status Register"]
65pub mod cir_rxsta;
66#[doc = "cir_rxcfg (rw) register accessor: CIR Receiver Configure Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cir_rxcfg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cir_rxcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cir_rxcfg`] module"]
67pub type CIR_RXCFG = crate::Reg<cir_rxcfg::CIR_RXCFG_SPEC>;
68#[doc = "CIR Receiver Configure Register"]
69pub mod cir_rxcfg;
d1_pac/cir_rx.rs

d1_pac/
cir_rx.rs
