d1_pac/ce_ns/
ce_tsr.rs

1#[doc = "Register `ce_tsr` reader"]
2pub type R = crate::R<CE_TSR_SPEC>;
3#[doc = "Register `ce_tsr` writer"]
4pub type W = crate::W<CE_TSR_SPEC>;
5#[doc = "Field `running_channel_number` reader - Running Channel Number"]
6pub type RUNNING_CHANNEL_NUMBER_R = crate::FieldReader<RUNNING_CHANNEL_NUMBER_A>;
7#[doc = "Running Channel Number\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9#[repr(u8)]
10pub enum RUNNING_CHANNEL_NUMBER_A {
11    #[doc = "0: Task channel 0"]
12    T0 = 0,
13    #[doc = "1: Task channel 1"]
14    T1 = 1,
15    #[doc = "2: Task channel 2"]
16    T2 = 2,
17    #[doc = "3: Task channel 3"]
18    T3 = 3,
19}
20impl From<RUNNING_CHANNEL_NUMBER_A> for u8 {
21    #[inline(always)]
22    fn from(variant: RUNNING_CHANNEL_NUMBER_A) -> Self {
23        variant as _
24    }
25}
26impl crate::FieldSpec for RUNNING_CHANNEL_NUMBER_A {
27    type Ux = u8;
28}
29impl RUNNING_CHANNEL_NUMBER_R {
30    #[doc = "Get enumerated values variant"]
31    #[inline(always)]
32    pub const fn variant(&self) -> RUNNING_CHANNEL_NUMBER_A {
33        match self.bits {
34            0 => RUNNING_CHANNEL_NUMBER_A::T0,
35            1 => RUNNING_CHANNEL_NUMBER_A::T1,
36            2 => RUNNING_CHANNEL_NUMBER_A::T2,
37            3 => RUNNING_CHANNEL_NUMBER_A::T3,
38            _ => unreachable!(),
39        }
40    }
41    #[doc = "Task channel 0"]
42    #[inline(always)]
43    pub fn is_t0(&self) -> bool {
44        *self == RUNNING_CHANNEL_NUMBER_A::T0
45    }
46    #[doc = "Task channel 1"]
47    #[inline(always)]
48    pub fn is_t1(&self) -> bool {
49        *self == RUNNING_CHANNEL_NUMBER_A::T1
50    }
51    #[doc = "Task channel 2"]
52    #[inline(always)]
53    pub fn is_t2(&self) -> bool {
54        *self == RUNNING_CHANNEL_NUMBER_A::T2
55    }
56    #[doc = "Task channel 3"]
57    #[inline(always)]
58    pub fn is_t3(&self) -> bool {
59        *self == RUNNING_CHANNEL_NUMBER_A::T3
60    }
61}
62impl R {
63    #[doc = "Bits 0:1 - Running Channel Number"]
64    #[inline(always)]
65    pub fn running_channel_number(&self) -> RUNNING_CHANNEL_NUMBER_R {
66        RUNNING_CHANNEL_NUMBER_R::new((self.bits & 3) as u8)
67    }
68}
69impl W {
70    #[doc = r" Writes raw bits to the register."]
71    #[doc = r""]
72    #[doc = r" # Safety"]
73    #[doc = r""]
74    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
75    #[inline(always)]
76    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
77        self.bits = bits;
78        self
79    }
80}
81#[doc = "Task Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ce_tsr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ce_tsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
82pub struct CE_TSR_SPEC;
83impl crate::RegisterSpec for CE_TSR_SPEC {
84    type Ux = u32;
85}
86#[doc = "`read()` method returns [`ce_tsr::R`](R) reader structure"]
87impl crate::Readable for CE_TSR_SPEC {}
88#[doc = "`write(|w| ..)` method takes [`ce_tsr::W`](W) writer structure"]
89impl crate::Writable for CE_TSR_SPEC {
90    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
91    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
92}
93#[doc = "`reset()` method sets ce_tsr to value 0"]
94impl crate::Resettable for CE_TSR_SPEC {
95    const RESET_VALUE: Self::Ux = 0;
96}
d1_pac/ce_ns/ce_tsr.rs

d1_pac/ce_ns/
ce_tsr.rs
